1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2013 Freescale Semiconductor, Inc.
4 */
5
6#include <common.h>
7#include <clock_legacy.h>
8#include <console.h>
9#include <env.h>
10#include <env_internal.h>
11#include <init.h>
12#include <ns16550.h>
13#include <malloc.h>
14#include <mmc.h>
15#include <nand.h>
16#include <i2c.h>
17#include <fsl_esdhc.h>
18#include <spi_flash.h>
19#include <asm/global_data.h>
20#include "../common/spl.h"
21
22DECLARE_GLOBAL_DATA_PTR;
23
24phys_size_t get_effective_memsize(void)
25{
26	return CONFIG_SYS_L2_SIZE;
27}
28
29void board_init_f(ulong bootflag)
30{
31	u32 plat_ratio, bus_clk;
32	ccsr_gur_t *gur = (void *)CFG_SYS_MPC85xx_GUTS_ADDR;
33
34	/*
35	 * Call board_early_init_f() as early as possible as it workarounds
36	 * reboot loop due to broken CPLD state machine for reset line.
37	 */
38	board_early_init_f();
39
40	console_init_f();
41
42	/* Set pmuxcr to allow both i2c1 and i2c2 */
43	setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
44	setbits_be32(&gur->pmuxcr,
45		     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
46
47	/* Read back the register to synchronize the write. */
48	in_be32(&gur->pmuxcr);
49
50#ifdef CONFIG_SPL_SPI_BOOT
51	clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
52#endif
53
54	/* initialize selected port with appropriate baud rate */
55	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
56	plat_ratio >>= 1;
57	bus_clk = get_board_sys_clk() * plat_ratio;
58	gd->bus_clk = bus_clk;
59
60	ns16550_init((struct ns16550 *)CFG_SYS_NS16550_COM1,
61		     bus_clk / 16 / CONFIG_BAUDRATE);
62#ifdef CONFIG_SPL_MMC_BOOT
63	puts("\nSD boot...\n");
64#elif defined(CONFIG_SPL_SPI_BOOT)
65	puts("\nSPI Flash boot...\n");
66#endif
67
68	/* copy code to RAM and jump to it - this should not return */
69	/* NOTE - code has to be copied out of NAND buffer before
70	 * other blocks can be read.
71	 */
72	relocate_code(CONFIG_VAL(RELOC_STACK), 0, CONFIG_SPL_RELOC_TEXT_BASE);
73}
74
75void board_init_r(gd_t *gd, ulong dest_addr)
76{
77	/* Pointer is writable since we allocated a register for it */
78	gd = (gd_t *)CONFIG_VAL(GD_ADDR);
79	struct bd_info *bd;
80
81	memset(gd, 0, sizeof(gd_t));
82	bd = (struct bd_info *)(CONFIG_VAL(GD_ADDR) + sizeof(gd_t));
83	memset(bd, 0, sizeof(struct bd_info));
84	gd->bd = bd;
85
86	arch_cpu_init();
87	get_clocks();
88	mem_malloc_init(CONFIG_VAL(RELOC_MALLOC_ADDR),
89			CONFIG_VAL(RELOC_MALLOC_SIZE));
90	gd->flags |= GD_FLG_FULL_MALLOC_INIT;
91
92#ifdef CONFIG_SPL_ENV_SUPPORT
93#ifndef CONFIG_SPL_NAND_BOOT
94	env_init();
95#endif
96#endif
97#ifdef CONFIG_SPL_MMC_BOOT
98	mmc_initialize(bd);
99#endif
100#ifdef CONFIG_SPL_ENV_SUPPORT
101	/* relocate environment function pointers etc. */
102#ifdef CONFIG_SPL_NAND_BOOT
103	nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
104			    (uchar *)SPL_ENV_ADDR);
105	gd->env_addr  = (ulong)(SPL_ENV_ADDR);
106	gd->env_valid = ENV_VALID;
107#else
108	env_relocate();
109#endif
110#endif
111
112#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
113	i2c_init_all();
114#else
115	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
116#endif
117
118	dram_init();
119#ifdef CONFIG_SPL_NAND_BOOT
120	puts("Tertiary program loader running in sram...");
121#else
122	puts("Second program loader running in sram...\n");
123#endif
124
125#ifdef CONFIG_SPL_MMC_BOOT
126	mmc_boot();
127#elif defined(CONFIG_SPL_SPI_BOOT)
128	fsl_spi_boot();
129#elif defined(CONFIG_SPL_NAND_BOOT)
130	nand_boot();
131#endif
132}
133