/u-boot/drivers/gpio/ |
H A D | qcom_pmic_gpio.c | 95 u32 gpio_base = plat->pid + REG_OFFSET(offset); local 112 ret = pmic_reg_write(plat->pmic, gpio_base + REG_CTL, reg_ctl_val); 118 gpio_base + REG_LV_MV_OUTPUT_CTL, 131 uint32_t gpio_base = plat->pid + REG_OFFSET(offset); local 140 ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 148 ret = pmic_reg_write(plat->pmic, gpio_base + REG_DIG_PULL_CTL, 156 ret = pmic_reg_write(plat->pmic, gpio_base + REG_DIG_VIN_CTL, 162 ret = pmic_reg_write(plat->pmic, gpio_base + REG_DIG_OUT_CTL, 170 return pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL, 0, 188 uint32_t gpio_base local 221 uint32_t gpio_base = plat->pid + REG_OFFSET(offset); local 235 uint32_t gpio_base = plat->pid + REG_OFFSET(offset); local [all...] |
H A D | gpio-uclass.c | 69 if (gpio >= uc_priv->gpio_base && 70 gpio < uc_priv->gpio_base + uc_priv->gpio_count) { 71 gpio_desc_init(desc, dev, gpio - uc_priv->gpio_base); 172 offset = numeric - uc_priv->gpio_base; 221 *gpiop = uc_priv->gpio_base + desc.offset; 1381 uc_priv->gpio_base = base; 1398 return uc_priv->gpio_base + desc->offset;
|
H A D | gpio-fxl6408.c | 360 uc_priv->gpio_base = -1;
|
/u-boot/board/renesas/silk/ |
H A D | silk_spl.c | 152 static const u32 gpio_base = 0xe6050000; local 157 writel(0, gpio_base | 0x20 | gpio_offs[i]); 158 writel(BIT(23), gpio_base | 0x5020); 161 writel(0, gpio_base | 0x00 | gpio_offs[i]); 162 writel(BIT(23), gpio_base | 0x5000); 165 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 168 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/gose/ |
H A D | gose_spl.c | 146 static const u32 gpio_base = 0xe6050000; local 151 writel(0, gpio_base | 0x20 | gpio_offs[i]); 154 writel(0, gpio_base | 0x00 | gpio_offs[i]); 157 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 160 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/lager/ |
H A D | lager_spl.c | 138 static const u32 gpio_base = 0xe6050000; local 143 writel(0, gpio_base | 0x20 | gpio_offs[i]); 146 writel(0, gpio_base | 0x00 | gpio_offs[i]); 149 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 152 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/alt/ |
H A D | alt_spl.c | 152 static const u32 gpio_base = 0xe6050000; local 157 writel(0, gpio_base | 0x20 | gpio_offs[i]); 160 writel(0, gpio_base | 0x00 | gpio_offs[i]); 163 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 166 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/koelsch/ |
H A D | koelsch_spl.c | 151 static const u32 gpio_base = 0xe6050000; local 156 writel(0, gpio_base | 0x20 | gpio_offs[i]); 159 writel(0, gpio_base | 0x00 | gpio_offs[i]); 162 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 165 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/stout/ |
H A D | stout_spl.c | 141 static const u32 gpio_base = 0xe6050000; local 146 writel(0, gpio_base | 0x20 | gpio_offs[i]); 149 writel(0, gpio_base | 0x00 | gpio_offs[i]); 152 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 155 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/board/renesas/porter/ |
H A D | porter_spl.c | 150 static const u32 gpio_base = 0xe6050000; local 155 writel(0, gpio_base | 0x20 | gpio_offs[i]); 158 writel(0, gpio_base | 0x00 | gpio_offs[i]); 161 writel(gpio_set[i].val, gpio_base | 0x08 | gpio_set[i].off); 164 writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
|
/u-boot/include/asm-generic/ |
H A D | gpio.h | 414 * @gpio_base: Base GPIO number for this device. For the first active device 416 * @gpio_base for device 1 will equal the number of GPIOs in device 0. 424 unsigned gpio_base; member in struct:gpio_dev_priv
|
/u-boot/drivers/pinctrl/nuvoton/ |
H A D | pinctrl-npcm8xx.c | 55 void __iomem *gpio_base; member in struct:npcm8xx_pinctrl_priv 863 void __iomem *base = priv->gpio_base + (0x1000 * bank); 992 priv->gpio_base = dev_read_addr_ptr(dev); 993 if (!priv->gpio_base)
|
H A D | pinctrl-npcm7xx.c | 1228 void __iomem *gpio_base; member in struct:npcm7xx_pinctrl_priv 1237 priv->gpio_base = dev_read_addr_ptr(dev); 1238 if (!priv->gpio_base) 1432 void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); 1461 void __iomem *base = priv->gpio_base + (NPCM7XX_GPIO_BANK_OFFSET * bank); 1507 void __iomem *base = priv->gpio_base + (0x1000 * bank);
|