/u-boot/drivers/spi/ |
H A D | ich.c | 98 static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr) argument 103 if (ctlr->bbar) { 105 ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask; 107 ich_writel(ctlr, ichspi_bbar, ctlr->bbar); 161 static int spi_setup_opcode(struct ich_spi_priv *ctlr, struct spi_trans *trans, argument 165 uint8_t opmenu[ctlr->menubytes]; 169 ich_writeb(ctlr, trans->opcode, ctlr 214 ich_status_poll(struct ich_spi_priv *ctlr, u16 bitmask, int wait_til_set) argument 239 struct ich_spi_priv *ctlr = dev_get_priv(dev); local 257 struct ich_spi_priv *ctlr = dev_get_priv(bus); local 779 ich_init_controller(struct udevice *dev, struct ich_spi_plat *plat, struct ich_spi_priv *ctlr) argument [all...] |
H A D | spi-mem.c | 32 * @ctlr: the SPI controller requesting this dma_map() 46 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, argument 55 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) 56 dmadev = ctlr->dma_tx->device->dev; 57 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx) 58 dmadev = ctlr->dma_rx->device->dev; 60 dmadev = ctlr->dev.parent; 65 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes, 74 * @ctlr: the SPI controller requesting this dma_unmap() 92 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, argument [all...] |
/u-boot/drivers/timer/ |
H A D | sp804_timer.c | 64 uint32_t ctlr; local 67 ctlr = readl(plat->base + SP804_TIMERX_CONTROL); 68 ctlr &= SP804_CTRL_TIMER_PRESCALE_MASK; 69 switch (ctlr >> SP804_CTRL_TIMER_PRESCALE_SHIFT) { 85 ctlr |= SP804_CTRL_TIMER_32BIT | SP804_CTRL_TIMER_ENABLE; 86 writel(ctlr, plat->base + SP804_TIMERX_CONTROL);
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/u-boot/drivers/gpio/ |
H A D | tegra_gpio.c | 46 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 47 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 63 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 64 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 81 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 82 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 98 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 99 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; 116 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 117 struct gpio_ctlr_bank *bank = &ctlr 317 struct gpio_ctlr *ctlr; local [all...] |
/u-boot/include/ |
H A D | spi-mem.h | 296 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 300 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 305 spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, argument 313 spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, argument
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H A D | pci.h | 627 struct udevice *ctlr; member in struct:pci_controller
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/u-boot/board/htc/endeavoru/ |
H A D | endeavoru-spl.c | 74 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; local 75 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(TEGRA_GPIO_PS0)];
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/u-boot/drivers/pci/ |
H A D | pci_auto.c | 354 struct udevice *ctlr = pci_get_controller(dev); local 355 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); 370 PCI_BUS(dm_pci_get_bdf(dev)) - dev_seq(ctlr)); 371 dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - dev_seq(ctlr)); 457 struct udevice *ctlr = pci_get_controller(dev); local 458 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); 465 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr)); 528 struct udevice *ctlr = pci_get_controller(dev); local 529 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_imx.c | 171 struct udevice *ctlr = pci_get_controller(dev); local 172 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_ti.c | 241 struct udevice *ctlr = pci_get_controller(dev); local 242 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_starfive_jh7110.c | 52 struct udevice *ctlr = pci_get_controller(priv->plda.dev); local 53 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_rockchip.c | 152 struct udevice *ctlr = pci_get_controller(priv->dev); local 153 struct pci_controller *hose = dev_get_uclass_priv(ctlr); 515 struct udevice *ctlr = pci_get_controller(dev); local 516 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_common.c | 281 struct udevice *ctlr = pci_get_controller(pci->dev); local 282 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pci-uclass.c | 1121 hose->ctlr = bus; 1130 hose->ctlr = parent_hose->bus; 1211 return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size); 1220 return pci_bus_write_config(hose->ctlr, bdf, offset, value, size); 1417 struct udevice *ctlr; local 1424 ctlr = pci_get_controller(dev); 1425 hose = dev_get_uclass_priv(ctlr); 1457 struct udevice *ctlr; local 1464 ctlr = pci_get_controller(dev); 1465 hose = dev_get_uclass_priv(ctlr); [all...] |
H A D | pcie_uniphier.c | 293 struct udevice *ctlr = pci_get_controller(dev); local 294 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_brcmstb.c | 432 struct udevice *ctlr = pci_get_controller(dev); local 433 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_meson.c | 405 struct udevice *ctlr = pci_get_controller(dev); local 406 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_mvebu.c | 483 struct udevice *ctlr = pci_get_controller(dev); local 484 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_dw_rockchip.c | 490 struct udevice *ctlr = pci_get_controller(dev); local 491 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pcie_ecam_synquacer.c | 549 struct udevice *ctlr = pci_get_controller(dev); local 550 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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H A D | pci_mvebu.c | 419 struct udevice *ctlr = pci_get_controller(dev); local 420 struct pci_controller *hose = dev_get_uclass_priv(ctlr);
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