| /u-boot/arch/mips/mach-octeon/ |
| H A D | cvmx-helper-jtag.c | 53 jtgc.s.bypass = 0x7;
55 jtgc.s.bypass = 0xf;
|
| H A D | cvmx-helper-cfg.c | 1190 * Disables RGMII TX clock bypass and sets delay value
1194 * @param bypass Set true to enable the clock bypass and false
1199 void cvmx_helper_cfg_set_rgmii_tx_clk_delay(int xiface, int index, bool bypass, int clk_delay) argument
1205 cvmx_cfg_port[xi.node][xi.interface][index].tx_clk_delay_bypass = bypass;
1211 * Gets RGMII TX clock bypass and delay value
1215 * @param bypass Set true to enable the clock bypass and false
1220 void cvmx_helper_cfg_get_rgmii_tx_clk_delay(int xiface, int index, bool *bypass, int *clk_delay) argument
1226 *bypass
[all...] |
| /u-boot/arch/arm/include/asm/arch-tegra/ |
| H A D | warmboot.h | 81 u32 bypass:1; member in struct:pllx_base_reg::__anon6
|
| /u-boot/arch/arm/include/asm/arch-imx9/ |
| H A D | ddr.h | 68 unsigned int bypass; member in struct:dram_fsp_cfg
|
| /u-boot/drivers/iommu/ |
| H A D | apple_dart.c | 76 int bypass, shift; member in struct:apple_dart_priv
121 if (priv->bypass)
150 if (priv->bypass)
237 priv->bypass = 1;
|
| /u-boot/arch/mips/mach-octeon/include/mach/ |
| H A D | cvmx-helper-cfg.h | 114 bool agl_rx_clk_delay_bypass : 1; /** 1 = use rx clock delay bypass for AGL mode */
119 bool tx_clk_delay_bypass : 1; /** True to bypass the TX clock delay */
467 * Return if an AGL port should bypass the RX clock delay
714 * Disables RGMII TX clock bypass and sets delay value
718 * @param bypass Set true to enable the clock bypass and false
723 void cvmx_helper_cfg_set_rgmii_tx_clk_delay(int xiface, int index, bool bypass, int clk_delay);
727 * Gets RGMII TX clock bypass and delay value
731 * @param bypass Set true to enable the clock bypass an
[all...] |
| H A D | cvmx-asxx-defs.h | 201 u64 bypass : 1; member in struct:cvmx_asxx_rld_bypass::cvmx_asxx_rld_bypass_s
627 u64 bypass : 1; member in struct:cvmx_asxx_tx_comp_byp::cvmx_asxx_tx_comp_byp_cn30xx
640 u64 bypass : 1; member in struct:cvmx_asxx_tx_comp_byp::cvmx_asxx_tx_comp_byp_cn50xx
|
| H A D | cvmx-ciu-defs.h | 5995 u64 bypass : 4; member in struct:cvmx_ciu_qlm_jtgc::cvmx_ciu_qlm_jtgc_s
6003 u64 bypass : 2; member in struct:cvmx_ciu_qlm_jtgc::cvmx_ciu_qlm_jtgc_cn52xx
6011 u64 bypass : 4; member in struct:cvmx_ciu_qlm_jtgc::cvmx_ciu_qlm_jtgc_cn56xx
6020 u64 bypass : 3; member in struct:cvmx_ciu_qlm_jtgc::cvmx_ciu_qlm_jtgc_cn61xx
|
| H A D | cvmx-lmcx-defs.h | 3087 uint64_t bypass:1; member in struct:cvmx_lmcx_pll_ctl::cvmx_lmcx_pll_ctl_s
|
| /u-boot/arch/arm/mach-tegra/tegra20/ |
| H A D | warmboot_avp.c | 175 pllx_base.bypass = 1;
192 pllx_base.bypass = 0;
|
| /u-boot/drivers/clk/ |
| H A D | clk_zynq.c | 136 u32 clk_ctrl, reset, pwrdwn, mul, bypass; local
145 bypass = clk_ctrl & PLLCTRL_BPFORCE_MASK;
146 if (bypass)
|
| /u-boot/drivers/clk/at91/ |
| H A D | clk-main.c | 194 const char *parent_name, bool bypass)
210 if (bypass) {
193 at91_clk_main_osc(void __iomem *reg, const char *name, const char *parent_name, bool bypass) argument
|
| H A D | pmc.h | 103 const char *parent_name, bool bypass);
|
| /u-boot/drivers/spi/ |
| H A D | cadence_qspi.h | 304 unsigned int bypass, unsigned int delay);
|
| H A D | cadence_qspi_apb.c | 179 unsigned int bypass, unsigned int delay)
186 if (bypass)
178 cadence_qspi_apb_readdata_capture(void *reg_base, unsigned int bypass, unsigned int delay) argument
|
| /u-boot/drivers/clk/stm32/ |
| H A D | clk-stm32mp1.c | 1473 static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int digbyp, argument
1481 if (bypass || digbyp)
1516 static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int css) argument
1520 if (bypass || digbyp)
1984 int bypass, digbyp; local
1988 bypass = dev_read_bool(dev, "st,bypass");
1994 stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv);
1998 int bypass, digbyp, css; local
2001 bypass
[all...] |
| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | display.h | 14 u32 bypass; /* 0x008 */ member in struct:sunxi_de_fe_reg
|
| /u-boot/drivers/clk/aspeed/ |
| H A D | clk_ast2600.c | 67 unsigned int bypass : 1; member in struct:ast2600_pll_reg::__anon180
165 if (!pll_reg.b.bypass) {
540 p_cfg->reg.b.bypass = 0;
|
| /u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | clock.h | 1228 unsigned int bypass; member in struct:exynos5420_clock
|
| /u-boot/drivers/video/sunxi/ |
| H A D | sunxi_display.c | 388 setbits_le32(&de_fe->bypass, SUNXI_DE_FE_BYPASS_CSC_BYPASS);
|
| /u-boot/drivers/net/ |
| H A D | sja1105.c | 435 u64 bypass; member in struct:sja1105_cgu_pll_ctrl
1727 sja1105_packing(buf, &cmd->bypass, 1, 1, size, op);
1955 /* The "BYPASS" bit in SJA1110 is actually a "don't bypass" */
2087 pll.bypass = 0x0;
|