History log of /u-boot/drivers/clk/at91/pmc.h
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# 248e4100 08-Mar-2023 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: export clock setup to pmc

Clock setup was intended for setting clocks at boot time on SAMA7G5,
e.g. for root clocks like PLLs, that were used to feed IPs needed alive
in u-boot (e.g. Ethernet clock feed by a PLL). Export this functionality
to all at91 clocks as it may be necessary on other SoCs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 0a0f0e73 08-Mar-2023 Sergiu Moga <sergiu.moga@microchip.com>

clk: at91: Add support for sam9x60 USB clock

Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# c05be59c 15-Jul-2021 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: split master clock in pres and divider

Split master clock in 2 controlling block: one for prescaler one for
divider. This will allow referencing correctly the CPU clock and
master clock in device trees.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# dff39042 01-Jul-2020 Eugen Hristev <eugen.hristev@collabora.com>

clk: at91: clk-master: add 5th divisor for mck master

clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 7b7e2267 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add generic clock ops

Add generic clock ops to be used by every AT91 PMC driver
built on top of CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 36a9630f 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-generic: add driver compatible with ccf

Add clk-generic driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f89268e4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-peripheral: add driver compatible with ccf

Add clk-peripheral compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 16502bfa 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-system: add driver compatible with ccf

Add clk-system driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 2a1a579b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-programmable: add driver compatible with ccf

Add clk-programmable driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 03417335 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add support for sama7g5

Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# ad4d39a9 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add driver compatible with ccf

Add clk-utmi driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# dd4d19dd 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add support for sama7g5

Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# b4c4e18d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add driver compatible with ccf

Add clk-master driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# e6547a6d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: sam9x60-pll: add driver compatible with ccf

Add sam9x60-pll driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f1218f0b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-main: add driver compatible with ccf

Add clk-main driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 653bcce4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: move clock code to compat.c

Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 5d729f96 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add helpers for clock drivers

Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# e7c83154 05-Sep-2017 Wenyou Yang <wenyou.yang@microchip.com>

clk: at91: utmi: Set the reference clock frequency

By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.

The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.

The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>

# a4e0ef50 18-May-2017 Simon Glass <sjg@chromium.org>

clk: Modify xlate() method for livetree

Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6cadaa04 26-Sep-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>

# 9e5935c0 20-Jul-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# c05be59c 15-Jul-2021 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: split master clock in pres and divider

Split master clock in 2 controlling block: one for prescaler one for
divider. This will allow referencing correctly the CPU clock and
master clock in device trees.

Reported-by: Eugen Hristev <eugen.hristev@microchip.com>
Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with
CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# dff39042 01-Jul-2020 Eugen Hristev <eugen.hristev@microchip.com>

clk: at91: clk-master: add 5th divisor for mck master

clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 7b7e2267 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add generic clock ops

Add generic clock ops to be used by every AT91 PMC driver
built on top of CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 36a9630f 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-generic: add driver compatible with ccf

Add clk-generic driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f89268e4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-peripheral: add driver compatible with ccf

Add clk-peripheral compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 16502bfa 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-system: add driver compatible with ccf

Add clk-system driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 2a1a579b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-programmable: add driver compatible with ccf

Add clk-programmable driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 03417335 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add support for sama7g5

Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# ad4d39a9 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add driver compatible with ccf

Add clk-utmi driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# dd4d19dd 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add support for sama7g5

Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# b4c4e18d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add driver compatible with ccf

Add clk-master driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# e6547a6d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: sam9x60-pll: add driver compatible with ccf

Add sam9x60-pll driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f1218f0b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-main: add driver compatible with ccf

Add clk-main driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 653bcce4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: move clock code to compat.c

Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 5d729f96 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add helpers for clock drivers

Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# e7c83154 05-Sep-2017 Wenyou Yang <wenyou.yang@microchip.com>

clk: at91: utmi: Set the reference clock frequency

By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.

The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.

The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>

# a4e0ef50 18-May-2017 Simon Glass <sjg@chromium.org>

clk: Modify xlate() method for livetree

Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6cadaa04 26-Sep-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>

# 9e5935c0 20-Jul-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# dff39042 01-Jul-2020 Eugen Hristev <eugen.hristev@microchip.com>

clk: at91: clk-master: add 5th divisor for mck master

clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 7b7e2267 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add generic clock ops

Add generic clock ops to be used by every AT91 PMC driver
built on top of CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 36a9630f 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-generic: add driver compatible with ccf

Add clk-generic driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f89268e4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-peripheral: add driver compatible with ccf

Add clk-peripheral compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 16502bfa 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-system: add driver compatible with ccf

Add clk-system driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 2a1a579b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-programmable: add driver compatible with ccf

Add clk-programmable driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 03417335 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add support for sama7g5

Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# ad4d39a9 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-utmi: add driver compatible with ccf

Add clk-utmi driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# dd4d19dd 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add support for sama7g5

Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# b4c4e18d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-master: add driver compatible with ccf

Add clk-master driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# e6547a6d 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: sam9x60-pll: add driver compatible with ccf

Add sam9x60-pll driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# f1218f0b 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: clk-main: add driver compatible with ccf

Add clk-main driver compatible with common clock framework.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 653bcce4 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: move clock code to compat.c

Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 5d729f96 07-Sep-2020 Claudiu Beznea <claudiu.beznea@microchip.com>

clk: at91: pmc: add helpers for clock drivers

Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

# e7c83154 05-Sep-2017 Wenyou Yang <wenyou.yang@microchip.com>

clk: at91: utmi: Set the reference clock frequency

By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.

The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.

The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>

# a4e0ef50 18-May-2017 Simon Glass <sjg@chromium.org>

clk: Modify xlate() method for livetree

Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>

# 6cadaa04 26-Sep-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>

# 9e5935c0 20-Jul-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>


# e7c83154 05-Sep-2017 Wenyou Yang <wenyou.yang@microchip.com>

clk: at91: utmi: Set the reference clock frequency

By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.

The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.

The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <trini@konsulko.com>


# a4e0ef50 18-May-2017 Simon Glass <sjg@chromium.org>

clk: Modify xlate() method for livetree

Update the xlate() method to use ofnode_phandle_args instead of the fdtdec
variant. This will allow drivers to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>


# 6cadaa04 26-Sep-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>


# 9e5935c0 20-Jul-2016 Wenyou Yang <wenyou.yang@atmel.com>

clk: at91: Add clock driver

The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>