Searched refs:CFG_SYS_FSL_SEC_OFFSET (Results 1 - 12 of 12) sorted by relevance

/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dls102xa_stream_id.h32 CFG_SYS_FSL_SEC_OFFSET, \
33 CFG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum), \
36 CFG_SYS_FSL_SEC_OFFSET, \
37 CFG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum)
44 CFG_SYS_FSL_SEC_OFFSET, \
45 CFG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
49 CFG_SYS_FSL_SEC_OFFSET, \
50 CFG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
55 CFG_SYS_FSL_SEC_OFFSET, 0)
H A Dconfig.h37 #define CFG_SYS_FSL_SEC_OFFSET 0x00700000 macro
/u-boot/arch/powerpc/include/asm/
H A Dfsl_liodn.h196 CFG_SYS_FSL_SEC_OFFSET, \
197 CFG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
200 CFG_SYS_FSL_SEC_OFFSET, \
201 CFG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
208 CFG_SYS_FSL_SEC_OFFSET, \
209 CFG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
213 CFG_SYS_FSL_SEC_OFFSET, \
214 CFG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
219 CFG_SYS_FSL_SEC_OFFSET, 0)
H A Dimmap_85xx.h2490 #define CFG_SYS_FSL_SEC_OFFSET 0x300000 macro
2547 #define CFG_SYS_FSL_SEC_OFFSET 0x80000 macro
2550 #define CFG_SYS_FSL_SEC_OFFSET 0x30000 macro
2644 (CONFIG_SYS_IMMR + CFG_SYS_FSL_SEC_OFFSET)
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dfsl_icid.h183 SEC_JR3_OFFSET + CFG_SYS_FSL_SEC_OFFSET) \
H A Dimmap_lsch3.h111 #define CFG_SYS_FSL_SEC_OFFSET 0x07000000ull macro
118 (CONFIG_SYS_IMMR + CFG_SYS_FSL_SEC_OFFSET)
H A Dimmap_lsch2.h173 #define CFG_SYS_FSL_SEC_OFFSET 0x700000ull macro
180 (CONFIG_SYS_IMMR + CFG_SYS_FSL_SEC_OFFSET)
/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dimx-regs.h111 #define CFG_SYS_FSL_SEC_OFFSET (0) macro
113 CFG_SYS_FSL_SEC_OFFSET)
/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dimx-regs.h231 #define CFG_SYS_FSL_SEC_OFFSET 0 macro
233 CFG_SYS_FSL_SEC_OFFSET)
/u-boot/arch/arm/include/asm/arch-mx6/
H A Dimx-regs.h241 #define CFG_SYS_FSL_SEC_OFFSET 0 macro
243 CFG_SYS_FSL_SEC_OFFSET)
/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h218 #define CFG_SYS_FSL_SEC_OFFSET 0 macro
220 CFG_SYS_FSL_SEC_OFFSET)
/u-boot/drivers/crypto/fsl/
H A Djr.c49 (CFG_SYS_FSL_JR0_OFFSET - CFG_SYS_FSL_SEC_OFFSET))

Completed in 167 milliseconds