Searched refs:ANATOP_BASE_ADDR (Results 1 - 23 of 23) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7/
H A Dpsci-mx7.c484 ANATOP_BASE_ADDR + ANADIG_ARM_PLL + REG_SET);
486 ANATOP_BASE_ADDR + ANADIG_DDR_PLL + REG_SET);
488 ANATOP_BASE_ADDR + ANADIG_SYS_PLL + REG_SET);
490 ANATOP_BASE_ADDR + ANADIG_ENET_PLL + REG_SET);
492 ANATOP_BASE_ADDR + ANADIG_AUDIO_PLL + REG_SET);
494 ANATOP_BASE_ADDR + ANADIG_VIDEO_PLL + REG_SET);
500 ANATOP_BASE_ADDR + ANADIG_ARM_PLL + REG_CLR);
502 ANATOP_BASE_ADDR + ANADIG_DDR_PLL + REG_CLR);
504 ANATOP_BASE_ADDR + ANADIG_SYS_PLL + REG_CLR);
506 ANATOP_BASE_ADDR
[all...]
H A Dsoc.c60 .regs = (void *)ANATOP_BASE_ADDR,
155 ANATOP_BASE_ADDR;
H A Dclock.c23 ANATOP_BASE_ADDR;
/u-boot/arch/arm/mach-imx/mx6/
H A Dsoc.c43 .regs = (void *)ANATOP_BASE_ADDR,
69 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
239 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
260 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
338 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
609 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
H A Dclock.c973 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
1171 (struct anatop_regs *)ANATOP_BASE_ADDR;
1257 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
/u-boot/arch/arm/include/asm/arch-imx9/
H A Dimx-regs.h17 #define ANATOP_BASE_ADDR 0x44480000UL macro
25 #define ANATOP_BASE_ADDR 0x44480000UL macro
/u-boot/drivers/clk/imx/
H A Dclk-imx6q.c45 base = (void *)ANATOP_BASE_ADDR;
H A Dclk-imx8mn.c125 base = (void *)ANATOP_BASE_ADDR;
H A Dclk-imx8mm.c126 base = (void *)ANATOP_BASE_ADDR;
H A Dclk-imx8mp.c197 base = (void *)ANATOP_BASE_ADDR;
H A Dclk-imx8mq.c150 base = (void *)ANATOP_BASE_ADDR;
H A Dclk-imx93.c292 anatop_base = (void *)ANATOP_BASE_ADDR;
/u-boot/drivers/thermal/
H A Dimx_thermal.c146 ANATOP_BASE_ADDR;
/u-boot/board/freescale/mx6sxsabresd/
H A Dmx6sxsabresd.c115 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
/u-boot/board/udoo/neo/
H A Dneo.c127 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dimx-regs.h29 #define ANATOP_BASE_ADDR 0x30360000 macro
/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock_imx8mq.c18 static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
H A Dclock_imx8mm.c22 static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
H A Dsoc.c473 struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
/u-boot/arch/arm/mach-imx/imx9/
H A Dclock.c25 static struct anatop_reg *ana_regs = (struct anatop_reg *)ANATOP_BASE_ADDR;
/u-boot/drivers/usb/host/
H A Dehci-mx6.c342 (struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
/u-boot/arch/arm/include/asm/arch-mx6/
H A Dimx-regs.h193 #define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x48000) macro
/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h112 #define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x160000) macro

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