Searched refs:QSB_CONF_REG_ADDR (Results 1 - 10 of 10) sorted by relevance

/openwrt/package/kernel/lantiq/ltq-ptm/src/
H A Difxmips_ptm_ppe_common.h59 #define QSB_ICDV QSB_CONF_REG_ADDR(0x0007)
68 #define QSB_SBL QSB_CONF_REG_ADDR(0x0009)
77 #define QSB_CFG QSB_CONF_REG_ADDR(0x000A)
86 #define QSB_RTM QSB_CONF_REG_ADDR(0x000B)
95 #define QSB_RTD QSB_CONF_REG_ADDR(0x000C)
104 #define QSB_RAMAC QSB_CONF_REG_ADDR(0x000D)
H A Difxmips_ptm_ppe_danube.h50 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro
H A Difxmips_ptm_ppe_amazon_se.h48 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro
H A Difxmips_ptm_ppe_ar9.h51 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro
H A Difxmips_ptm_ppe_vr9.h43 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00E000) << 2))) macro
/openwrt/package/kernel/lantiq/ltq-atm/src/
H A Difxmips_atm_ppe_common.h61 #define QSB_ICDV QSB_CONF_REG_ADDR(0x0007)
70 #define QSB_SBL QSB_CONF_REG_ADDR(0x0009)
79 #define QSB_CFG QSB_CONF_REG_ADDR(0x000A)
88 #define QSB_RTM QSB_CONF_REG_ADDR(0x000B)
97 #define QSB_RTD QSB_CONF_REG_ADDR(0x000C)
106 #define QSB_RAMAC QSB_CONF_REG_ADDR(0x000D)
H A Difxmips_atm_ppe_amazon_se.h50 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro
H A Difxmips_atm_ppe_danube.h52 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro
H A Difxmips_atm_ppe_vr9.h45 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0x00E000) << 2))) macro
H A Difxmips_atm_ppe_ar9.h53 #define QSB_CONF_REG_ADDR(x) ((volatile unsigned int*)(IFX_PPE + (((x) + 0xC000) << 2))) macro

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