Searched refs:mfctl (Results 1 - 22 of 22) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-parisc/
H A Dtimex.h17 return mfctl(16);
H A Ddelay.h4 #include <asm/system.h> /* for mfctl() */
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
H A Delf.h278 dst[48] = mfctl(22); dst[49] = mfctl(0); \
279 dst[50] = mfctl(24); dst[51] = mfctl(25); \
280 dst[52] = mfctl(26); dst[53] = mfctl(27); \
281 dst[54] = mfctl(28); dst[55] = mfctl(29); \
282 dst[56] = mfctl(30); dst[57] = mfctl(3
[all...]
H A Dsystem.h79 #define mfctl(reg) ({ \ macro
82 "mfctl " #reg ",%0" : \
95 #define get_eiem() mfctl(15)
H A Dthread_info.h48 #define current_thread_info() ((struct thread_info *)mfctl(30))
H A Dassembly.h176 #define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
346 mfctl %cr27, %r3
390 mfctl %cr27, %r3
452 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
453 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
456 mfctl,w %cr11, %r1
467 mfctl %cr22, %r8
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/parisc/kernel/
H A Dbinfmt_elf32.c25 dst[48] = (elf_greg_t) mfctl(22); dst[49] = (elf_greg_t) mfctl(0); \
26 dst[50] = (elf_greg_t) mfctl(24); dst[51] = (elf_greg_t) mfctl(25); \
27 dst[52] = (elf_greg_t) mfctl(26); dst[53] = (elf_greg_t) mfctl(27); \
28 dst[54] = (elf_greg_t) mfctl(28); dst[55] = (elf_greg_t) mfctl(29); \
29 dst[56] = (elf_greg_t) mfctl(30); dst[57] = (elf_greg_t) mfctl(3
[all...]
H A Dcache.c247 unsigned long space = mfsp(3), pgd = mfctl(25);
358 alltime = mfctl(16);
360 alltime = mfctl(16) - alltime;
363 rangetime = mfctl(16);
365 rangetime = mfctl(16) - rangetime;
H A Dentry.S151 mfctl %cr30, %r1
160 mfctl %cr30, %r1
230 mfctl %pcsq, spc
232 mfctl %pcoq, va
243 mfctl %pcsq, spc
249 mfctl %pcoq, va
267 mfctl %isr,spc
269 mfctl %ior,va
287 mfctl %isr,spc
293 mfctl
[all...]
H A Dtime.c76 now = mfctl(16);
213 unsigned long next_tick = mfctl(16) + clocktick;
H A Dsyscall.S112 mfctl %cr30,%r1
127 mfctl %cr30,%r1 /* get task ptr in %r1 */
161 mfctl %cr11, %r27 /* i.e. SAR */
177 mfctl %cr30, %r1
506 mfctl %cr27, %r21 /* Get current thread register */
547 mfctl %cr27, %r1
H A Dtraps.c135 cr30 = mfctl(30);
136 cr31 = mfctl(31);
576 regs->gr[regs->iir & 0x1f] = mfctl(27);
578 regs->gr[regs->iir & 0x1f] = mfctl(26);
H A Dhpmc.S115 mfctl %cr14, %r4
H A Dirq.c345 eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
H A Dreal2.S113 # define PUSH_CR(r, where) mfctl r, %r1 ! STREG,ma %r1, REG_SZ(where)
H A Dhead.S239 mfctl,w %cr11,%r10
H A Dperf_asm.S52 mfctl ccr,%r26 ; get coprocessor register
78 mfctl ccr,%r26 ; get coprocessor register
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/parisc/hpux/
H A Dgate.S41 mfctl %cr30,%r1
81 mfctl %cr11, %r27 /* i.e. SAR */
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/parisc/lib/
H A Dfixup.S32 mfctl 30,\t2
H A Dlusercopy.S49 mfctl %cr30,%r1
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/parisc/
H A Dccio-dma.c348 unsigned long cr_start = mfctl(16);
392 unsigned long cr_end = mfctl(16);
H A Dsba_iommu.c390 unsigned long cr_start = mfctl(16);
416 unsigned long cr_end = mfctl(16);

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