Searched refs:REG_ADDR (Results 1 - 25 of 89) sorted by relevance

1234

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/lib/
H A Dhw_settings.S34 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
36 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
38 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
40 .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
42 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
44 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
46 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
48 .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
51 .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
53 .dword REG_ADDR(gi
[all...]
H A Ddram_init.S29 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
32 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0
69 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
73 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
101 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/kernel/
H A Dio.c21 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_oe),
22 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pa_dout),
23 (unsigned long*)REG_ADDR(gio, regi_gio, r_pa_din),
27 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_oe),
28 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pb_dout),
29 (unsigned long*)REG_ADDR(gio, regi_gio, r_pb_din),
33 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_oe),
34 (unsigned long*)REG_ADDR(gio, regi_gio, rw_pc_dout),
35 (unsigned long*)REG_ADDR(gio, regi_gio, r_pc_din),
39 (unsigned long*)REG_ADDR(gi
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/video/
H A Dsaa7114.c125 #define REG_ADDR(x) (((x) << 1) + 1) macro
558 decoder->reg[REG_ADDR(0x06)] =
560 decoder->reg[REG_ADDR(0x07)] =
563 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
565 decoder->reg[REG_ADDR(0x0e)] = 0x85;
566 decoder->reg[REG_ADDR(0x0f)] = 0x24;
577 decoder->reg[REG_ADDR(0x06)] =
579 decoder->reg[REG_ADDR(0x07)] =
582 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
584 decoder->reg[REG_ADDR(
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/asm/
H A Dirq_nmi_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dstrcop_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dconfig_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dcris_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dstrmux_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Data_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dmmu_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Drt_trace_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Dtimer_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/iop/asm/
H A Diop_version_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Diop_fifo_in_extra_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Diop_fifo_out_extra_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Diop_scrc_in_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
H A Diop_scrc_out_defs_asm.h43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/iop/
H A Diop_version_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/
H A Dirq_nmi_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
H A Dstrcop_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
H A Data_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
H A Dconfig_defs.h74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \ macro
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v32/boot/rescue/
H A Dhead.S13 move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/chelsio/
H A Dmy3126.c34 #define OFFSET(REG_ADDR) (REG_ADDR << 2)

Completed in 109 milliseconds

1234