1#ifndef __cris_defs_asm_h 2#define __cris_defs_asm_h 3 4/* 5 * This file is autogenerated from 6 * file: ../../inst/crisp/doc/cris.r 7 * id: cris.r,v 1.6 2004/05/05 07:41:12 perz Exp 8 * last modfied: Mon Apr 11 16:06:39 2005 9 * 10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/cris_defs_asm.h ../../inst/crisp/doc/cris.r 11 * id: $Id: cris_defs_asm.h,v 1.1.1.1 2007/08/03 18:53:23 Exp $ 12 * Any changes here will be lost. 13 * 14 * -*- buffer-read-only: t -*- 15 */ 16 17#ifndef REG_FIELD 18#define REG_FIELD( scope, reg, field, value ) \ 19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb ) 20#define REG_FIELD_X_( value, shift ) ((value) << shift) 21#endif 22 23#ifndef REG_STATE 24#define REG_STATE( scope, reg, field, symbolic_value ) \ 25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb ) 26#define REG_STATE_X_( k, shift ) (k << shift) 27#endif 28 29#ifndef REG_MASK 30#define REG_MASK( scope, reg, field ) \ 31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb ) 32#define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb) 33#endif 34 35#ifndef REG_LSB 36#define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb 37#endif 38 39#ifndef REG_BIT 40#define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit 41#endif 42 43#ifndef REG_ADDR 44#define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset) 45#define REG_ADDR_X_( inst, offs ) ((inst) + offs) 46#endif 47 48#ifndef REG_ADDR_VECT 49#define REG_ADDR_VECT( scope, inst, reg, index ) \ 50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \ 51 STRIDE_##scope##_##reg ) 52#define REG_ADDR_VECT_X_( inst, offs, index, stride ) \ 53 ((inst) + offs + (index) * stride) 54#endif 55 56/* Register rw_gc_cfg, scope cris, type rw */ 57#define reg_cris_rw_gc_cfg___ic___lsb 0 58#define reg_cris_rw_gc_cfg___ic___width 1 59#define reg_cris_rw_gc_cfg___ic___bit 0 60#define reg_cris_rw_gc_cfg___dc___lsb 1 61#define reg_cris_rw_gc_cfg___dc___width 1 62#define reg_cris_rw_gc_cfg___dc___bit 1 63#define reg_cris_rw_gc_cfg___im___lsb 2 64#define reg_cris_rw_gc_cfg___im___width 1 65#define reg_cris_rw_gc_cfg___im___bit 2 66#define reg_cris_rw_gc_cfg___dm___lsb 3 67#define reg_cris_rw_gc_cfg___dm___width 1 68#define reg_cris_rw_gc_cfg___dm___bit 3 69#define reg_cris_rw_gc_cfg___gb___lsb 4 70#define reg_cris_rw_gc_cfg___gb___width 1 71#define reg_cris_rw_gc_cfg___gb___bit 4 72#define reg_cris_rw_gc_cfg___gk___lsb 5 73#define reg_cris_rw_gc_cfg___gk___width 1 74#define reg_cris_rw_gc_cfg___gk___bit 5 75#define reg_cris_rw_gc_cfg___gp___lsb 6 76#define reg_cris_rw_gc_cfg___gp___width 1 77#define reg_cris_rw_gc_cfg___gp___bit 6 78#define reg_cris_rw_gc_cfg_offset 0 79 80/* Register rw_gc_ccs, scope cris, type rw */ 81#define reg_cris_rw_gc_ccs_offset 4 82 83/* Register rw_gc_srs, scope cris, type rw */ 84#define reg_cris_rw_gc_srs___srs___lsb 0 85#define reg_cris_rw_gc_srs___srs___width 8 86#define reg_cris_rw_gc_srs_offset 8 87 88/* Register rw_gc_nrp, scope cris, type rw */ 89#define reg_cris_rw_gc_nrp_offset 12 90 91/* Register rw_gc_exs, scope cris, type rw */ 92#define reg_cris_rw_gc_exs_offset 16 93 94/* Register rw_gc_eda, scope cris, type rw */ 95#define reg_cris_rw_gc_eda_offset 20 96 97/* Register rw_gc_r0, scope cris, type rw */ 98#define reg_cris_rw_gc_r0_offset 32 99 100/* Register rw_gc_r1, scope cris, type rw */ 101#define reg_cris_rw_gc_r1_offset 36 102 103/* Register rw_gc_r2, scope cris, type rw */ 104#define reg_cris_rw_gc_r2_offset 40 105 106/* Register rw_gc_r3, scope cris, type rw */ 107#define reg_cris_rw_gc_r3_offset 44 108 109 110/* Constants */ 111#define regk_cris_no 0x00000000 112#define regk_cris_rw_gc_cfg_default 0x00000000 113#define regk_cris_yes 0x00000001 114#endif /* __cris_defs_asm_h */ 115