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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-cris/arch-v32/hwregs/
1#ifndef __config_defs_h
2#define __config_defs_h
3
4/*
5 * This file is autogenerated from
6 *   file:           ../../rtl/config_regs.r
7 *     id:           config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
8 *     last modfied: Thu Mar  4 12:34:39 2004
9 *
10 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile config_defs.h ../../rtl/config_regs.r
11 *      id: $Id: config_defs.h,v 1.1.1.1 2007/08/03 18:53:23 Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19  REG_READ( reg_##scope##_##reg, \
20            (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25  REG_WRITE( reg_##scope##_##reg, \
26             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31  REG_READ( reg_##scope##_##reg, \
32            (inst) + REG_RD_ADDR_##scope##_##reg + \
33	    (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38  REG_WRITE( reg_##scope##_##reg, \
39             (inst) + REG_WR_ADDR_##scope##_##reg + \
40	     (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56	    (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62	     (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76  ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82    (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope config */
86
87/* Register r_bootsel, scope config, type r */
88typedef struct {
89  unsigned int boot_mode   : 3;
90  unsigned int full_duplex : 1;
91  unsigned int user        : 1;
92  unsigned int pll         : 1;
93  unsigned int flash_bw    : 1;
94  unsigned int dummy1      : 25;
95} reg_config_r_bootsel;
96#define REG_RD_ADDR_config_r_bootsel 0
97
98/* Register rw_clk_ctrl, scope config, type rw */
99typedef struct {
100  unsigned int pll          : 1;
101  unsigned int cpu          : 1;
102  unsigned int iop          : 1;
103  unsigned int dma01_eth0   : 1;
104  unsigned int dma23        : 1;
105  unsigned int dma45        : 1;
106  unsigned int dma67        : 1;
107  unsigned int dma89_strcop : 1;
108  unsigned int bif          : 1;
109  unsigned int fix_io       : 1;
110  unsigned int dummy1       : 22;
111} reg_config_rw_clk_ctrl;
112#define REG_RD_ADDR_config_rw_clk_ctrl 4
113#define REG_WR_ADDR_config_rw_clk_ctrl 4
114
115/* Register rw_pad_ctrl, scope config, type rw */
116typedef struct {
117  unsigned int usb_susp : 1;
118  unsigned int phyrst_n : 1;
119  unsigned int dummy1   : 30;
120} reg_config_rw_pad_ctrl;
121#define REG_RD_ADDR_config_rw_pad_ctrl 8
122#define REG_WR_ADDR_config_rw_pad_ctrl 8
123
124
125/* Constants */
126enum {
127  regk_config_bw16                         = 0x00000000,
128  regk_config_bw32                         = 0x00000001,
129  regk_config_master                       = 0x00000005,
130  regk_config_nand                         = 0x00000003,
131  regk_config_net_rx                       = 0x00000001,
132  regk_config_net_tx_rx                    = 0x00000002,
133  regk_config_no                           = 0x00000000,
134  regk_config_none                         = 0x00000007,
135  regk_config_nor                          = 0x00000000,
136  regk_config_rw_clk_ctrl_default          = 0x00000002,
137  regk_config_rw_pad_ctrl_default          = 0x00000000,
138  regk_config_ser                          = 0x00000004,
139  regk_config_slave                        = 0x00000006,
140  regk_config_yes                          = 0x00000001
141};
142#endif /* __config_defs_h */
143