/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 848 SmallVector<CCValAssign, 16> RVLocs; local 850 getTargetMachine(), RVLocs, *DAG.getContext()); 855 for (unsigned i = 0; i != RVLocs.size(); ++i) { 856 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), 857 RVLocs[i].getValVT(), InFlag).getValue(1); 1021 SmallVector<CCValAssign, 16> RVLocs; local 1025 getTargetMachine(), RVLocs, *DAG.getContext()); 1033 for (unsigned i = 0; i != RVLocs.size(); ++i) 1034 if (RVLocs[i].isRegLoc()) 1035 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[ [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 390 SmallVector<CCValAssign, 16> RVLocs; local 398 getTargetMachine(), RVLocs, *DAG.getContext()); 406 for (unsigned i = 0; i != RVLocs.size(); ++i) 407 if (RVLocs[i].isRegLoc()) 408 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); 414 for (unsigned i = 0; i != RVLocs.size(); ++i) { 415 CCValAssign &VA = RVLocs[i]; 573 SmallVector<CCValAssign, 16> RVLocs; local 575 getTargetMachine(), RVLocs, *DAG.getContext()); 580 for (unsigned i = 0; i != RVLocs [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 89 SmallVector<CCValAssign, 16> RVLocs; local 93 DAG.getTarget(), RVLocs, *DAG.getContext()); 101 for (unsigned i = 0; i != RVLocs.size(); ++i) 102 if (RVLocs[i].isRegLoc()) 103 MF.getRegInfo().addLiveOut(RVLocs[i].getLocReg()); 109 for (unsigned i = 0; i != RVLocs.size(); ++i) { 110 CCValAssign &VA = RVLocs[i]; 596 SmallVector<CCValAssign, 16> RVLocs; local 598 DAG.getTarget(), RVLocs, *DAG.getContext()); 603 for (unsigned i = 0; i != RVLocs [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1043 SmallVector<CCValAssign, 16> RVLocs; local 1045 getTargetMachine(), RVLocs, *DAG.getContext()); 1050 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1051 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), 1052 RVLocs[i].getValVT(), InFlag).getValue(1); 1211 SmallVector<CCValAssign, 16> RVLocs; local 1212 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); 1225 SmallVector<CCValAssign, 16> RVLocs; local 1229 getTargetMachine(), RVLocs, *DAG.getContext()); 1237 for (unsigned i = 0; i != RVLocs [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1926 SmallVector<CCValAssign, 16> RVLocs; local 1927 CCState CCRetInfo(CC, false, *FuncInfo.MF, TM, RVLocs, 1931 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1932 EVT CopyVT = RVLocs[i].getValVT(); 1938 if ((RVLocs[i].getLocReg() == X86::ST0 || 1939 RVLocs[i].getLocReg() == X86::ST1)) { 1940 if (isScalarFPTypeInSSEReg(RVLocs[i].getValVT())) { 1948 CopyReg).addReg(RVLocs[i].getLocReg()); 1949 UsedRegs.push_back(RVLocs[i].getLocReg()); 1952 if (CopyVT != RVLocs[ [all...] |
H A D | X86ISelLowering.cpp | 1486 SmallVector<CCValAssign, 16> RVLocs; local 1488 RVLocs, Context); 1501 SmallVector<CCValAssign, 16> RVLocs; local 1503 RVLocs, *DAG.getContext()); 1508 for (unsigned i = 0; i != RVLocs.size(); ++i) 1509 if (RVLocs[i].isRegLoc() && !MRI.isLiveOut(RVLocs[i].getLocReg())) 1510 MRI.addLiveOut(RVLocs[i].getLocReg()); 1521 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1522 CCValAssign &VA = RVLocs[ 1671 SmallVector<CCValAssign, 16> RVLocs; local 2802 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 298 SmallVector<CCValAssign, 16> RVLocs; local 302 getTargetMachine(), RVLocs, *DAG.getContext()); 310 for (unsigned i = 0; i != RVLocs.size(); ++i) 311 if (RVLocs[i].isRegLoc()) 312 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); 317 for (unsigned i = 0; i != RVLocs.size(); ++i) { 318 CCValAssign &VA = RVLocs[i]; 351 SmallVector<CCValAssign, 16> RVLocs; local 354 getTargetMachine(), RVLocs, *DAG.getContext()); 359 for (unsigned i = 0; i != RVLocs [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 2043 SmallVector<CCValAssign, 16> RVLocs; local 2044 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); 2048 if (RVLocs.size() == 2 && RetVT == MVT::f64) { 2051 EVT DestVT = RVLocs[0].getValVT(); 2056 .addReg(RVLocs[0].getLocReg()) 2057 .addReg(RVLocs[1].getLocReg())); 2059 UsedRegs.push_back(RVLocs[0].getLocReg()); 2060 UsedRegs.push_back(RVLocs[1].getLocReg()); 2065 assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!"); 2066 EVT CopyVT = RVLocs[ 2194 SmallVector<CCValAssign, 16> RVLocs; local 2302 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
H A D | ARMISelLowering.cpp | 1187 SmallVector<CCValAssign, 16> RVLocs; local 1189 getTargetMachine(), RVLocs, *DAG.getContext(), Call); 1195 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1196 CCValAssign VA = RVLocs[i]; 1205 VA = RVLocs[++i]; // skip ahead to next loc 1217 VA = RVLocs[++i]; // skip ahead to next loc 1221 VA = RVLocs[++i]; // skip ahead to next loc 1872 SmallVector<CCValAssign, 16> RVLocs; local 1876 getTargetMachine(), RVLocs, *DAG.getContext(), Call); 1885 for (unsigned i = 0; i != RVLocs [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
H A D | SPUISelLowering.cpp | 1449 SmallVector<CCValAssign, 16> RVLocs; 1451 getTargetMachine(), RVLocs, *DAG.getContext()); 1456 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1457 CCValAssign VA = RVLocs[i]; 1476 SmallVector<CCValAssign, 16> RVLocs; local 1478 getTargetMachine(), RVLocs, *DAG.getContext()); 1484 for (unsigned i = 0; i != RVLocs.size(); ++i) 1485 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); 1491 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1492 CCValAssign &VA = RVLocs[ [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 3158 SmallVector<CCValAssign, 16> RVLocs; local 3160 getTargetMachine(), RVLocs, *DAG.getContext()); 3165 for (unsigned i = 0; i != RVLocs.size(); ++i) { 3166 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), 3167 RVLocs[i].getValVT(), InFlag).getValue(1); 3450 SmallVector<CCValAssign, 16> RVLocs; local 3454 getTargetMachine(), RVLocs, *DAG.getContext()); 3462 for (unsigned i = 0; i != RVLocs.size(); ++i) 3463 if (RVLocs[i].isRegLoc()) 3464 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[ [all...] |
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2846 SmallVector<CCValAssign, 16> RVLocs; local 2848 getTargetMachine(), RVLocs, *DAG.getContext()); 2852 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { 2853 CCValAssign &VA = RVLocs[i]; 2907 SmallVector<CCValAssign, 16> RVLocs; local 2909 getTargetMachine(), RVLocs, *DAG.getContext()); 2911 for (unsigned i = 0; i != RVLocs.size(); ++i) 2912 DAG.getMachineFunction().getRegInfo().addLiveOut(RVLocs[i].getLocReg()); 3652 SmallVector<CCValAssign, 16> RVLocs; local 3654 RVLocs, Contex 3665 SmallVector<CCValAssign, 16> RVLocs; local [all...] |