/macosx-10.5.8/xnu-1228.15.4/osfmk/mach/ppc/ |
H A D | _types.h | 71 unsigned int r20; member in struct:ppc_thread_state 118 unsigned long long r20; member in struct:ppc_thread_state64
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H A D | _structs.h | 116 unsigned int r20; variable 215 unsigned long long r20; variable
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/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/ |
H A D | Emulate64.s | 87 rlwinm r3,r20,6,26,31 // right justify opcode field (bits 0-5) 88 rlwinm r4,r20,31,22,31 // right justify extended opcode field (bits 21-30) 101 rlwinm r5,r20,11,27,29 // get (CR# * 4) from instruction 119 oris r20,r20,0x7C00 // change opcode to 31 244 lwz r20,0(r28) // fetch faulting instruction, probably with DR on 253 stw r20,savemisc2(r13) // Save the instruction image in case we notify 287 // r20 = faulting instruction 303 a64GotInstruction: // here from program interrupt with instruction in r20 304 rlwinm r21,r20, [all...] |
H A D | lowmem_vectors.s | 899 stw r20,tempr0(r11) ; Save some work registers 900 lwz r20,dgFlags(0) ; Get the flags 903 rlwinm r20,r20,MSR_PR_BIT-enaUsrFCallb,MASK(MSR_PR) ; Shift the validity bit over to pr bit spot 905 orc r20,r20,r21 ; Get ~PR | FC 909 andi. r20,r20,MASK(MSR_PR) ; Set cr0_eq is we are in problem state and the validity bit is not set 932 ctgte32: lwarx r20,0,r23 ; Get and reserve the next slot to allocate 933 addi r24,r20,LTR_siz [all...] |
H A D | _setjmp.s | 67 stw r20, 32(ARG0) 139 lwz r20, 32(ARG0)
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H A D | hw_exception.s | 1131 lwz r20,curctx(r28) ; Get our current context 1135 lwz r21,FPUlevel(r20) ; Get the facility level 1148 lwz r22,FPUcpu(r20) ; Get CPU this context was last dispatched on 1150 stw r19,FPUcpu(r20) ; Claim context for us 1167 sub r0,r23,r20 ; Subtract one from the other 1168 sub r21,r20,r23 ; Subtract the other from the one 1182 lwz r22,FPUsave(r20) ; Get pointer to the first savearea 1197 fpuonlyone: stw r24,FPUsave(r20) ; Dequeue this savearea 1218 fpusetlvl: stw r21,FPUlevel(r20) ; Save the level 1228 mr r26,r20 ; Us [all...] |
H A D | vmachmon_asm.s | 467 lwz r20,vmmContextKern(r27) ; Get the state page kernel addr 468 lwz r21,vmmCntrl(r20) ; Get vmmCntrl 477 lwz r22,famintercepts(r20) ; Load intercept bit field 480 lwz r22,faminterceptsX(r20) ; Load intercept bit field 482 stw r21,vmmCntrl(r20) ; Update vmmCntrl 509 li r20,T_DATA_ACCESS ; Change to DSI fault 516 stw r20,saveexception(r30) ; Say we need to emulate a DSI 520 swvmNoMap: lwz r20,vmmContextKern(r27) ; Get the comm area 522 lwz r20,vmmCntrl(r20) ; Ge [all...] |
H A D | start.s | 145 lis r20,HIGH_ADDR(fwdisplock) ; Get address of the firmware display lock 147 ori r20,r20,LOW_ADDR(fwdisplock) ; Get address of the firmware display lock 148 stw r19,0(r20) ; Make sure the lock is free 178 donePVR: lwz r20,ptInitRout(r26) ; Grab the special init routine 179 mtlr r20 ; Setup to call the init 256 doOurInit: mr. r20,r20 ; See if initialization routine 304 lis r20,hi16(dozem|napm|sleepm) ; Get mask of power saving features 305 ori r20,r2 [all...] |
H A D | Emulate.s | 95 rlwinm r20,r10,16,22,31 ; Set rS/rD and rA 100 rlwimi r20,r10,14,15,16 ; Move bits 29 and 30 of instruction to 15 and 16 of DSISR 102 rlwimi r20,r10,8,17,17 ; Move bit 25 to bit 17 105 rlwimi r20,r10,3,18,21 ; Move bit 21-24 to bit 18-21 142 eFinishUp: stw r20,savedsisr(r13) ; Set the DSISR 225 aan64: lwz r20,savedsisr(r13) ; Get the DSISR 228 mtcrf 0x10,r20 ; Put instruction ID in CR for later 231 mtcrf 0x08,r20 ; Put instruction ID in CR for later 233 mtcrf 0x04,r20 ; Put instruction ID in CR for later 238 mr r26,r20 ; Sav [all...] |
H A D | skiplists.s | 821 * Called on a bl, with the pmap ptr in r20. We assume the pmap is locked (shared) and 823 * We use r20-r31, cr0, cr1, and cr7. If we return, no inconsistencies were found. 850 xor r20,r3,r16 ; Translate 32-bit portion 853 rldimi r20,r15,32,0 ; Shift the fixed upper part of the physical over and cram in top 912 stw r20,0x0A0+4(r19) 961 std r20,0x0A0(r19) 1004 lbz r26,pmapCurLists(r20) ; get #lists that are in use 1005 lwz r21,pmapResidentCnt(r20); get #mappings in this pmap 1026 ; r20 = pmap ptr 1033 la r26,pmapSkipLists(r20) ; ge [all...] |
H A D | status.c | 174 ts->r20 = (unsigned int)sv->save_r20; 246 xts->r20 = sv->save_r20; 495 ts->r20 = (unsigned int)sv->save_r20; 567 xts->r20 = sv->save_r20; 763 genuser->save_r20 = (uint64_t)ts->r20; 821 genuser->save_r20 = xts->r20;
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H A D | hw_vm.s | 146 stw r20,FM_ARG0+0x0C(r1) ; Save a register 171 lwz r20,pmapvr+4(r3) ; Get conversion mask for pmap 176 hamSF1: ld r20,pmapvr(r3) ; Get conversion mask for pmap 182 xor r28,r28,r20 ; Convert the pmap to physical addressing 354 lwz r20,FM_ARG0+0x0C(r1) ; Save a register 377 lwz r20,mpVAddr(r3) ; Get the overlay address 392 mr r3,r20 ; Save the top of the colliding address 397 cmplw r20,r8 ; High part of vaddr the same? 533 stw r20,FM_ARG0+0x14(r1) ; Save a register 598 mr r20,r [all...] |
H A D | Firmware.s | 1846 lis r20,HIGH_ADDR(hexfont) /* Point to the font */ 1849 ori r20,r20,LOW_ADDR(hexfont) /* Point to the low part */ 1860 add r10,r20,r10 /* Point to the character in the font */ 1915 addi r20,r20,2 /* Offset the font to the next row */
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/macosx-10.5.8/xnu-1228.15.4/libsa/ppc/ |
H A D | setjmp.s | 70 stw r20, 32(ARG0) 142 lwz r20, 32(ARG0)
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/macosx-10.5.8/xnu-1228.15.4/EXTERNAL_HEADERS/architecture/ppc/ |
H A D | reg_help.h | 73 #define s10 r20
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/macosx-10.5.8/xnu-1228.15.4/osfmk/chud/ppc/ |
H A D | chud_thread_ppc.c | 85 ts->r20 = (unsigned int)sv->save_r20; 137 xts->r20 = sv->save_r20; 202 sv->save_r20 = (uint64_t)ts->r20; 250 sv->save_r20 = xts->r20;
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/macosx-10.5.8/xnu-1228.15.4/osfmk/kdp/ml/ppc/ |
H A D | kdp_machdep.c | 169 state->r20 = (unsigned int)saved_state->save_r20; 220 state->r20 = saved_state->save_r20; 303 saved_state->save_r20 = state->r20; 352 saved_state->save_r20 = state->r20;
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