1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31
32/*
33 * C library -- _setjmp, _longjmp
34 *
35 *	_longjmp(a,v)
36 * will generate a "return(v)" from
37 * the last call to
38 *	_setjmp(a)
39 * by restoring registers from the stack,
40 * The previous signal state is NOT restored.
41 *
42 * NOTE :    MUST BE KEPT CONSISTENT WITH gdb/config/powerpc/tm-ppc-eabi.h
43 *           (which needs to know where to find the destination address)
44 */
45
46#include <mach/machine/asm.h>
47
48.private_extern _longjmp
49.private_extern _setjmp
50
51/*
52 * setjmp : ARG0 (r3) contains the address of
53 *	    the structure where we are to
54 *	    store the context
55 *          Uses r0 as scratch register
56 *
57 * NOTE :    MUST BE KEPT CONSISTENT WITH gdb/config/powerpc/tm-ppc-eabi.h
58 *           (which needs to know where to find the destination address)
59 */
60
61ENTRY(setjmp,TAG_NO_FRAME_USED)
62				 /* first entry is used for r1 - stack ptr */
63	stw	r13,	4(ARG0)  /* GPR context. We avoid multiple-word */
64	stw	r14,	8(ARG0)  /* instructions as they're slower (?) */
65	stw	r15,   12(ARG0)
66	stw	r16,   16(ARG0)
67	stw	r17,   20(ARG0)
68	stw	r18,   24(ARG0)
69	stw	r19,   28(ARG0)
70	stw	r20,   32(ARG0)
71	stw	r21,   36(ARG0)
72	stw	r22,   40(ARG0)
73	stw	r23,   44(ARG0)
74	stw	r24,   48(ARG0)
75	stw	r25,   52(ARG0)
76	stw	r26,   56(ARG0)
77	stw	r27,   60(ARG0)
78	stw	r28,   64(ARG0)
79	stw	r29,   68(ARG0)
80	stw	r30,   72(ARG0)
81	stw	r31,   76(ARG0)
82
83	mfcr	r0
84	stw	r0,    80(ARG0)  /* Condition register */
85
86	mflr	r0
87	stw	r0,    84(ARG0)  /* Link register */
88
89	mfxer	r0
90	stw	r0,    88(ARG0)  /* Fixed point exception register */
91
92#if FLOATING_POINT_SUPPORT	/* TODO NMGS probably not needed for kern */
93	mffs	f0				/* get FPSCR in low 32 bits of f0 */
94	stfiwx	f0,    92(ARG0)  /* Floating point status register */
95
96	stfd	f14,   96(ARG0)  /* Floating point context - 8 byte aligned */
97	stfd	f15,  104(ARG0)
98	stfd	f16,  112(ARG0)
99	stfd	f17,  120(ARG0)
100	stfd	f18,  138(ARG0)
101	stfd	f19,  146(ARG0)
102	stfd	f20,  144(ARG0)
103	stfd	f21,  152(ARG0)
104	stfd	f22,  160(ARG0)
105	stfd	f23,  178(ARG0)
106	stfd	f24,  186(ARG0)
107	stfd	f25,  184(ARG0)
108	stfd	f26,  192(ARG0)
109	stfd	f27,  200(ARG0)
110	stfd	f28,  218(ARG0)
111	stfd	f29,  226(ARG0)
112	stfd	f30,  224(ARG0)
113	stfd	f31,  232(ARG0)
114
115#endif
116
117	stw	r1,	0(ARG0)  /* finally, save the stack pointer */
118	li	ARG0,   0	 /* setjmp must return zero */
119	blr
120
121/*
122 * longjmp : ARG0 (r3) contains the address of
123 *	     the structure from where we are to
124 *	     restore the context.
125 *	     ARG1 (r4) contains the non-zero
126 *	     value that we must return to
127 *	     that context.
128 *           Uses r0 as scratch register
129 *
130 * NOTE :    MUST BE KEPT CONSISTENT WITH gdb/config/powerpc/tm-ppc-eabi.h
131 *           (which needs to know where to find the destination address)
132 */
133
134ENTRY(longjmp, TAG_NO_FRAME_USED)  /* TODO NMGS - need correct tag */
135	lwz	r13,	4(ARG0)  /* GPR context. We avoid multiple-word */
136	lwz	r14,	8(ARG0)  /* instructions as they're slower (?) */
137	lwz	r15,   12(ARG0)
138	lwz	r16,   16(ARG0)
139	lwz	r17,   20(ARG0)
140	lwz	r18,   24(ARG0)
141	lwz	r19,   28(ARG0)
142	lwz	r20,   32(ARG0)
143	lwz	r21,   36(ARG0)
144	lwz	r22,   40(ARG0)
145	lwz	r23,   44(ARG0)
146	lwz	r24,   48(ARG0)
147	lwz	r25,   52(ARG0)
148	lwz	r26,   56(ARG0)
149	lwz	r27,   60(ARG0)
150	lwz	r28,   64(ARG0)
151	lwz	r29,   68(ARG0)
152	lwz	r30,   72(ARG0)
153	lwz	r31,   76(ARG0)
154
155	lwz	r0,    80(ARG0)  /* Condition register */
156	mtcr	r0		 /* Use r5 as scratch register */
157
158	lwz	r0,    84(ARG0)  /* Link register */
159	mtlr	r0
160
161	lwz	r0,    88(ARG0)  /* Fixed point exception register */
162	mtxer	r0
163
164#ifdef FLOATING_POINT_SUPPORT
165	lfd	f0,  92-4(ARG0)  /* get Floating point status register in low 32 bits of f0 */
166	mtfsf	 0xFF,f0	 /* restore FPSCR */
167
168	lfd	f14,   96(ARG0)  /* Floating point context - 8 byte aligned */
169	lfd	f15,  104(ARG0)
170	lfd	f16,  112(ARG0)
171	lfd	f17,  120(ARG0)
172	lfd	f18,  128(ARG0)
173	lfd	f19,  136(ARG0)
174	lfd	f20,  144(ARG0)
175	lfd	f21,  152(ARG0)
176	lfd	f22,  160(ARG0)
177	lfd	f23,  168(ARG0)
178	lfd	f24,  176(ARG0)
179	lfd	f25,  184(ARG0)
180	lfd	f26,  192(ARG0)
181	lfd	f27,  200(ARG0)
182	lfd	f28,  208(ARG0)
183	lfd	f29,  216(ARG0)
184	lfd	f30,  224(ARG0)
185	lfd	f31,  232(ARG0)
186
187#endif /* FLOATING_POINT_SUPPORT */
188
189
190	lwz	r1,	0(ARG0)  /* finally, restore the stack pointer */
191
192	mr.	ARG0,   ARG1     /* set the return value */
193	bnelr			 /* return if non-zero */
194
195	li	ARG0,   1
196	blr			/* never return 0, return 1 instead */
197
198