Lines Matching refs:r20
87 rlwinm r3,r20,6,26,31 // right justify opcode field (bits 0-5)
88 rlwinm r4,r20,31,22,31 // right justify extended opcode field (bits 21-30)
101 rlwinm r5,r20,11,27,29 // get (CR# * 4) from instruction
119 oris r20,r20,0x7C00 // change opcode to 31
244 lwz r20,0(r28) // fetch faulting instruction, probably with DR on
253 stw r20,savemisc2(r13) // Save the instruction image in case we notify
287 // r20 = faulting instruction
303 a64GotInstruction: // here from program interrupt with instruction in r20
304 rlwinm r21,r20,6+6,20,25 // move the primary opcode (bits 0-6) to bits 20-25
307 rlwinm r16,r20,16+3,24,28 // r16 <- RA*8
309 rlwinm r17,r20,21+3,24,28 // r17 <- RB*8 (if X-form)
311 extsh r22,r20 // r22 <- displacement (if D-form)
314 and r15,r20,r19 // instruction if X, 0 if D
338 rlwinm r21,r20,11+3,24,28 // r21 <- RT * 8
450 andc r3,r19,r20 // light bit 30 of r3 iff lwarx
500 mtcrf 0x01,r20 // move DS field to cr7
501 rlwinm r3,r20,0,30,31 // must adjust EA by subtracting DS field
519 rlwinm r3,r20,0,30,31 // must adjust EA by subtracting DS field
520 mtcrf 0x01,r20 // move DS field to cr7
533 andis. r0,r20,0x0020 // bit 10 set?
579 rlwinm r22,r20,21,27,31 // get #bytes in r22
589 rlwinm r22,r20,21,27,31 // get #bytes in r22