| /haiku/src/add-ons/accelerants/nvidia/engine/ |
| H A D | nv_dac.c | 26 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));
30 DACW(OUTPUT, (output & 0x0000feee));
39 DACW(OUTPUT, (output & 0x0000ffee));
44 DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));
47 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
49 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
66 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
69 DACW(OUTPUT, output);
71 DACW(TSTCTRL, dac);
119 DACW(NV11_DITHE
[all...] |
| H A D | nv_crtc.c | 301 DACW(FP_DEBUG1, 0);
459 DACW(FP_HVALID_S, 0);
460 DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));
462 DACW(FP_VVALID_S, 0);
463 DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));
470 DACW(FP_DEBUG2, 0x00000000);
475 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));
480 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));
494 DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
496 DACW(FP_DEBUG
[all...] |
| H A D | nv_dac2.c | 51 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
54 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
72 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
193 DACW(NV30_PLLSETUP, (DACR(NV30_PLLSETUP) & ~0x000000f0));
222 DACW(PLLSEL, 0x30000f00);
224 DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));
225 DACW(PLLSEL, 0x30000f04);
270 DACW(PLLSEL, 0x30000f00);
|
| H A D | nv_crtc2.c | 989 DACW(PLLSEL, 0x30000f00);
1028 DACW(PLLSEL, 0x100c0f00);
|
| H A D | nv_general.c | 1654 DACW(OUTPUT, 0x00000101);
1663 DACW(OUTPUT, 0x00000001);
1842 DACW(GENCTRL, 0x00100100);
1852 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff));
1856 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000));
|
| H A D | nv_info.c | 1199 // DACW(PIXPLLC2, 0x80000401);
1798 // DACW(PIXPLLC2, 0x80000401);
2545 DACW(FP_TMDS_CTRL, ((1 << 16) | 0x04));
|
| /haiku/src/add-ons/accelerants/matrox/engine/ |
| H A D | mga_crtc.c | 550 DACW(TVP_CUROVRWTADD,0x00);
552 DACW(TVP_CUROVRDATA,0xff);
553 DACW(TVP_CUROVRDATA,0xff);
554 DACW(TVP_CUROVRDATA,0xff);
556 DACW(TVP_CUROVRDATA,0xff);
557 DACW(TVP_CUROVRDATA,0xff);
558 DACW(TVP_CUROVRDATA,0xff);
560 DACW(TVP_CUROVRDATA,0x00);
561 DACW(TVP_CUROVRDATA,0x00);
562 DACW(TVP_CUROVRDAT
[all...] |
| H A D | mga_dac.c | 139 DACW(PIXRDMSK,0xff);
153 DACW(PALWTADD,0);
158 DACW(PALDATA,r[i]);
159 DACW(PALDATA,g[i]);
160 DACW(PALDATA,b[i]);
172 DACW(PALRDADD,0);
|
| /haiku/src/add-ons/accelerants/skeleton/engine/ |
| H A D | crtc.c | 175 DACW(FP_DEBUG1, 0);
333 DACW(FP_HVALID_S, 0);
334 DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));
336 DACW(FP_VVALID_S, 0);
337 DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));
344 DACW(FP_DEBUG2, 0x00000000);
349 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));
354 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));
368 DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
370 DACW(FP_DEBUG
[all...] |
| H A D | dac.c | 25 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));
27 DACW(OUTPUT, (output & 0x0000feee));
31 DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));
34 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
36 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
53 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
56 DACW(OUTPUT, output);
58 DACW(TSTCTRL, dac);
181 DACW(PIXPLLC, ((p << 16) | (n << 8) | m));
184 if (si->ps.ext_pll) DACW(PIXPLLC
[all...] |
| H A D | dac2.c | 40 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
43 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
61 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
|
| H A D | general.c | 359 DACW(OUTPUT, 0x00000101);
368 DACW(OUTPUT, 0x00000001);
544 // DACW(GENCTRL, 0x00100100);
548 // DACW(PLLSEL, 0x10000700);
549 // if (si->ps.secondary_head) DACW(PLLSEL, (DACR(PLLSEL) | 0x20000800));
554 // DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff));
|
| /haiku/src/add-ons/accelerants/via/engine/ |
| H A D | crtc.c | 165 DACW(FP_DEBUG1, 0);
322 DACW(FP_HVALID_S, 0);
323 DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));
325 DACW(FP_VVALID_S, 0);
326 DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));
333 DACW(FP_DEBUG2, 0x00000000);
338 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));
343 DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));
357 DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));
359 DACW(FP_DEBUG
[all...] |
| H A D | dac.c | 27 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));
29 DACW(OUTPUT, (output & 0x0000feee));
33 DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));
36 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
38 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
55 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
58 DACW(OUTPUT, output);
60 DACW(TSTCTRL, dac);
|
| H A D | dac2.c | 40 DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));
43 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));
61 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));
|
| H A D | general.c | 384 DACW(OUTPUT, 0x00000101);
393 DACW(OUTPUT, 0x00000001);
|
| /haiku/headers/private/graphics/matrox/ |
| H A D | mga_macros.h | 317 #define DACW(A,B) (MGA_REG8(MGADAC_##A)=B) macro
320 #define DXIR(A) (DACW(PALWTADD,MGADXI_##A),DACR(X_DATAREG))
321 #define DXIW(A,B) (DACW(PALWTADD,MGADXI_##A),DACW(X_DATAREG,B))
|
| /haiku/headers/private/graphics/skeleton/ |
| H A D | macros.h | 757 #define DACW(A,B) (ENG_RG32(ENDAC_##A)=B) macro
|
| /haiku/headers/private/graphics/via/ |
| H A D | macros.h | 826 #define DACW(A,B) (ENG_REG32(ENDAC_##A)=B) macro
|
| /haiku/headers/private/graphics/nvidia/ |
| H A D | nv_macros.h | 904 #define DACW(A,B) (NV_REG32(NVDAC_##A)=B) macro
|