Searched refs:BMCR_RESET (Results 1 - 21 of 21) sorted by relevance

/freebsd-12-stable/sys/dev/mii/
H A Dnsphyter.c228 reg = BMCR_RESET;
230 reg = BMCR_RESET | BMCR_ISO;
254 if (reg != 0 && (reg & BMCR_RESET) == 0)
H A Datphy.c168 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
301 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
365 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
H A Dnsphy.c293 reg = BMCR_RESET;
295 reg = BMCR_RESET | BMCR_ISO;
317 if (reg != 0 && (reg & BMCR_RESET) == 0)
H A Dsmcphy.c192 PHY_WRITE(sc, MII_BMCR, BMCR_RESET);
197 if ((bmcr & BMCR_RESET) == 0)
201 if (bmcr & BMCR_RESET)
H A Djmphy.c235 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
239 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
H A Dmii.h53 #define BMCR_RESET 0x8000 /* reset */ macro
H A Dmii_physubr.c340 reg = BMCR_RESET;
342 reg = BMCR_RESET | BMCR_ISO;
348 if ((reg & BMCR_RESET) == 0)
/freebsd-12-stable/sys/dev/cxgb/common/
H A Dcxgb_aq100x.c243 v &= BMCR_RESET;
264 BMCR_RESET, BMCR_ANENABLE | BMCR_ANRESTART);
341 BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART, 0);
502 v &= BMCR_RESET;
H A Dcxgb_t3_hw.c401 err = t3_mdio_change_bits(phy, mmd, MII_BMCR, BMCR_PDOWN, BMCR_RESET);
409 ctl &= BMCR_RESET;
/freebsd-12-stable/sys/dev/dme/
H A Dif_dme.c263 BMCR_RESET);
271 if ((reg & BMCR_RESET) == 0)
/freebsd-12-stable/sys/dev/usb/net/
H A Dif_smsc.c1313 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET);
1319 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
H A Dif_muge.c904 BMCR_RESET);
911 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks));
/freebsd-12-stable/sys/dev/bfe/
H A Dif_bfe.c902 bfe_writephy(sc, 0, BMCR_RESET);
905 if (val & BMCR_RESET) {
/freebsd-12-stable/sys/dev/xilinx/
H A Dif_xae.c767 BMCR_AUTOEN | BMCR_FDX | BMCR_SPEED1 | BMCR_RESET);
/freebsd-12-stable/sys/dev/age/
H A Dif_age.c411 age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);
431 BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
1390 MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
/freebsd-12-stable/sys/dev/tl/
H A Dif_tl.c937 while(tl_miibus_readreg(dev, 31, MII_BMCR) & BMCR_RESET);
/freebsd-12-stable/sys/dev/re/
H A Dif_re.c814 re_miibus_writereg(sc->rl_dev, phyaddr, MII_BMCR, BMCR_RESET);
817 if (!(status & BMCR_RESET))
/freebsd-12-stable/sys/dev/nfe/
H A Dif_nfe.c3344 MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
/freebsd-12-stable/sys/dev/ale/
H A Dif_ale.c1458 MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
/freebsd-12-stable/sys/dev/alc/
H A Dif_alc.c2480 MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
/freebsd-12-stable/sys/dev/bge/
H A Dif_bge.c3916 sc->bge_phy_addr, MII_BMCR, BMCR_RESET);

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