1/*	$NetBSD: nsphy.c,v 1.18 1999/07/14 23:57:36 thorpej Exp $	*/
2
3/*-
4 * SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-2-Clause
5 *
6 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
11 * NASA Ames Research Center.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 *    notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 *    notice, this list of conditions and the following disclaimer in the
20 *    documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/*-
36 * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 */
58
59#include <sys/cdefs.h>
60__FBSDID("$FreeBSD$");
61
62/*
63 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
64 * Data Sheet available from www.national.com
65 */
66
67#include <sys/param.h>
68#include <sys/systm.h>
69#include <sys/kernel.h>
70#include <sys/socket.h>
71#include <sys/errno.h>
72#include <sys/module.h>
73#include <sys/bus.h>
74
75#include <net/if.h>
76#include <net/if_var.h>
77#include <net/if_media.h>
78
79#include <dev/mii/mii.h>
80#include <dev/mii/miivar.h>
81#include "miidevs.h"
82
83#include <dev/mii/nsphyreg.h>
84
85#include "miibus_if.h"
86
87static int nsphy_probe(device_t);
88static int nsphy_attach(device_t);
89
90static device_method_t nsphy_methods[] = {
91	/* device interface */
92	DEVMETHOD(device_probe,		nsphy_probe),
93	DEVMETHOD(device_attach,	nsphy_attach),
94	DEVMETHOD(device_detach,	mii_phy_detach),
95	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
96	DEVMETHOD_END
97};
98
99static devclass_t nsphy_devclass;
100
101static driver_t nsphy_driver = {
102	"nsphy",
103	nsphy_methods,
104	sizeof(struct mii_softc)
105};
106
107DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
108
109static int	nsphy_service(struct mii_softc *, struct mii_data *, int);
110static void	nsphy_status(struct mii_softc *);
111static void	nsphy_reset(struct mii_softc *);
112
113static const struct mii_phydesc nsphys[] = {
114	MII_PHY_DESC(xxNATSEMI, DP83840),
115	MII_PHY_END
116};
117
118static const struct mii_phy_funcs nsphy_funcs = {
119	nsphy_service,
120	nsphy_status,
121	nsphy_reset
122};
123
124static int
125nsphy_probe(device_t dev)
126{
127
128	return (mii_phy_dev_probe(dev, nsphys, BUS_PROBE_DEFAULT));
129}
130
131static int
132nsphy_attach(device_t dev)
133{
134	u_int flags;
135
136	flags = MIIF_NOMANPAUSE;
137	/*
138	 * Am79C971 wedge when isolating all of their external PHYs.
139	 */
140	if (mii_dev_mac_match(dev,"pcn"))
141		flags |= MIIF_NOISOLATE;
142	mii_phy_dev_attach(dev, flags, &nsphy_funcs, 1);
143	return (0);
144}
145
146static int
147nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
148{
149	int reg;
150
151	switch (cmd) {
152	case MII_POLLSTAT:
153		break;
154
155	case MII_MEDIACHG:
156		reg = PHY_READ(sc, MII_NSPHY_PCR);
157
158		/*
159		 * Set up the PCR to use LED4 to indicate full-duplex
160		 * in both 10baseT and 100baseTX modes.
161		 */
162		reg |= PCR_LED4MODE;
163
164		/*
165		 * Make sure Carrier Integrity Monitor function is
166		 * disabled (normal for Node operation, but sometimes
167		 * it's not set?!)
168		 */
169		reg |= PCR_CIMDIS;
170
171		/*
172		 * Make sure "force link good" is set to normal mode.
173		 * It's only intended for debugging.
174		 */
175		reg |= PCR_FLINK100;
176
177		/*
178		 * Mystery bits which are supposedly `reserved',
179		 * but we seem to need to set them when the PHY
180		 * is connected to some interfaces:
181		 *
182		 * 0x0400 is needed for fxp
183		 *        (Intel EtherExpress Pro 10+/100B, 82557 chip)
184		 *        (nsphy with a DP83840 chip)
185		 * 0x0100 may be needed for some other card
186		 */
187		reg |= 0x0100 | 0x0400;
188
189		if (mii_phy_mac_match(sc, "fxp"))
190			PHY_WRITE(sc, MII_NSPHY_PCR, reg);
191
192		mii_phy_setmedia(sc);
193		break;
194
195	case MII_TICK:
196		if (mii_phy_tick(sc) == EJUSTRETURN)
197			return (0);
198		break;
199	}
200
201	/* Update the media status. */
202	PHY_STATUS(sc);
203
204	/* Callback if something changed. */
205	mii_phy_update(sc, cmd);
206	return (0);
207}
208
209static void
210nsphy_status(struct mii_softc *sc)
211{
212	struct mii_data *mii = sc->mii_pdata;
213	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
214	int bmsr, bmcr, par, anlpar;
215
216	mii->mii_media_status = IFM_AVALID;
217	mii->mii_media_active = IFM_ETHER;
218
219	bmsr = PHY_READ(sc, MII_BMSR) |
220	    PHY_READ(sc, MII_BMSR);
221	if (bmsr & BMSR_LINK)
222		mii->mii_media_status |= IFM_ACTIVE;
223
224	bmcr = PHY_READ(sc, MII_BMCR);
225	if (bmcr & BMCR_ISO) {
226		mii->mii_media_active |= IFM_NONE;
227		mii->mii_media_status = 0;
228		return;
229	}
230
231	if (bmcr & BMCR_LOOP)
232		mii->mii_media_active |= IFM_LOOP;
233
234	if (bmcr & BMCR_AUTOEN) {
235		/*
236		 * The PAR status bits are only valid if autonegotiation
237		 * has completed (or it's disabled).
238		 */
239		if ((bmsr & BMSR_ACOMP) == 0) {
240			/* Erg, still trying, I guess... */
241			mii->mii_media_active |= IFM_NONE;
242			return;
243		}
244
245		/*
246		 * Argh.  The PAR doesn't seem to indicate duplex mode
247		 * properly!  Determine media based on link partner's
248		 * advertised capabilities.
249		 */
250		if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
251			anlpar = PHY_READ(sc, MII_ANAR) &
252			    PHY_READ(sc, MII_ANLPAR);
253			if (anlpar & ANLPAR_TX_FD)
254				mii->mii_media_active |= IFM_100_TX|IFM_FDX;
255			else if (anlpar & ANLPAR_T4)
256				mii->mii_media_active |= IFM_100_T4|IFM_HDX;
257			else if (anlpar & ANLPAR_TX)
258				mii->mii_media_active |= IFM_100_TX|IFM_HDX;
259			else if (anlpar & ANLPAR_10_FD)
260				mii->mii_media_active |= IFM_10_T|IFM_FDX;
261			else if (anlpar & ANLPAR_10)
262				mii->mii_media_active |= IFM_10_T|IFM_HDX;
263			else
264				mii->mii_media_active |= IFM_NONE;
265			if ((mii->mii_media_active & IFM_FDX) != 0)
266				mii->mii_media_active |=
267				    mii_phy_flowstatus(sc);
268			return;
269		}
270
271		/*
272		 * Link partner is not capable of autonegotiation.
273		 * We will never be in full-duplex mode if this is
274		 * the case, so reading the PAR is OK.
275		 */
276		par = PHY_READ(sc, MII_NSPHY_PAR);
277		if (par & PAR_10)
278			mii->mii_media_active |= IFM_10_T;
279		else
280			mii->mii_media_active |= IFM_100_TX;
281		mii->mii_media_active |= IFM_HDX;
282	} else
283		mii->mii_media_active = ife->ifm_media;
284}
285
286static void
287nsphy_reset(struct mii_softc *sc)
288{
289	struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
290	int reg, i;
291
292	if (sc->mii_flags & MIIF_NOISOLATE)
293		reg = BMCR_RESET;
294	else
295		reg = BMCR_RESET | BMCR_ISO;
296	PHY_WRITE(sc, MII_BMCR, reg);
297
298	/*
299	 * It is best to allow a little time for the reset to settle
300	 * in before we start polling the BMCR again.  Notably, the
301	 * DP83840A manuals state that there should be a 500us delay
302	 * between asserting software reset and attempting MII serial
303	 * operations.  Be conservative.
304	 */
305	DELAY(1000);
306
307	/*
308	 * Wait another 2s for it to complete.
309	 * This is only a little overkill as under normal circumstances
310	 * the PHY can take up to 1s to complete reset.
311	 * This is also a bit odd because after a reset, the BMCR will
312	 * clear the reset bit and simply reports 0 even though the reset
313	 * is not yet complete.
314	 */
315	for (i = 0; i < 1000; i++) {
316		reg = PHY_READ(sc, MII_BMCR);
317		if (reg != 0 && (reg & BMCR_RESET) == 0)
318			break;
319		DELAY(2000);
320	}
321
322	if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
323		if ((ife == NULL && sc->mii_inst != 0) ||
324		    (ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
325			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
326	}
327}
328