1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2012 Ben Gray <bgray@freebsd.org>. 5 * Copyright (C) 2018 The FreeBSD Foundation. 6 * 7 * This software was developed by Arshan Khanifar <arshankhanifar@gmail.com> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD$ 32 */ 33 34#include <sys/cdefs.h> 35__FBSDID("$FreeBSD$"); 36 37/* 38 * USB-To-Ethernet adapter driver for Microchip's LAN78XX and related families. 39 * 40 * USB 3.1 to 10/100/1000 Mbps Ethernet 41 * LAN7800 http://www.microchip.com/wwwproducts/en/LAN7800 42 * 43 * USB 2.0 to 10/100/1000 Mbps Ethernet 44 * LAN7850 http://www.microchip.com/wwwproducts/en/LAN7850 45 * 46 * USB 2 to 10/100/1000 Mbps Ethernet with built-in USB hub 47 * LAN7515 (no datasheet available, but probes and functions as LAN7800) 48 * 49 * This driver is based on the if_smsc driver, with lan78xx-specific 50 * functionality modelled on Microchip's Linux lan78xx driver. 51 * 52 * UNIMPLEMENTED FEATURES 53 * ------------------ 54 * A number of features supported by the lan78xx are not yet implemented in 55 * this driver: 56 * 57 * - TX checksum offloading: Nothing has been implemented yet. 58 * - Direct address translation filtering: Implemented but untested. 59 * - VLAN tag removal. 60 * - Support for USB interrupt endpoints. 61 * - Latency Tolerance Messaging (LTM) support. 62 * - TCP LSO support. 63 * 64 */ 65 66#include <sys/param.h> 67#include <sys/bus.h> 68#include <sys/callout.h> 69#include <sys/condvar.h> 70#include <sys/kernel.h> 71#include <sys/lock.h> 72#include <sys/malloc.h> 73#include <sys/module.h> 74#include <sys/mutex.h> 75#include <sys/priv.h> 76#include <sys/queue.h> 77#include <sys/random.h> 78#include <sys/socket.h> 79#include <sys/stddef.h> 80#include <sys/stdint.h> 81#include <sys/sx.h> 82#include <sys/sysctl.h> 83#include <sys/systm.h> 84#include <sys/unistd.h> 85 86#include <net/if.h> 87#include <net/if_var.h> 88 89#include <netinet/in.h> 90#include <netinet/ip.h> 91 92#include "opt_platform.h" 93 94#ifdef FDT 95#include <dev/fdt/fdt_common.h> 96#include <dev/ofw/ofw_bus.h> 97#include <dev/ofw/ofw_bus_subr.h> 98#include <dev/usb/usb_fdt_support.h> 99#endif 100 101#include <dev/usb/usb.h> 102#include <dev/usb/usbdi.h> 103#include <dev/usb/usbdi_util.h> 104#include "usbdevs.h" 105 106#define USB_DEBUG_VAR lan78xx_debug 107#include <dev/usb/usb_debug.h> 108#include <dev/usb/usb_process.h> 109 110#include <dev/usb/net/usb_ethernet.h> 111 112#include <dev/usb/net/if_mugereg.h> 113 114#ifdef USB_DEBUG 115static int muge_debug = 0; 116 117SYSCTL_NODE(_hw_usb, OID_AUTO, muge, CTLFLAG_RW, 0, 118 "Microchip LAN78xx USB-GigE"); 119SYSCTL_INT(_hw_usb_muge, OID_AUTO, debug, CTLFLAG_RWTUN, &muge_debug, 0, 120 "Debug level"); 121#endif 122 123#define MUGE_DEFAULT_TX_CSUM_ENABLE (false) 124#define MUGE_DEFAULT_TSO_ENABLE (false) 125 126/* Supported Vendor and Product IDs. */ 127static const struct usb_device_id lan78xx_devs[] = { 128#define MUGE_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 129 MUGE_DEV(LAN7800_ETH, 0), 130 MUGE_DEV(LAN7801_ETH, 0), 131 MUGE_DEV(LAN7850_ETH, 0), 132#undef MUGE_DEV 133}; 134 135#ifdef USB_DEBUG 136#define muge_dbg_printf(sc, fmt, args...) \ 137do { \ 138 if (muge_debug > 0) \ 139 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 140} while(0) 141#else 142#define muge_dbg_printf(sc, fmt, args...) do { } while (0) 143#endif 144 145#define muge_warn_printf(sc, fmt, args...) \ 146 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 147 148#define muge_err_printf(sc, fmt, args...) \ 149 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 150 151#define ETHER_IS_ZERO(addr) \ 152 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 153 154#define ETHER_IS_VALID(addr) \ 155 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 156 157/* USB endpoints. */ 158 159enum { 160 MUGE_BULK_DT_RD, 161 MUGE_BULK_DT_WR, 162#if 0 /* Ignore interrupt endpoints for now as we poll on MII status. */ 163 MUGE_INTR_DT_WR, 164 MUGE_INTR_DT_RD, 165#endif 166 MUGE_N_TRANSFER, 167}; 168 169struct muge_softc { 170 struct usb_ether sc_ue; 171 struct mtx sc_mtx; 172 struct usb_xfer *sc_xfer[MUGE_N_TRANSFER]; 173 int sc_phyno; 174 uint32_t sc_leds; 175 uint16_t sc_led_modes; 176 uint16_t sc_led_modes_mask; 177 178 /* Settings for the mac control (MAC_CSR) register. */ 179 uint32_t sc_rfe_ctl; 180 uint32_t sc_mdix_ctl; 181 uint16_t chipid; 182 uint16_t chiprev; 183 uint32_t sc_mchash_table[ETH_DP_SEL_VHF_HASH_LEN]; 184 uint32_t sc_pfilter_table[MUGE_NUM_PFILTER_ADDRS_][2]; 185 186 uint32_t sc_flags; 187#define MUGE_FLAG_LINK 0x0001 188#define MUGE_FLAG_INIT_DONE 0x0002 189}; 190 191#define MUGE_IFACE_IDX 0 192 193#define MUGE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 194#define MUGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 195#define MUGE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 196 197static device_probe_t muge_probe; 198static device_attach_t muge_attach; 199static device_detach_t muge_detach; 200 201static usb_callback_t muge_bulk_read_callback; 202static usb_callback_t muge_bulk_write_callback; 203 204static miibus_readreg_t lan78xx_miibus_readreg; 205static miibus_writereg_t lan78xx_miibus_writereg; 206static miibus_statchg_t lan78xx_miibus_statchg; 207 208static int muge_attach_post_sub(struct usb_ether *ue); 209static uether_fn_t muge_attach_post; 210static uether_fn_t muge_init; 211static uether_fn_t muge_stop; 212static uether_fn_t muge_start; 213static uether_fn_t muge_tick; 214static uether_fn_t muge_setmulti; 215static uether_fn_t muge_setpromisc; 216 217static int muge_ifmedia_upd(struct ifnet *); 218static void muge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 219 220static int lan78xx_chip_init(struct muge_softc *sc); 221static int muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 222 223static const struct usb_config muge_config[MUGE_N_TRANSFER] = { 224 225 [MUGE_BULK_DT_WR] = { 226 .type = UE_BULK, 227 .endpoint = UE_ADDR_ANY, 228 .direction = UE_DIR_OUT, 229 .frames = 16, 230 .bufsize = 16 * (MCLBYTES + 16), 231 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 232 .callback = muge_bulk_write_callback, 233 .timeout = 10000, /* 10 seconds */ 234 }, 235 236 [MUGE_BULK_DT_RD] = { 237 .type = UE_BULK, 238 .endpoint = UE_ADDR_ANY, 239 .direction = UE_DIR_IN, 240 .bufsize = 20480, /* bytes */ 241 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 242 .callback = muge_bulk_read_callback, 243 .timeout = 0, /* no timeout */ 244 }, 245 /* 246 * The chip supports interrupt endpoints, however they aren't 247 * needed as we poll on the MII status. 248 */ 249}; 250 251static const struct usb_ether_methods muge_ue_methods = { 252 .ue_attach_post = muge_attach_post, 253 .ue_attach_post_sub = muge_attach_post_sub, 254 .ue_start = muge_start, 255 .ue_ioctl = muge_ioctl, 256 .ue_init = muge_init, 257 .ue_stop = muge_stop, 258 .ue_tick = muge_tick, 259 .ue_setmulti = muge_setmulti, 260 .ue_setpromisc = muge_setpromisc, 261 .ue_mii_upd = muge_ifmedia_upd, 262 .ue_mii_sts = muge_ifmedia_sts, 263}; 264 265/** 266 * lan78xx_read_reg - Read a 32-bit register on the device 267 * @sc: driver soft context 268 * @off: offset of the register 269 * @data: pointer a value that will be populated with the register value 270 * 271 * LOCKING: 272 * The device lock must be held before calling this function. 273 * 274 * RETURNS: 275 * 0 on success, a USB_ERR_?? error code on failure. 276 */ 277static int 278lan78xx_read_reg(struct muge_softc *sc, uint32_t off, uint32_t *data) 279{ 280 struct usb_device_request req; 281 uint32_t buf; 282 usb_error_t err; 283 284 MUGE_LOCK_ASSERT(sc, MA_OWNED); 285 286 req.bmRequestType = UT_READ_VENDOR_DEVICE; 287 req.bRequest = UVR_READ_REG; 288 USETW(req.wValue, 0); 289 USETW(req.wIndex, off); 290 USETW(req.wLength, 4); 291 292 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 293 if (err != 0) 294 muge_warn_printf(sc, "Failed to read register 0x%0x\n", off); 295 *data = le32toh(buf); 296 return (err); 297} 298 299/** 300 * lan78xx_write_reg - Write a 32-bit register on the device 301 * @sc: driver soft context 302 * @off: offset of the register 303 * @data: the 32-bit value to write into the register 304 * 305 * LOCKING: 306 * The device lock must be held before calling this function. 307 * 308 * RETURNS: 309 * 0 on success, a USB_ERR_?? error code on failure. 310 */ 311static int 312lan78xx_write_reg(struct muge_softc *sc, uint32_t off, uint32_t data) 313{ 314 struct usb_device_request req; 315 uint32_t buf; 316 usb_error_t err; 317 318 MUGE_LOCK_ASSERT(sc, MA_OWNED); 319 320 buf = htole32(data); 321 322 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 323 req.bRequest = UVR_WRITE_REG; 324 USETW(req.wValue, 0); 325 USETW(req.wIndex, off); 326 USETW(req.wLength, 4); 327 328 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 329 if (err != 0) 330 muge_warn_printf(sc, "Failed to write register 0x%0x\n", off); 331 return (err); 332} 333 334/** 335 * lan78xx_wait_for_bits - Poll on a register value until bits are cleared 336 * @sc: soft context 337 * @reg: offset of the register 338 * @bits: if the bits are clear the function returns 339 * 340 * LOCKING: 341 * The device lock must be held before calling this function. 342 * 343 * RETURNS: 344 * 0 on success, or a USB_ERR_?? error code on failure. 345 */ 346static int 347lan78xx_wait_for_bits(struct muge_softc *sc, uint32_t reg, uint32_t bits) 348{ 349 usb_ticks_t start_ticks; 350 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 351 uint32_t val; 352 int err; 353 354 MUGE_LOCK_ASSERT(sc, MA_OWNED); 355 356 start_ticks = (usb_ticks_t)ticks; 357 do { 358 if ((err = lan78xx_read_reg(sc, reg, &val)) != 0) 359 return (err); 360 if (!(val & bits)) 361 return (0); 362 uether_pause(&sc->sc_ue, hz / 100); 363 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 364 365 return (USB_ERR_TIMEOUT); 366} 367 368/** 369 * lan78xx_eeprom_read_raw - Read the attached EEPROM 370 * @sc: soft context 371 * @off: the eeprom address offset 372 * @buf: stores the bytes 373 * @buflen: the number of bytes to read 374 * 375 * Simply reads bytes from an attached eeprom. 376 * 377 * LOCKING: 378 * The function takes and releases the device lock if not already held. 379 * 380 * RETURNS: 381 * 0 on success, or a USB_ERR_?? error code on failure. 382 */ 383static int 384lan78xx_eeprom_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 385 uint16_t buflen) 386{ 387 usb_ticks_t start_ticks; 388 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 389 int err; 390 uint32_t val, saved; 391 uint16_t i; 392 bool locked; 393 394 locked = mtx_owned(&sc->sc_mtx); /* XXX */ 395 if (!locked) 396 MUGE_LOCK(sc); 397 398 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 399 /* EEDO/EECLK muxed with LED0/LED1 on LAN7800. */ 400 err = lan78xx_read_reg(sc, ETH_HW_CFG, &val); 401 saved = val; 402 403 val &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_); 404 err = lan78xx_write_reg(sc, ETH_HW_CFG, val); 405 } 406 407 err = lan78xx_wait_for_bits(sc, ETH_E2P_CMD, ETH_E2P_CMD_BUSY_); 408 if (err != 0) { 409 muge_warn_printf(sc, "eeprom busy, failed to read data\n"); 410 goto done; 411 } 412 413 /* Start reading the bytes, one at a time. */ 414 for (i = 0; i < buflen; i++) { 415 val = ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_READ_; 416 val |= (ETH_E2P_CMD_ADDR_MASK_ & (off + i)); 417 if ((err = lan78xx_write_reg(sc, ETH_E2P_CMD, val)) != 0) 418 goto done; 419 420 start_ticks = (usb_ticks_t)ticks; 421 do { 422 if ((err = lan78xx_read_reg(sc, ETH_E2P_CMD, &val)) != 423 0) 424 goto done; 425 if (!(val & ETH_E2P_CMD_BUSY_) || 426 (val & ETH_E2P_CMD_TIMEOUT_)) 427 break; 428 429 uether_pause(&sc->sc_ue, hz / 100); 430 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 431 432 if (val & (ETH_E2P_CMD_BUSY_ | ETH_E2P_CMD_TIMEOUT_)) { 433 muge_warn_printf(sc, "eeprom command failed\n"); 434 err = USB_ERR_IOERROR; 435 break; 436 } 437 438 if ((err = lan78xx_read_reg(sc, ETH_E2P_DATA, &val)) != 0) 439 goto done; 440 441 buf[i] = (val & 0xff); 442 } 443 444done: 445 if (!locked) 446 MUGE_UNLOCK(sc); 447 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_) { 448 /* Restore saved LED configuration. */ 449 lan78xx_write_reg(sc, ETH_HW_CFG, saved); 450 } 451 return (err); 452} 453 454static bool 455lan78xx_eeprom_present(struct muge_softc *sc) 456{ 457 int ret; 458 uint8_t sig; 459 460 ret = lan78xx_eeprom_read_raw(sc, ETH_E2P_INDICATOR_OFFSET, &sig, 1); 461 return (ret == 0 && sig == ETH_E2P_INDICATOR); 462} 463 464/** 465 * lan78xx_otp_read_raw 466 * @sc: soft context 467 * @off: the otp address offset 468 * @buf: stores the bytes 469 * @buflen: the number of bytes to read 470 * 471 * Simply reads bytes from the OTP. 472 * 473 * LOCKING: 474 * The function takes and releases the device lock if not already held. 475 * 476 * RETURNS: 477 * 0 on success, or a USB_ERR_?? error code on failure. 478 * 479 */ 480static int 481lan78xx_otp_read_raw(struct muge_softc *sc, uint16_t off, uint8_t *buf, 482 uint16_t buflen) 483{ 484 int err; 485 uint32_t val; 486 uint16_t i; 487 bool locked; 488 locked = mtx_owned(&sc->sc_mtx); 489 if (!locked) 490 MUGE_LOCK(sc); 491 492 err = lan78xx_read_reg(sc, OTP_PWR_DN, &val); 493 494 /* Checking if bit is set. */ 495 if (val & OTP_PWR_DN_PWRDN_N) { 496 /* Clear it, then wait for it to be cleared. */ 497 lan78xx_write_reg(sc, OTP_PWR_DN, 0); 498 err = lan78xx_wait_for_bits(sc, OTP_PWR_DN, OTP_PWR_DN_PWRDN_N); 499 if (err != 0) { 500 muge_warn_printf(sc, "OTP off? failed to read data\n"); 501 goto done; 502 } 503 } 504 /* Start reading the bytes, one at a time. */ 505 for (i = 0; i < buflen; i++) { 506 err = lan78xx_write_reg(sc, OTP_ADDR1, 507 ((off + i) >> 8) & OTP_ADDR1_15_11); 508 err = lan78xx_write_reg(sc, OTP_ADDR2, 509 ((off + i) & OTP_ADDR2_10_3)); 510 err = lan78xx_write_reg(sc, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 511 err = lan78xx_write_reg(sc, OTP_CMD_GO, OTP_CMD_GO_GO_); 512 513 err = lan78xx_wait_for_bits(sc, OTP_STATUS, OTP_STATUS_BUSY_); 514 if (err != 0) { 515 muge_warn_printf(sc, "OTP busy failed to read data\n"); 516 goto done; 517 } 518 519 if ((err = lan78xx_read_reg(sc, OTP_RD_DATA, &val)) != 0) 520 goto done; 521 522 buf[i] = (uint8_t)(val & 0xff); 523 } 524 525done: 526 if (!locked) 527 MUGE_UNLOCK(sc); 528 return (err); 529} 530 531/** 532 * lan78xx_otp_read 533 * @sc: soft context 534 * @off: the otp address offset 535 * @buf: stores the bytes 536 * @buflen: the number of bytes to read 537 * 538 * Simply reads bytes from the otp. 539 * 540 * LOCKING: 541 * The function takes and releases device lock if it is not already held. 542 * 543 * RETURNS: 544 * 0 on success, or a USB_ERR_?? error code on failure. 545 */ 546static int 547lan78xx_otp_read(struct muge_softc *sc, uint16_t off, uint8_t *buf, 548 uint16_t buflen) 549{ 550 uint8_t sig; 551 int err; 552 553 err = lan78xx_otp_read_raw(sc, OTP_INDICATOR_OFFSET, &sig, 1); 554 if (err == 0) { 555 if (sig == OTP_INDICATOR_1) { 556 } else if (sig == OTP_INDICATOR_2) { 557 off += 0x100; /* XXX */ 558 } else { 559 err = -EINVAL; 560 } 561 if (!err) 562 err = lan78xx_otp_read_raw(sc, off, buf, buflen); 563 } 564 return (err); 565} 566 567/** 568 * lan78xx_setmacaddress - Set the mac address in the device 569 * @sc: driver soft context 570 * @addr: pointer to array contain at least 6 bytes of the mac 571 * 572 * LOCKING: 573 * Should be called with the MUGE lock held. 574 * 575 * RETURNS: 576 * Returns 0 on success or a negative error code. 577 */ 578static int 579lan78xx_setmacaddress(struct muge_softc *sc, const uint8_t *addr) 580{ 581 int err; 582 uint32_t val; 583 584 muge_dbg_printf(sc, 585 "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 586 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 587 588 MUGE_LOCK_ASSERT(sc, MA_OWNED); 589 590 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 591 if ((err = lan78xx_write_reg(sc, ETH_RX_ADDRL, val)) != 0) 592 goto done; 593 594 val = (addr[5] << 8) | addr[4]; 595 err = lan78xx_write_reg(sc, ETH_RX_ADDRH, val); 596 597done: 598 return (err); 599} 600 601/** 602 * lan78xx_set_rx_max_frame_length 603 * @sc: driver soft context 604 * @size: pointer to array contain at least 6 bytes of the mac 605 * 606 * Sets the maximum frame length to be received. Frames bigger than 607 * this size are aborted. 608 * 609 * RETURNS: 610 * Returns 0 on success or a negative error code. 611 */ 612static int 613lan78xx_set_rx_max_frame_length(struct muge_softc *sc, int size) 614{ 615 int err = 0; 616 uint32_t buf; 617 bool rxenabled; 618 619 /* First we have to disable rx before changing the length. */ 620 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 621 rxenabled = ((buf & ETH_MAC_RX_EN_) != 0); 622 623 if (rxenabled) { 624 buf &= ~ETH_MAC_RX_EN_; 625 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 626 } 627 628 /* Setting max frame length. */ 629 buf &= ~ETH_MAC_RX_MAX_FR_SIZE_MASK_; 630 buf |= (((size + 4) << ETH_MAC_RX_MAX_FR_SIZE_SHIFT_) & 631 ETH_MAC_RX_MAX_FR_SIZE_MASK_); 632 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 633 634 /* If it were enabled before, we enable it back. */ 635 636 if (rxenabled) { 637 buf |= ETH_MAC_RX_EN_; 638 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 639 } 640 641 return (0); 642} 643 644/** 645 * lan78xx_miibus_readreg - Read a MII/MDIO register 646 * @dev: usb ether device 647 * @phy: the number of phy reading from 648 * @reg: the register address 649 * 650 * LOCKING: 651 * Takes and releases the device mutex lock if not already held. 652 * 653 * RETURNS: 654 * Returns the 16-bits read from the MII register, if this function fails 655 * 0 is returned. 656 */ 657static int 658lan78xx_miibus_readreg(device_t dev, int phy, int reg) 659{ 660 struct muge_softc *sc = device_get_softc(dev); 661 uint32_t addr, val; 662 bool locked; 663 664 val = 0; 665 locked = mtx_owned(&sc->sc_mtx); 666 if (!locked) 667 MUGE_LOCK(sc); 668 669 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 670 0) { 671 muge_warn_printf(sc, "MII is busy\n"); 672 goto done; 673 } 674 675 addr = (phy << 11) | (reg << 6) | 676 ETH_MII_ACC_MII_READ_ | ETH_MII_ACC_MII_BUSY_; 677 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 678 679 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 680 0) { 681 muge_warn_printf(sc, "MII read timeout\n"); 682 goto done; 683 } 684 685 lan78xx_read_reg(sc, ETH_MII_DATA, &val); 686 val = le32toh(val); 687 688done: 689 if (!locked) 690 MUGE_UNLOCK(sc); 691 692 return (val & 0xFFFF); 693} 694 695/** 696 * lan78xx_miibus_writereg - Writes a MII/MDIO register 697 * @dev: usb ether device 698 * @phy: the number of phy writing to 699 * @reg: the register address 700 * @val: the value to write 701 * 702 * Attempts to write a PHY register through the usb controller registers. 703 * 704 * LOCKING: 705 * Takes and releases the device mutex lock if not already held. 706 * 707 * RETURNS: 708 * Always returns 0 regardless of success or failure. 709 */ 710static int 711lan78xx_miibus_writereg(device_t dev, int phy, int reg, int val) 712{ 713 struct muge_softc *sc = device_get_softc(dev); 714 uint32_t addr; 715 bool locked; 716 717 if (sc->sc_phyno != phy) 718 return (0); 719 720 locked = mtx_owned(&sc->sc_mtx); 721 if (!locked) 722 MUGE_LOCK(sc); 723 724 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 725 0) { 726 muge_warn_printf(sc, "MII is busy\n"); 727 goto done; 728 } 729 730 val = htole32(val); 731 lan78xx_write_reg(sc, ETH_MII_DATA, val); 732 733 addr = (phy << 11) | (reg << 6) | 734 ETH_MII_ACC_MII_WRITE_ | ETH_MII_ACC_MII_BUSY_; 735 lan78xx_write_reg(sc, ETH_MII_ACC, addr); 736 737 if (lan78xx_wait_for_bits(sc, ETH_MII_ACC, ETH_MII_ACC_MII_BUSY_) != 0) 738 muge_warn_printf(sc, "MII write timeout\n"); 739 740done: 741 if (!locked) 742 MUGE_UNLOCK(sc); 743 return (0); 744} 745 746/* 747 * lan78xx_miibus_statchg - Called to detect phy status change 748 * @dev: usb ether device 749 * 750 * This function is called periodically by the system to poll for status 751 * changes of the link. 752 * 753 * LOCKING: 754 * Takes and releases the device mutex lock if not already held. 755 */ 756static void 757lan78xx_miibus_statchg(device_t dev) 758{ 759 struct muge_softc *sc = device_get_softc(dev); 760 struct mii_data *mii = uether_getmii(&sc->sc_ue); 761 struct ifnet *ifp; 762 int err; 763 uint32_t flow = 0; 764 uint32_t fct_flow = 0; 765 bool locked; 766 767 locked = mtx_owned(&sc->sc_mtx); 768 if (!locked) 769 MUGE_LOCK(sc); 770 771 ifp = uether_getifp(&sc->sc_ue); 772 if (mii == NULL || ifp == NULL || 773 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 774 goto done; 775 776 /* Use the MII status to determine link status */ 777 sc->sc_flags &= ~MUGE_FLAG_LINK; 778 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 779 (IFM_ACTIVE | IFM_AVALID)) { 780 muge_dbg_printf(sc, "media is active\n"); 781 switch (IFM_SUBTYPE(mii->mii_media_active)) { 782 case IFM_10_T: 783 case IFM_100_TX: 784 sc->sc_flags |= MUGE_FLAG_LINK; 785 muge_dbg_printf(sc, "10/100 ethernet\n"); 786 break; 787 case IFM_1000_T: 788 sc->sc_flags |= MUGE_FLAG_LINK; 789 muge_dbg_printf(sc, "Gigabit ethernet\n"); 790 break; 791 default: 792 break; 793 } 794 } 795 /* Lost link, do nothing. */ 796 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 797 muge_dbg_printf(sc, "link flag not set\n"); 798 goto done; 799 } 800 801 err = lan78xx_read_reg(sc, ETH_FCT_FLOW, &fct_flow); 802 if (err) { 803 muge_warn_printf(sc, 804 "failed to read initial flow control thresholds, error %d\n", 805 err); 806 goto done; 807 } 808 809 /* Enable/disable full duplex operation and TX/RX pause. */ 810 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 811 muge_dbg_printf(sc, "full duplex operation\n"); 812 813 /* Enable transmit MAC flow control function. */ 814 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 815 flow |= ETH_FLOW_CR_TX_FCEN_ | 0xFFFF; 816 817 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 818 flow |= ETH_FLOW_CR_RX_FCEN_; 819 } 820 821 /* XXX Flow control settings obtained from Microchip's driver. */ 822 switch(usbd_get_speed(sc->sc_ue.ue_udev)) { 823 case USB_SPEED_SUPER: 824 fct_flow = 0x817; 825 break; 826 case USB_SPEED_HIGH: 827 fct_flow = 0x211; 828 break; 829 default: 830 break; 831 } 832 833 err += lan78xx_write_reg(sc, ETH_FLOW, flow); 834 err += lan78xx_write_reg(sc, ETH_FCT_FLOW, fct_flow); 835 if (err) 836 muge_warn_printf(sc, "media change failed, error %d\n", err); 837 838done: 839 if (!locked) 840 MUGE_UNLOCK(sc); 841} 842 843/* 844 * lan78xx_set_mdix_auto - Configure the device to enable automatic 845 * crossover and polarity detection. LAN7800 provides HP Auto-MDIX 846 * functionality for seamless crossover and polarity detection. 847 * 848 * @sc: driver soft context 849 * 850 * LOCKING: 851 * Takes and releases the device mutex lock if not already held. 852 */ 853static void 854lan78xx_set_mdix_auto(struct muge_softc *sc) 855{ 856 uint32_t buf, err; 857 858 err = lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 859 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_1); 860 861 buf = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 862 MUGE_EXT_MODE_CTRL); 863 buf &= ~MUGE_EXT_MODE_CTRL_MDIX_MASK_; 864 buf |= MUGE_EXT_MODE_CTRL_AUTO_MDIX_; 865 866 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 867 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 868 MUGE_EXT_MODE_CTRL, buf); 869 870 err += lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 871 MUGE_EXT_PAGE_ACCESS, MUGE_EXT_PAGE_SPACE_0); 872 873 if (err != 0) 874 muge_warn_printf(sc, "error setting PHY's MDIX status\n"); 875 876 sc->sc_mdix_ctl = buf; 877} 878 879/** 880 * lan78xx_phy_init - Initialises the in-built MUGE phy 881 * @sc: driver soft context 882 * 883 * Resets the PHY part of the chip and then initialises it to default 884 * values. The 'link down' and 'auto-negotiation complete' interrupts 885 * from the PHY are also enabled, however we don't monitor the interrupt 886 * endpoints for the moment. 887 * 888 * RETURNS: 889 * Returns 0 on success or EIO if failed to reset the PHY. 890 */ 891static int 892lan78xx_phy_init(struct muge_softc *sc) 893{ 894 muge_dbg_printf(sc, "Initializing PHY.\n"); 895 uint16_t bmcr, lmsr; 896 usb_ticks_t start_ticks; 897 uint32_t hw_reg; 898 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 899 900 MUGE_LOCK_ASSERT(sc, MA_OWNED); 901 902 /* Reset phy and wait for reset to complete. */ 903 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, 904 BMCR_RESET); 905 906 start_ticks = ticks; 907 do { 908 uether_pause(&sc->sc_ue, hz / 100); 909 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 910 MII_BMCR); 911 } while ((bmcr & BMCR_RESET) && ((ticks - start_ticks) < max_ticks)); 912 913 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 914 muge_err_printf(sc, "PHY reset timed-out\n"); 915 return (EIO); 916 } 917 918 /* Setup phy to interrupt upon link down or autoneg completion. */ 919 lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 920 MUGE_PHY_INTR_STAT); 921 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 922 MUGE_PHY_INTR_MASK, 923 (MUGE_PHY_INTR_ANEG_COMP | MUGE_PHY_INTR_LINK_CHANGE)); 924 925 /* Enable Auto-MDIX for crossover and polarity detection. */ 926 lan78xx_set_mdix_auto(sc); 927 928 /* Enable all modes. */ 929 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 930 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | 931 ANAR_CSMA | ANAR_FC | ANAR_PAUSE_ASYM); 932 933 /* Restart auto-negotation. */ 934 bmcr |= BMCR_STARTNEG; 935 bmcr |= BMCR_AUTOEN; 936 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 937 bmcr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 938 939 /* Configure LED Modes. */ 940 if (sc->sc_led_modes_mask != 0) { 941 lmsr = lan78xx_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, 942 MUGE_PHY_LED_MODE); 943 lmsr &= ~sc->sc_led_modes_mask; 944 lmsr |= sc->sc_led_modes; 945 lan78xx_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, 946 MUGE_PHY_LED_MODE, lmsr); 947 } 948 949 /* Enable appropriate LEDs. */ 950 if (sc->sc_leds != 0 && 951 lan78xx_read_reg(sc, ETH_HW_CFG, &hw_reg) == 0) { 952 hw_reg &= ~(ETH_HW_CFG_LEDO_EN_ | ETH_HW_CFG_LED1_EN_ | 953 ETH_HW_CFG_LED2_EN_ | ETH_HW_CFG_LED3_EN_ ); 954 hw_reg |= sc->sc_leds; 955 lan78xx_write_reg(sc, ETH_HW_CFG, hw_reg); 956 } 957 return (0); 958} 959 960/** 961 * lan78xx_chip_init - Initialises the chip after power on 962 * @sc: driver soft context 963 * 964 * This initialisation sequence is modelled on the procedure in the Linux 965 * driver. 966 * 967 * RETURNS: 968 * Returns 0 on success or an error code on failure. 969 */ 970static int 971lan78xx_chip_init(struct muge_softc *sc) 972{ 973 int err; 974 uint32_t buf; 975 uint32_t burst_cap; 976 977 MUGE_LOCK_ASSERT(sc, MA_OWNED); 978 979 /* Enter H/W config mode. */ 980 lan78xx_write_reg(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_); 981 982 if ((err = lan78xx_wait_for_bits(sc, ETH_HW_CFG, ETH_HW_CFG_LRST_)) != 983 0) { 984 muge_warn_printf(sc, 985 "timed-out waiting for lite reset to complete\n"); 986 goto init_failed; 987 } 988 989 /* Set the mac address. */ 990 if ((err = lan78xx_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 991 muge_warn_printf(sc, "failed to set the MAC address\n"); 992 goto init_failed; 993 } 994 995 /* Read and display the revision register. */ 996 if ((err = lan78xx_read_reg(sc, ETH_ID_REV, &buf)) < 0) { 997 muge_warn_printf(sc, "failed to read ETH_ID_REV (err = %d)\n", 998 err); 999 goto init_failed; 1000 } 1001 sc->chipid = (buf & ETH_ID_REV_CHIP_ID_MASK_) >> 16; 1002 sc->chiprev = buf & ETH_ID_REV_CHIP_REV_MASK_; 1003 switch (sc->chipid) { 1004 case ETH_ID_REV_CHIP_ID_7800_: 1005 case ETH_ID_REV_CHIP_ID_7850_: 1006 break; 1007 default: 1008 muge_warn_printf(sc, "Chip ID 0x%04x not yet supported\n", 1009 sc->chipid); 1010 goto init_failed; 1011 } 1012 device_printf(sc->sc_ue.ue_dev, "Chip ID 0x%04x rev %04x\n", sc->chipid, 1013 sc->chiprev); 1014 1015 /* Respond to BULK-IN tokens with a NAK when RX FIFO is empty. */ 1016 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) != 0) { 1017 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", err); 1018 goto init_failed; 1019 } 1020 buf |= ETH_USB_CFG_BIR_; 1021 lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1022 1023 /* 1024 * XXX LTM support will go here. 1025 */ 1026 1027 /* Configuring the burst cap. */ 1028 switch (usbd_get_speed(sc->sc_ue.ue_udev)) { 1029 case USB_SPEED_SUPER: 1030 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_SS_USB_PKT_SIZE; 1031 break; 1032 case USB_SPEED_HIGH: 1033 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_HS_USB_PKT_SIZE; 1034 break; 1035 default: 1036 burst_cap = MUGE_DEFAULT_BURST_CAP_SIZE/MUGE_FS_USB_PKT_SIZE; 1037 } 1038 1039 lan78xx_write_reg(sc, ETH_BURST_CAP, burst_cap); 1040 1041 /* Set the default bulk in delay (same value from Linux driver). */ 1042 lan78xx_write_reg(sc, ETH_BULK_IN_DLY, MUGE_DEFAULT_BULK_IN_DELAY); 1043 1044 /* Multiple ethernet frames per USB packets. */ 1045 err = lan78xx_read_reg(sc, ETH_HW_CFG, &buf); 1046 buf |= ETH_HW_CFG_MEF_; 1047 err = lan78xx_write_reg(sc, ETH_HW_CFG, buf); 1048 1049 /* Enable burst cap. */ 1050 if ((err = lan78xx_read_reg(sc, ETH_USB_CFG0, &buf)) < 0) { 1051 muge_warn_printf(sc, "failed to read ETH_USB_CFG0 (err=%d)\n", 1052 err); 1053 goto init_failed; 1054 } 1055 buf |= ETH_USB_CFG_BCE_; 1056 err = lan78xx_write_reg(sc, ETH_USB_CFG0, buf); 1057 1058 /* 1059 * Set FCL's RX and TX FIFO sizes: according to data sheet this is 1060 * already the default value. But we initialize it to the same value 1061 * anyways, as that's what the Linux driver does. 1062 * 1063 */ 1064 buf = (MUGE_MAX_RX_FIFO_SIZE - 512) / 512; 1065 err = lan78xx_write_reg(sc, ETH_FCT_RX_FIFO_END, buf); 1066 1067 buf = (MUGE_MAX_TX_FIFO_SIZE - 512) / 512; 1068 err = lan78xx_write_reg(sc, ETH_FCT_TX_FIFO_END, buf); 1069 1070 /* Enabling interrupts. (Not using them for now) */ 1071 err = lan78xx_write_reg(sc, ETH_INT_STS, ETH_INT_STS_CLEAR_ALL_); 1072 1073 /* 1074 * Initializing flow control registers to 0. These registers are 1075 * properly set is handled in link-reset function in the Linux driver. 1076 */ 1077 err = lan78xx_write_reg(sc, ETH_FLOW, 0); 1078 err = lan78xx_write_reg(sc, ETH_FCT_FLOW, 0); 1079 1080 /* 1081 * Settings for the RFE, we enable broadcast and destination address 1082 * perfect filtering. 1083 */ 1084 err = lan78xx_read_reg(sc, ETH_RFE_CTL, &buf); 1085 buf |= ETH_RFE_CTL_BCAST_EN_ | ETH_RFE_CTL_DA_PERFECT_; 1086 err = lan78xx_write_reg(sc, ETH_RFE_CTL, buf); 1087 1088 /* 1089 * At this point the Linux driver writes multicast tables, and enables 1090 * checksum engines. But in FreeBSD that gets done in muge_init, 1091 * which gets called when the interface is brought up. 1092 */ 1093 1094 /* Reset the PHY. */ 1095 lan78xx_write_reg(sc, ETH_PMT_CTL, ETH_PMT_CTL_PHY_RST_); 1096 if ((err = lan78xx_wait_for_bits(sc, ETH_PMT_CTL, 1097 ETH_PMT_CTL_PHY_RST_)) != 0) { 1098 muge_warn_printf(sc, 1099 "timed-out waiting for phy reset to complete\n"); 1100 goto init_failed; 1101 } 1102 1103 err = lan78xx_read_reg(sc, ETH_MAC_CR, &buf); 1104 if (sc->chipid == ETH_ID_REV_CHIP_ID_7800_ && 1105 !lan78xx_eeprom_present(sc)) { 1106 /* Set automatic duplex and speed on LAN7800 without EEPROM. */ 1107 buf |= ETH_MAC_CR_AUTO_DUPLEX_ | ETH_MAC_CR_AUTO_SPEED_; 1108 } 1109 err = lan78xx_write_reg(sc, ETH_MAC_CR, buf); 1110 1111 /* 1112 * Enable PHY interrupts (Not really getting used for now) 1113 * ETH_INT_EP_CTL: interrupt endpoint control register 1114 * phy events cause interrupts to be issued 1115 */ 1116 err = lan78xx_read_reg(sc, ETH_INT_EP_CTL, &buf); 1117 buf |= ETH_INT_ENP_PHY_INT; 1118 err = lan78xx_write_reg(sc, ETH_INT_EP_CTL, buf); 1119 1120 /* 1121 * Enables mac's transmitter. It will transmit frames from the buffer 1122 * onto the cable. 1123 */ 1124 err = lan78xx_read_reg(sc, ETH_MAC_TX, &buf); 1125 buf |= ETH_MAC_TX_TXEN_; 1126 err = lan78xx_write_reg(sc, ETH_MAC_TX, buf); 1127 1128 /* FIFO is capable of transmitting frames to MAC. */ 1129 err = lan78xx_read_reg(sc, ETH_FCT_TX_CTL, &buf); 1130 buf |= ETH_FCT_TX_CTL_EN_; 1131 err = lan78xx_write_reg(sc, ETH_FCT_TX_CTL, buf); 1132 1133 /* 1134 * Set max frame length. In linux this is dev->mtu (which by default 1135 * is 1500) + VLAN_ETH_HLEN = 1518. 1136 */ 1137 err = lan78xx_set_rx_max_frame_length(sc, ETHER_MAX_LEN); 1138 1139 /* Initialise the PHY. */ 1140 if ((err = lan78xx_phy_init(sc)) != 0) 1141 goto init_failed; 1142 1143 /* Enable MAC RX. */ 1144 err = lan78xx_read_reg(sc, ETH_MAC_RX, &buf); 1145 buf |= ETH_MAC_RX_EN_; 1146 err = lan78xx_write_reg(sc, ETH_MAC_RX, buf); 1147 1148 /* Enable FIFO controller RX. */ 1149 err = lan78xx_read_reg(sc, ETH_FCT_RX_CTL, &buf); 1150 buf |= ETH_FCT_TX_CTL_EN_; 1151 err = lan78xx_write_reg(sc, ETH_FCT_RX_CTL, buf); 1152 1153 sc->sc_flags |= MUGE_FLAG_INIT_DONE; 1154 return (0); 1155 1156init_failed: 1157 muge_err_printf(sc, "lan78xx_chip_init failed (err=%d)\n", err); 1158 return (err); 1159} 1160 1161static void 1162muge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 1163{ 1164 struct muge_softc *sc = usbd_xfer_softc(xfer); 1165 struct usb_ether *ue = &sc->sc_ue; 1166 struct ifnet *ifp = uether_getifp(ue); 1167 struct mbuf *m; 1168 struct usb_page_cache *pc; 1169 uint32_t rx_cmd_a, rx_cmd_b; 1170 uint16_t rx_cmd_c; 1171 int pktlen; 1172 int off; 1173 int actlen; 1174 1175 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 1176 muge_dbg_printf(sc, "rx : actlen %d\n", actlen); 1177 1178 switch (USB_GET_STATE(xfer)) { 1179 case USB_ST_TRANSFERRED: 1180 /* 1181 * There is always a zero length frame after bringing the 1182 * interface up. 1183 */ 1184 if (actlen < (sizeof(rx_cmd_a) + ETHER_CRC_LEN)) 1185 goto tr_setup; 1186 1187 /* 1188 * There may be multiple packets in the USB frame. Each will 1189 * have a header and each needs to have its own mbuf allocated 1190 * and populated for it. 1191 */ 1192 pc = usbd_xfer_get_frame(xfer, 0); 1193 off = 0; 1194 1195 while (off < actlen) { 1196 /* The frame header is aligned on a 4 byte boundary. */ 1197 off = ((off + 0x3) & ~0x3); 1198 1199 /* Extract RX CMD A. */ 1200 if (off + sizeof(rx_cmd_a) > actlen) 1201 goto tr_setup; 1202 usbd_copy_out(pc, off, &rx_cmd_a, sizeof(rx_cmd_a)); 1203 off += (sizeof(rx_cmd_a)); 1204 rx_cmd_a = le32toh(rx_cmd_a); 1205 1206 /* Extract RX CMD B. */ 1207 if (off + sizeof(rx_cmd_b) > actlen) 1208 goto tr_setup; 1209 usbd_copy_out(pc, off, &rx_cmd_b, sizeof(rx_cmd_b)); 1210 off += (sizeof(rx_cmd_b)); 1211 rx_cmd_b = le32toh(rx_cmd_b); 1212 1213 /* Extract RX CMD C. */ 1214 if (off + sizeof(rx_cmd_c) > actlen) 1215 goto tr_setup; 1216 usbd_copy_out(pc, off, &rx_cmd_c, sizeof(rx_cmd_c)); 1217 off += (sizeof(rx_cmd_c)); 1218 rx_cmd_c = le16toh(rx_cmd_c); 1219 1220 if (off > actlen) 1221 goto tr_setup; 1222 1223 pktlen = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 1224 1225 muge_dbg_printf(sc, 1226 "rx_cmd_a 0x%08x rx_cmd_b 0x%08x rx_cmd_c 0x%04x " 1227 " pktlen %d actlen %d off %d\n", 1228 rx_cmd_a, rx_cmd_b, rx_cmd_c, pktlen, actlen, off); 1229 1230 if (rx_cmd_a & RX_CMD_A_RED_) { 1231 muge_dbg_printf(sc, 1232 "rx error (hdr 0x%08x)\n", rx_cmd_a); 1233 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); 1234 } else { 1235 /* Ethernet frame too big or too small? */ 1236 if ((pktlen < ETHER_HDR_LEN) || 1237 (pktlen > (actlen - off))) 1238 goto tr_setup; 1239 1240 /* Create a new mbuf to store the packet. */ 1241 m = uether_newbuf(); 1242 if (m == NULL) { 1243 muge_warn_printf(sc, 1244 "failed to create new mbuf\n"); 1245 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1246 1); 1247 goto tr_setup; 1248 } 1249 if (pktlen > m->m_len) { 1250 muge_dbg_printf(sc, 1251 "buffer too small %d vs %d bytes", 1252 pktlen, m->m_len); 1253 if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); 1254 m_freem(m); 1255 goto tr_setup; 1256 } 1257 usbd_copy_out(pc, off, mtod(m, uint8_t *), 1258 pktlen); 1259 1260 /* 1261 * Check if RX checksums are computed, and 1262 * offload them 1263 */ 1264 if ((ifp->if_capenable & IFCAP_RXCSUM) && 1265 !(rx_cmd_a & RX_CMD_A_ICSM_)) { 1266 struct ether_header *eh; 1267 eh = mtod(m, struct ether_header *); 1268 /* 1269 * Remove the extra 2 bytes of the csum 1270 * 1271 * The checksum appears to be 1272 * simplistically calculated over the 1273 * protocol headers up to the end of the 1274 * eth frame. Which means if the eth 1275 * frame is padded the csum calculation 1276 * is incorrectly performed over the 1277 * padding bytes as well. Therefore to 1278 * be safe we ignore the H/W csum on 1279 * frames less than or equal to 1280 * 64 bytes. 1281 * 1282 * Protocols checksummed: 1283 * TCP, UDP, ICMP, IGMP, IP 1284 */ 1285 if (pktlen > ETHER_MIN_LEN) { 1286 m->m_pkthdr.csum_flags |= 1287 CSUM_DATA_VALID | 1288 CSUM_PSEUDO_HDR; 1289 1290 /* 1291 * Copy the checksum from the 1292 * last 2 bytes of the transfer 1293 * and put in the csum_data 1294 * field. 1295 */ 1296 usbd_copy_out(pc, 1297 (off + pktlen), 1298 &m->m_pkthdr.csum_data, 2); 1299 1300 /* 1301 * The data is copied in network 1302 * order, but the csum algorithm 1303 * in the kernel expects it to 1304 * be in host network order. 1305 */ 1306 m->m_pkthdr.csum_data = 1307 ntohs(0xffff); 1308 1309 muge_dbg_printf(sc, 1310 "RX checksum offloaded (0x%04x)\n", 1311 m->m_pkthdr.csum_data); 1312 } 1313 } 1314 1315 /* Enqueue the mbuf on the receive queue. */ 1316 if (pktlen < (4 + ETHER_HDR_LEN)) { 1317 m_freem(m); 1318 goto tr_setup; 1319 } 1320 /* Remove 4 trailing bytes */ 1321 uether_rxmbuf(ue, m, pktlen - 4); 1322 } 1323 1324 /* 1325 * Update the offset to move to the next potential 1326 * packet. 1327 */ 1328 off += pktlen; 1329 } 1330 /* FALLTHROUGH */ 1331 case USB_ST_SETUP: 1332tr_setup: 1333 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1334 usbd_transfer_submit(xfer); 1335 uether_rxflush(ue); 1336 return; 1337 default: 1338 if (error != USB_ERR_CANCELLED) { 1339 muge_warn_printf(sc, "bulk read error, %s\n", 1340 usbd_errstr(error)); 1341 usbd_xfer_set_stall(xfer); 1342 goto tr_setup; 1343 } 1344 return; 1345 } 1346} 1347 1348/** 1349 * muge_bulk_write_callback - Write callback used to send ethernet frame(s) 1350 * @xfer: the USB transfer 1351 * @error: error code if the transfers is in an errored state 1352 * 1353 * The main write function that pulls ethernet frames off the queue and 1354 * sends them out. 1355 * 1356 */ 1357static void 1358muge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1359{ 1360 struct muge_softc *sc = usbd_xfer_softc(xfer); 1361 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1362 struct usb_page_cache *pc; 1363 struct mbuf *m; 1364 int nframes; 1365 uint32_t frm_len = 0, tx_cmd_a = 0, tx_cmd_b = 0; 1366 1367 switch (USB_GET_STATE(xfer)) { 1368 case USB_ST_TRANSFERRED: 1369 muge_dbg_printf(sc, 1370 "USB TRANSFER status: USB_ST_TRANSFERRED\n"); 1371 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1372 /* FALLTHROUGH */ 1373 case USB_ST_SETUP: 1374 muge_dbg_printf(sc, "USB TRANSFER status: USB_ST_SETUP\n"); 1375tr_setup: 1376 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0 || 1377 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1378 muge_dbg_printf(sc, 1379 "sc->sc_flags & MUGE_FLAG_LINK: %d\n", 1380 (sc->sc_flags & MUGE_FLAG_LINK)); 1381 muge_dbg_printf(sc, 1382 "ifp->if_drv_flags & IFF_DRV_OACTIVE: %d\n", 1383 (ifp->if_drv_flags & IFF_DRV_OACTIVE)); 1384 muge_dbg_printf(sc, 1385 "USB TRANSFER not sending: no link or controller is busy \n"); 1386 /* 1387 * Don't send anything if there is no link or 1388 * controller is busy. 1389 */ 1390 return; 1391 } 1392 for (nframes = 0; 1393 nframes < 16 && !IFQ_DRV_IS_EMPTY(&ifp->if_snd); 1394 nframes++) { 1395 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1396 if (m == NULL) 1397 break; 1398 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1399 nframes); 1400 frm_len = 0; 1401 pc = usbd_xfer_get_frame(xfer, nframes); 1402 1403 /* 1404 * Each frame is prefixed with two 32-bit values 1405 * describing the length of the packet and buffer. 1406 */ 1407 tx_cmd_a = (m->m_pkthdr.len & TX_CMD_A_LEN_MASK_) | 1408 TX_CMD_A_FCS_; 1409 tx_cmd_a = htole32(tx_cmd_a); 1410 usbd_copy_in(pc, 0, &tx_cmd_a, sizeof(tx_cmd_a)); 1411 1412 tx_cmd_b = 0; 1413 1414 /* TCP LSO Support will probably be implemented here. */ 1415 tx_cmd_b = htole32(tx_cmd_b); 1416 usbd_copy_in(pc, 4, &tx_cmd_b, sizeof(tx_cmd_b)); 1417 1418 frm_len += 8; 1419 1420 /* Next copy in the actual packet */ 1421 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1422 frm_len += m->m_pkthdr.len; 1423 1424 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); 1425 1426 /* 1427 * If there's a BPF listener, bounce a copy of this 1428 * frame to it. 1429 */ 1430 BPF_MTAP(ifp, m); 1431 m_freem(m); 1432 1433 /* Set frame length. */ 1434 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1435 } 1436 1437 muge_dbg_printf(sc, "USB TRANSFER nframes: %d\n", nframes); 1438 if (nframes != 0) { 1439 muge_dbg_printf(sc, "USB TRANSFER submit attempt\n"); 1440 usbd_xfer_set_frames(xfer, nframes); 1441 usbd_transfer_submit(xfer); 1442 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1443 } 1444 return; 1445 1446 default: 1447 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); 1448 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1449 1450 if (error != USB_ERR_CANCELLED) { 1451 muge_err_printf(sc, 1452 "usb error on tx: %s\n", usbd_errstr(error)); 1453 usbd_xfer_set_stall(xfer); 1454 goto tr_setup; 1455 } 1456 return; 1457 } 1458} 1459 1460/** 1461 * muge_set_mac_addr - Initiailizes NIC MAC address 1462 * @ue: the USB ethernet device 1463 * 1464 * Tries to obtain MAC address from number of sources: registers, 1465 * EEPROM, DTB blob. If all sources fail - generates random MAC. 1466 */ 1467static void 1468muge_set_mac_addr(struct usb_ether *ue) 1469{ 1470 struct muge_softc *sc = uether_getsc(ue); 1471 uint32_t mac_h, mac_l; 1472 1473 memset(ue->ue_eaddr, 0xff, ETHER_ADDR_LEN); 1474 1475 uint32_t val; 1476 lan78xx_read_reg(sc, 0, &val); 1477 1478 /* Read current MAC address from RX_ADDRx registers. */ 1479 if ((lan78xx_read_reg(sc, ETH_RX_ADDRL, &mac_l) == 0) && 1480 (lan78xx_read_reg(sc, ETH_RX_ADDRH, &mac_h) == 0)) { 1481 ue->ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1482 ue->ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1483 ue->ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1484 ue->ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1485 ue->ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1486 ue->ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1487 } 1488 1489 /* 1490 * If RX_ADDRx did not provide a valid MAC address, try EEPROM. If that 1491 * doesn't work, try OTP. Whether any of these methods work or not, try 1492 * FDT data, because it is allowed to override the EEPROM/OTP values. 1493 */ 1494 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1495 muge_dbg_printf(sc, "MAC assigned from registers\n"); 1496 } else if (lan78xx_eeprom_present(sc) && lan78xx_eeprom_read_raw(sc, 1497 ETH_E2P_MAC_OFFSET, ue->ue_eaddr, ETHER_ADDR_LEN) == 0 && 1498 ETHER_IS_VALID(ue->ue_eaddr)) { 1499 muge_dbg_printf(sc, "MAC assigned from EEPROM\n"); 1500 } else if (lan78xx_otp_read(sc, OTP_MAC_OFFSET, ue->ue_eaddr, 1501 ETHER_ADDR_LEN) == 0 && ETHER_IS_VALID(ue->ue_eaddr)) { 1502 muge_dbg_printf(sc, "MAC assigned from OTP\n"); 1503 } 1504 1505#ifdef FDT 1506 /* ue->ue_eaddr modified only if config exists for this dev instance. */ 1507 usb_fdt_get_mac_addr(ue->ue_dev, ue); 1508 if (ETHER_IS_VALID(ue->ue_eaddr)) { 1509 muge_dbg_printf(sc, "MAC assigned from FDT data\n"); 1510 } 1511#endif 1512 1513 if (!ETHER_IS_VALID(ue->ue_eaddr)) { 1514 muge_dbg_printf(sc, "MAC assigned randomly\n"); 1515 arc4rand(ue->ue_eaddr, ETHER_ADDR_LEN, 0); 1516 ue->ue_eaddr[0] &= ~0x01; /* unicast */ 1517 ue->ue_eaddr[0] |= 0x02; /* locally administered */ 1518 } 1519} 1520 1521/** 1522 * muge_set_leds - Initializes NIC LEDs pattern 1523 * @ue: the USB ethernet device 1524 * 1525 * Tries to store the LED modes. 1526 * Supports only DTB blob like the Linux driver does. 1527 */ 1528static void 1529muge_set_leds(struct usb_ether *ue) 1530{ 1531#ifdef FDT 1532 struct muge_softc *sc = uether_getsc(ue); 1533 phandle_t node; 1534 pcell_t modes[4]; /* 4 LEDs are possible */ 1535 ssize_t proplen; 1536 uint32_t count; 1537 1538 if ((node = usb_fdt_get_node(ue->ue_dev, ue->ue_udev)) != -1 && 1539 (proplen = OF_getencprop(node, "microchip,led-modes", modes, 1540 sizeof(modes))) > 0) { 1541 count = proplen / sizeof( uint32_t ); 1542 sc->sc_leds = (count > 0) * ETH_HW_CFG_LEDO_EN_ | 1543 (count > 1) * ETH_HW_CFG_LED1_EN_ | 1544 (count > 2) * ETH_HW_CFG_LED2_EN_ | 1545 (count > 3) * ETH_HW_CFG_LED3_EN_; 1546 while (count-- > 0) { 1547 sc->sc_led_modes |= (modes[count] & 0xf) << (4 * count); 1548 sc->sc_led_modes_mask |= 0xf << (4 * count); 1549 } 1550 muge_dbg_printf(sc, "LED modes set from FDT data\n"); 1551 } 1552#endif 1553} 1554 1555/** 1556 * muge_attach_post - Called after the driver attached to the USB interface 1557 * @ue: the USB ethernet device 1558 * 1559 * This is where the chip is intialised for the first time. This is 1560 * different from the muge_init() function in that that one is designed to 1561 * setup the H/W to match the UE settings and can be called after a reset. 1562 * 1563 */ 1564static void 1565muge_attach_post(struct usb_ether *ue) 1566{ 1567 struct muge_softc *sc = uether_getsc(ue); 1568 1569 muge_dbg_printf(sc, "Calling muge_attach_post.\n"); 1570 1571 /* Setup some of the basics */ 1572 sc->sc_phyno = 1; 1573 1574 muge_set_mac_addr(ue); 1575 muge_set_leds(ue); 1576 1577 /* Initialise the chip for the first time */ 1578 lan78xx_chip_init(sc); 1579} 1580 1581/** 1582 * muge_attach_post_sub - Called after attach to the USB interface 1583 * @ue: the USB ethernet device 1584 * 1585 * Most of this is boilerplate code and copied from the base USB ethernet 1586 * driver. It has been overriden so that we can indicate to the system 1587 * that the chip supports H/W checksumming. 1588 * 1589 * RETURNS: 1590 * Returns 0 on success or a negative error code. 1591 */ 1592static int 1593muge_attach_post_sub(struct usb_ether *ue) 1594{ 1595 struct muge_softc *sc; 1596 struct ifnet *ifp; 1597 int error; 1598 1599 sc = uether_getsc(ue); 1600 muge_dbg_printf(sc, "Calling muge_attach_post_sub.\n"); 1601 ifp = ue->ue_ifp; 1602 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1603 ifp->if_start = uether_start; 1604 ifp->if_ioctl = muge_ioctl; 1605 ifp->if_init = uether_init; 1606 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1607 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1608 IFQ_SET_READY(&ifp->if_snd); 1609 1610 /* 1611 * The chip supports TCP/UDP checksum offloading on TX and RX paths, 1612 * however currently only RX checksum is supported in the driver 1613 * (see top of file). 1614 */ 1615 ifp->if_capabilities |= IFCAP_VLAN_MTU; 1616 ifp->if_hwassist = 0; 1617 ifp->if_capabilities |= IFCAP_RXCSUM; 1618 1619 if (MUGE_DEFAULT_TX_CSUM_ENABLE) 1620 ifp->if_capabilities |= IFCAP_TXCSUM; 1621 1622 /* 1623 * In the Linux driver they also enable scatter/gather (NETIF_F_SG) 1624 * here, that's something related to socket buffers used in Linux. 1625 * FreeBSD doesn't have that as an interface feature. 1626 */ 1627 if (MUGE_DEFAULT_TSO_ENABLE) 1628 ifp->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6; 1629 1630#if 0 1631 /* TX checksuming is disabled since not yet implemented. */ 1632 ifp->if_capabilities |= IFCAP_TXCSUM; 1633 ifp->if_capenable |= IFCAP_TXCSUM; 1634 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1635#endif 1636 1637 ifp->if_capenable = ifp->if_capabilities; 1638 1639 mtx_lock(&Giant); 1640 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, uether_ifmedia_upd, 1641 ue->ue_methods->ue_mii_sts, BMSR_DEFCAPMASK, sc->sc_phyno, 1642 MII_OFFSET_ANY, 0); 1643 mtx_unlock(&Giant); 1644 1645 return (0); 1646} 1647 1648/** 1649 * muge_start - Starts communication with the LAN78xx chip 1650 * @ue: USB ether interface 1651 */ 1652static void 1653muge_start(struct usb_ether *ue) 1654{ 1655 struct muge_softc *sc = uether_getsc(ue); 1656 1657 /* 1658 * Start the USB transfers, if not already started. 1659 */ 1660 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_RD]); 1661 usbd_transfer_start(sc->sc_xfer[MUGE_BULK_DT_WR]); 1662} 1663 1664/** 1665 * muge_ioctl - ioctl function for the device 1666 * @ifp: interface pointer 1667 * @cmd: the ioctl command 1668 * @data: data passed in the ioctl call, typically a pointer to struct 1669 * ifreq. 1670 * 1671 * The ioctl routine is overridden to detect change requests for the H/W 1672 * checksum capabilities. 1673 * 1674 * RETURNS: 1675 * 0 on success and an error code on failure. 1676 */ 1677static int 1678muge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1679{ 1680 struct usb_ether *ue = ifp->if_softc; 1681 struct muge_softc *sc; 1682 struct ifreq *ifr; 1683 int rc; 1684 int mask; 1685 int reinit; 1686 1687 if (cmd == SIOCSIFCAP) { 1688 sc = uether_getsc(ue); 1689 ifr = (struct ifreq *)data; 1690 1691 MUGE_LOCK(sc); 1692 1693 rc = 0; 1694 reinit = 0; 1695 1696 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1697 1698 /* Modify the RX CSUM enable bits. */ 1699 if ((mask & IFCAP_RXCSUM) != 0 && 1700 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1701 ifp->if_capenable ^= IFCAP_RXCSUM; 1702 1703 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1704 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1705 reinit = 1; 1706 } 1707 } 1708 1709 MUGE_UNLOCK(sc); 1710 if (reinit) 1711 uether_init(ue); 1712 } else { 1713 rc = uether_ioctl(ifp, cmd, data); 1714 } 1715 1716 return (rc); 1717} 1718 1719/** 1720 * muge_reset - Reset the SMSC chip 1721 * @sc: device soft context 1722 * 1723 * LOCKING: 1724 * Should be called with the SMSC lock held. 1725 */ 1726static void 1727muge_reset(struct muge_softc *sc) 1728{ 1729 struct usb_config_descriptor *cd; 1730 usb_error_t err; 1731 1732 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 1733 1734 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 1735 cd->bConfigurationValue); 1736 if (err) 1737 muge_warn_printf(sc, "reset failed (ignored)\n"); 1738 1739 /* Wait a little while for the chip to get its brains in order. */ 1740 uether_pause(&sc->sc_ue, hz / 100); 1741 1742 /* Reinitialize controller to achieve full reset. */ 1743 lan78xx_chip_init(sc); 1744} 1745 1746/** 1747 * muge_set_addr_filter 1748 * 1749 * @sc: device soft context 1750 * @index: index of the entry to the perfect address table 1751 * @addr: address to be written 1752 * 1753 */ 1754static void 1755muge_set_addr_filter(struct muge_softc *sc, int index, 1756 uint8_t addr[ETHER_ADDR_LEN]) 1757{ 1758 uint32_t tmp; 1759 1760 if ((sc) && (index > 0) && (index < MUGE_NUM_PFILTER_ADDRS_)) { 1761 tmp = addr[3]; 1762 tmp |= addr[2] | (tmp << 8); 1763 tmp |= addr[1] | (tmp << 8); 1764 tmp |= addr[0] | (tmp << 8); 1765 sc->sc_pfilter_table[index][1] = tmp; 1766 tmp = addr[5]; 1767 tmp |= addr[4] | (tmp << 8); 1768 tmp |= ETH_MAF_HI_VALID_ | ETH_MAF_HI_TYPE_DST_; 1769 sc->sc_pfilter_table[index][0] = tmp; 1770 } 1771} 1772 1773/** 1774 * lan78xx_dataport_write - write to the selected RAM 1775 * @sc: The device soft context. 1776 * @ram_select: Select which RAM to access. 1777 * @addr: Starting address to write to. 1778 * @buf: word-sized buffer to write to RAM, starting at @addr. 1779 * @length: length of @buf 1780 * 1781 * 1782 * RETURNS: 1783 * 0 if write successful. 1784 */ 1785static int 1786lan78xx_dataport_write(struct muge_softc *sc, uint32_t ram_select, 1787 uint32_t addr, uint32_t length, uint32_t *buf) 1788{ 1789 uint32_t dp_sel; 1790 int i, ret; 1791 1792 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1793 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1794 if (ret < 0) 1795 goto done; 1796 1797 ret = lan78xx_read_reg(sc, ETH_DP_SEL, &dp_sel); 1798 1799 dp_sel &= ~ETH_DP_SEL_RSEL_MASK_; 1800 dp_sel |= ram_select; 1801 1802 ret = lan78xx_write_reg(sc, ETH_DP_SEL, dp_sel); 1803 1804 for (i = 0; i < length; i++) { 1805 ret = lan78xx_write_reg(sc, ETH_DP_ADDR, addr + i); 1806 ret = lan78xx_write_reg(sc, ETH_DP_DATA, buf[i]); 1807 ret = lan78xx_write_reg(sc, ETH_DP_CMD, ETH_DP_CMD_WRITE_); 1808 ret = lan78xx_wait_for_bits(sc, ETH_DP_SEL, ETH_DP_SEL_DPRDY_); 1809 if (ret != 0) 1810 goto done; 1811 } 1812 1813done: 1814 return (ret); 1815} 1816 1817/** 1818 * muge_multicast_write 1819 * @sc: device's soft context 1820 * 1821 * Writes perfect addres filters and hash address filters to their 1822 * corresponding registers and RAMs. 1823 * 1824 */ 1825static void 1826muge_multicast_write(struct muge_softc *sc) 1827{ 1828 int i, ret; 1829 lan78xx_dataport_write(sc, ETH_DP_SEL_RSEL_VLAN_DA_, 1830 ETH_DP_SEL_VHF_VLAN_LEN, ETH_DP_SEL_VHF_HASH_LEN, 1831 sc->sc_mchash_table); 1832 1833 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1834 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 0); 1835 ret = lan78xx_write_reg(sc, PFILTER_LO(i), 1836 sc->sc_pfilter_table[i][1]); 1837 ret = lan78xx_write_reg(sc, PFILTER_HI(i), 1838 sc->sc_pfilter_table[i][0]); 1839 } 1840} 1841 1842/** 1843 * muge_hash - Calculate the hash of a mac address 1844 * @addr: The mac address to calculate the hash on 1845 * 1846 * This function is used when configuring a range of multicast mac 1847 * addresses to filter on. The hash of the mac address is put in the 1848 * device's mac hash table. 1849 * 1850 * RETURNS: 1851 * Returns a value from 0-63 value which is the hash of the mac address. 1852 */ 1853static inline uint32_t 1854muge_hash(uint8_t addr[ETHER_ADDR_LEN]) 1855{ 1856 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 23) & 0x1ff; 1857} 1858 1859/** 1860 * muge_setmulti - Setup multicast 1861 * @ue: usb ethernet device context 1862 * 1863 * Tells the device to either accept frames with a multicast mac address, 1864 * a select group of m'cast mac addresses or just the devices mac address. 1865 * 1866 * LOCKING: 1867 * Should be called with the MUGE lock held. 1868 */ 1869static void 1870muge_setmulti(struct usb_ether *ue) 1871{ 1872 struct muge_softc *sc = uether_getsc(ue); 1873 struct ifnet *ifp = uether_getifp(ue); 1874 uint8_t i, *addr; 1875 struct ifmultiaddr *ifma; 1876 1877 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1878 1879 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_UCAST_EN_ | ETH_RFE_CTL_MCAST_EN_ | 1880 ETH_RFE_CTL_DA_PERFECT_ | ETH_RFE_CTL_MCAST_HASH_); 1881 1882 /* Initialize hash filter table. */ 1883 for (i = 0; i < ETH_DP_SEL_VHF_HASH_LEN; i++) 1884 sc->sc_mchash_table[i] = 0; 1885 1886 /* Initialize perfect filter table. */ 1887 for (i = 1; i < MUGE_NUM_PFILTER_ADDRS_; i++) { 1888 sc->sc_pfilter_table[i][0] = sc->sc_pfilter_table[i][1] = 0; 1889 } 1890 1891 sc->sc_rfe_ctl |= ETH_RFE_CTL_BCAST_EN_; 1892 1893 if (ifp->if_flags & IFF_PROMISC) { 1894 muge_dbg_printf(sc, "promiscuous mode enabled\n"); 1895 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1896 } else if (ifp->if_flags & IFF_ALLMULTI) { 1897 muge_dbg_printf(sc, "receive all multicast enabled\n"); 1898 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_; 1899 } else { 1900 /* Lock the mac address list before hashing each of them. */ 1901 if_maddr_rlock(ifp); 1902 if (!CK_STAILQ_EMPTY(&ifp->if_multiaddrs)) { 1903 i = 1; 1904 CK_STAILQ_FOREACH(ifma, &ifp->if_multiaddrs, 1905 ifma_link) { 1906 /* First fill up the perfect address table. */ 1907 addr = LLADDR((struct sockaddr_dl *) 1908 ifma->ifma_addr); 1909 if (i < 33 /* XXX */) { 1910 muge_set_addr_filter(sc, i, addr); 1911 } else { 1912 uint32_t bitnum = muge_hash(addr); 1913 sc->sc_mchash_table[bitnum / 32] |= 1914 (1 << (bitnum % 32)); 1915 sc->sc_rfe_ctl |= 1916 ETH_RFE_CTL_MCAST_HASH_; 1917 } 1918 i++; 1919 } 1920 } 1921 if_maddr_runlock(ifp); 1922 muge_multicast_write(sc); 1923 } 1924 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1925} 1926 1927/** 1928 * muge_setpromisc - Enables/disables promiscuous mode 1929 * @ue: usb ethernet device context 1930 * 1931 * LOCKING: 1932 * Should be called with the MUGE lock held. 1933 */ 1934static void 1935muge_setpromisc(struct usb_ether *ue) 1936{ 1937 struct muge_softc *sc = uether_getsc(ue); 1938 struct ifnet *ifp = uether_getifp(ue); 1939 1940 muge_dbg_printf(sc, "promiscuous mode %sabled\n", 1941 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 1942 1943 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1944 1945 if (ifp->if_flags & IFF_PROMISC) 1946 sc->sc_rfe_ctl |= ETH_RFE_CTL_MCAST_EN_ | ETH_RFE_CTL_UCAST_EN_; 1947 else 1948 sc->sc_rfe_ctl &= ~(ETH_RFE_CTL_MCAST_EN_); 1949 1950 lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1951} 1952 1953/** 1954 * muge_sethwcsum - Enable or disable H/W UDP and TCP checksumming 1955 * @sc: driver soft context 1956 * 1957 * LOCKING: 1958 * Should be called with the MUGE lock held. 1959 * 1960 * RETURNS: 1961 * Returns 0 on success or a negative error code. 1962 */ 1963static int 1964muge_sethwcsum(struct muge_softc *sc) 1965{ 1966 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1967 int err; 1968 1969 if (!ifp) 1970 return (-EIO); 1971 1972 MUGE_LOCK_ASSERT(sc, MA_OWNED); 1973 1974 if (ifp->if_capenable & IFCAP_RXCSUM) { 1975 sc->sc_rfe_ctl |= ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_; 1976 sc->sc_rfe_ctl |= ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_; 1977 } else { 1978 sc->sc_rfe_ctl &= 1979 ~(ETH_RFE_CTL_IGMP_COE_ | ETH_RFE_CTL_ICMP_COE_); 1980 sc->sc_rfe_ctl &= 1981 ~(ETH_RFE_CTL_TCPUDP_COE_ | ETH_RFE_CTL_IP_COE_); 1982 } 1983 1984 sc->sc_rfe_ctl &= ~ETH_RFE_CTL_VLAN_FILTER_; 1985 1986 err = lan78xx_write_reg(sc, ETH_RFE_CTL, sc->sc_rfe_ctl); 1987 1988 if (err != 0) { 1989 muge_warn_printf(sc, "failed to write ETH_RFE_CTL (err=%d)\n", 1990 err); 1991 return (err); 1992 } 1993 1994 return (0); 1995} 1996 1997/** 1998 * muge_ifmedia_upd - Set media options 1999 * @ifp: interface pointer 2000 * 2001 * Basically boilerplate code that simply calls the mii functions to set 2002 * the media options. 2003 * 2004 * LOCKING: 2005 * The device lock must be held before this function is called. 2006 * 2007 * RETURNS: 2008 * Returns 0 on success or a negative error code. 2009 */ 2010static int 2011muge_ifmedia_upd(struct ifnet *ifp) 2012{ 2013 struct muge_softc *sc = ifp->if_softc; 2014 muge_dbg_printf(sc, "Calling muge_ifmedia_upd.\n"); 2015 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2016 struct mii_softc *miisc; 2017 int err; 2018 2019 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2020 2021 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 2022 PHY_RESET(miisc); 2023 err = mii_mediachg(mii); 2024 return (err); 2025} 2026 2027/** 2028 * muge_init - Initialises the LAN95xx chip 2029 * @ue: USB ether interface 2030 * 2031 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 2032 * initialise the interface and the rx/tx pipes. 2033 * 2034 * LOCKING: 2035 * Should be called with the MUGE lock held. 2036 */ 2037static void 2038muge_init(struct usb_ether *ue) 2039{ 2040 struct muge_softc *sc = uether_getsc(ue); 2041 muge_dbg_printf(sc, "Calling muge_init.\n"); 2042 struct ifnet *ifp = uether_getifp(ue); 2043 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2044 2045 if (lan78xx_setmacaddress(sc, IF_LLADDR(ifp))) 2046 muge_dbg_printf(sc, "setting MAC address failed\n"); 2047 2048 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 2049 return; 2050 2051 /* Cancel pending I/O. */ 2052 muge_stop(ue); 2053 2054 /* Reset the ethernet interface. */ 2055 muge_reset(sc); 2056 2057 /* Load the multicast filter. */ 2058 muge_setmulti(ue); 2059 2060 /* TCP/UDP checksum offload engines. */ 2061 muge_sethwcsum(sc); 2062 2063 usbd_xfer_set_stall(sc->sc_xfer[MUGE_BULK_DT_WR]); 2064 2065 /* Indicate we are up and running. */ 2066 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2067 2068 /* Switch to selected media. */ 2069 muge_ifmedia_upd(ifp); 2070 muge_start(ue); 2071} 2072 2073/** 2074 * muge_stop - Stops communication with the LAN78xx chip 2075 * @ue: USB ether interface 2076 */ 2077static void 2078muge_stop(struct usb_ether *ue) 2079{ 2080 struct muge_softc *sc = uether_getsc(ue); 2081 struct ifnet *ifp = uether_getifp(ue); 2082 2083 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2084 2085 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2086 sc->sc_flags &= ~MUGE_FLAG_LINK; 2087 2088 /* 2089 * Stop all the transfers, if not already stopped. 2090 */ 2091 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_WR]); 2092 usbd_transfer_stop(sc->sc_xfer[MUGE_BULK_DT_RD]); 2093} 2094 2095/** 2096 * muge_tick - Called periodically to monitor the state of the LAN95xx chip 2097 * @ue: USB ether interface 2098 * 2099 * Simply calls the mii status functions to check the state of the link. 2100 * 2101 * LOCKING: 2102 * Should be called with the MUGE lock held. 2103 */ 2104static void 2105muge_tick(struct usb_ether *ue) 2106{ 2107 2108 struct muge_softc *sc = uether_getsc(ue); 2109 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2110 2111 MUGE_LOCK_ASSERT(sc, MA_OWNED); 2112 2113 mii_tick(mii); 2114 if ((sc->sc_flags & MUGE_FLAG_LINK) == 0) { 2115 lan78xx_miibus_statchg(ue->ue_dev); 2116 if ((sc->sc_flags & MUGE_FLAG_LINK) != 0) 2117 muge_start(ue); 2118 } 2119} 2120 2121/** 2122 * muge_ifmedia_sts - Report current media status 2123 * @ifp: inet interface pointer 2124 * @ifmr: interface media request 2125 * 2126 * Call the mii functions to get the media status. 2127 * 2128 * LOCKING: 2129 * Internally takes and releases the device lock. 2130 */ 2131static void 2132muge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2133{ 2134 struct muge_softc *sc = ifp->if_softc; 2135 struct mii_data *mii = uether_getmii(&sc->sc_ue); 2136 2137 MUGE_LOCK(sc); 2138 mii_pollstat(mii); 2139 ifmr->ifm_active = mii->mii_media_active; 2140 ifmr->ifm_status = mii->mii_media_status; 2141 MUGE_UNLOCK(sc); 2142} 2143 2144/** 2145 * muge_probe - Probe the interface. 2146 * @dev: muge device handle 2147 * 2148 * Checks if the device is a match for this driver. 2149 * 2150 * RETURNS: 2151 * Returns 0 on success or an error code on failure. 2152 */ 2153static int 2154muge_probe(device_t dev) 2155{ 2156 struct usb_attach_arg *uaa = device_get_ivars(dev); 2157 2158 if (uaa->usb_mode != USB_MODE_HOST) 2159 return (ENXIO); 2160 if (uaa->info.bConfigIndex != MUGE_CONFIG_INDEX) 2161 return (ENXIO); 2162 if (uaa->info.bIfaceIndex != MUGE_IFACE_IDX) 2163 return (ENXIO); 2164 return (usbd_lookup_id_by_uaa(lan78xx_devs, sizeof(lan78xx_devs), uaa)); 2165} 2166 2167/** 2168 * muge_attach - Attach the interface. 2169 * @dev: muge device handle 2170 * 2171 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 2172 * 2173 * RETURNS: 2174 * Returns 0 on success or a negative error code. 2175 */ 2176static int 2177muge_attach(device_t dev) 2178{ 2179 struct usb_attach_arg *uaa = device_get_ivars(dev); 2180 struct muge_softc *sc = device_get_softc(dev); 2181 struct usb_ether *ue = &sc->sc_ue; 2182 uint8_t iface_index; 2183 int err; 2184 2185 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 2186 2187 device_set_usb_desc(dev); 2188 2189 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 2190 2191 /* Setup the endpoints for the Microchip LAN78xx device. */ 2192 iface_index = MUGE_IFACE_IDX; 2193 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 2194 muge_config, MUGE_N_TRANSFER, sc, &sc->sc_mtx); 2195 if (err) { 2196 device_printf(dev, "error: allocating USB transfers failed\n"); 2197 goto err; 2198 } 2199 2200 ue->ue_sc = sc; 2201 ue->ue_dev = dev; 2202 ue->ue_udev = uaa->device; 2203 ue->ue_mtx = &sc->sc_mtx; 2204 ue->ue_methods = &muge_ue_methods; 2205 2206 err = uether_ifattach(ue); 2207 if (err) { 2208 device_printf(dev, "error: could not attach interface\n"); 2209 goto err_usbd; 2210 } 2211 2212 /* Wait for lan78xx_chip_init from post-attach callback to complete. */ 2213 uether_ifattach_wait(ue); 2214 if (!(sc->sc_flags & MUGE_FLAG_INIT_DONE)) 2215 goto err_attached; 2216 2217 return (0); 2218 2219err_attached: 2220 uether_ifdetach(ue); 2221err_usbd: 2222 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2223err: 2224 mtx_destroy(&sc->sc_mtx); 2225 return (ENXIO); 2226} 2227 2228/** 2229 * muge_detach - Detach the interface. 2230 * @dev: muge device handle 2231 * 2232 * RETURNS: 2233 * Returns 0. 2234 */ 2235static int 2236muge_detach(device_t dev) 2237{ 2238 2239 struct muge_softc *sc = device_get_softc(dev); 2240 struct usb_ether *ue = &sc->sc_ue; 2241 2242 usbd_transfer_unsetup(sc->sc_xfer, MUGE_N_TRANSFER); 2243 uether_ifdetach(ue); 2244 mtx_destroy(&sc->sc_mtx); 2245 2246 return (0); 2247} 2248 2249static device_method_t muge_methods[] = { 2250 /* Device interface */ 2251 DEVMETHOD(device_probe, muge_probe), 2252 DEVMETHOD(device_attach, muge_attach), 2253 DEVMETHOD(device_detach, muge_detach), 2254 2255 /* Bus interface */ 2256 DEVMETHOD(bus_print_child, bus_generic_print_child), 2257 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 2258 2259 /* MII interface */ 2260 DEVMETHOD(miibus_readreg, lan78xx_miibus_readreg), 2261 DEVMETHOD(miibus_writereg, lan78xx_miibus_writereg), 2262 DEVMETHOD(miibus_statchg, lan78xx_miibus_statchg), 2263 2264 DEVMETHOD_END 2265}; 2266 2267static driver_t muge_driver = { 2268 .name = "muge", 2269 .methods = muge_methods, 2270 .size = sizeof(struct muge_softc), 2271}; 2272 2273static devclass_t muge_devclass; 2274 2275DRIVER_MODULE(muge, uhub, muge_driver, muge_devclass, NULL, 0); 2276DRIVER_MODULE(miibus, muge, miibus_driver, miibus_devclass, 0, 0); 2277MODULE_DEPEND(muge, uether, 1, 1, 1); 2278MODULE_DEPEND(muge, usb, 1, 1, 1); 2279MODULE_DEPEND(muge, ether, 1, 1, 1); 2280MODULE_DEPEND(muge, miibus, 1, 1, 1); 2281MODULE_VERSION(muge, 1); 2282USB_PNP_HOST_INFO(lan78xx_devs); 2283