/freebsd-11-stable/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/ |
H A D | tst.signedkeyspos.d | 66 @i16["mouse", (short)-2] = sum(-2); 67 @i16["dog", (short)-2] = sum(-22); 68 @i16["cat", (short)-2] = sum(-222); 69 @i16["mouse", (short)-1] = sum(-1); 70 @i16["dog", (short)-1] = sum(-11); 71 @i16["cat", (short)-1] = sum(-111); 72 @i16["mouse", (short)0] = sum(0); 73 @i16["dog", (short)0] = sum(10); 74 @i16["cat", (short)0] = sum(100); 75 @i16["mous [all...] |
H A D | tst.signedkeys.d | 101 @i16[(short)-2] = sum(-2); 102 @i16[(short)-1] = sum(-1); 103 @i16[(short)0] = sum(0); 104 @i16[(short)1] = sum(1); 105 @i16[(short)2] = sum(2);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 253 AM.Base.Reg = CurDAG->getRegister(MSP430::SR, MVT::i16); 263 MVT::i16, AM.Disp, 266 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16, 269 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i16, 0/*AM.SymbolFlags*/); 271 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i16, 0/*AM.SymbolFlags*/); 276 Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(N), MVT::i16); 312 case MVT::i16: 337 case MVT::i16: 345 CurDAG->getMachineNode(Opcode, SDLoc(N), VT, MVT::i16, MVT::Other, 360 unsigned Opc = (VT == MVT::i16 [all...] |
H A D | MSP430ISelLowering.cpp | 51 addRegisterClass(MVT::i16, &MSP430::GR16RegClass); 63 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); 70 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); 74 setTruncStoreAction(MVT::i16, MVT::i8, Expand); 79 setOperationAction(ISD::SRA, MVT::i16, Custom); 80 setOperationAction(ISD::SHL, MVT::i16, Custom); 81 setOperationAction(ISD::SRL, MVT::i16, Custom); 84 setOperationAction(ISD::ROTL, MVT::i16, Expand); 85 setOperationAction(ISD::ROTR, MVT::i16, Expand); 86 setOperationAction(ISD::GlobalAddress, MVT::i16, Custo [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 100 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); 110 if (isUInt<6>(RHSC) && (VT == MVT::i8 || VT == MVT::i16)) { 147 case MVT::i16: { 188 case MVT::i16: { 319 CurDAG->getTargetConstant(0, SDLoc(N), MVT::i16)); 345 SDValue Offset = CurDAG->getTargetConstant(CST, DL, MVT::i16); 347 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr; 378 Ptr = CurDAG->getCopyFromReg(Chain, DL, AVR::R31R30, MVT::i16, 381 SDValue RegZ = CurDAG->getRegister(AVR::R31R30, MVT::i16); 386 ResNode = CurDAG->getMachineNode(LPMOpc, DL, VT, MVT::i16, MV [all...] |
H A D | AVRISelLowering.cpp | 39 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); 50 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom); 51 setOperationAction(ISD::BlockAddress, MVT::i16, Custom); 56 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand); 65 setTruncStoreAction(MVT::i16, MVT::i8, Expand); 84 setOperationAction(ISD::SRA, MVT::i16, Custom); 85 setOperationAction(ISD::SHL, MVT::i16, Custom); 86 setOperationAction(ISD::SRL, MVT::i16, Custom); 87 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand); 88 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expan [all...] |
H A D | AVRRegisterInfo.cpp | 86 if (TRI->isTypeLegalForClass(*RC, MVT::i16)) {
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/freebsd-11-stable/contrib/netbsd-tests/include/ |
H A D | t_inttypes.c | 41 int16_t i16 = 0; local 75 PRINT(PRId16, i16); 90 PRINT(PRIi16, i16); 166 SCAN(SCNd16, i16); 181 SCAN(SCNi16, i16);
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/freebsd-11-stable/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/typedef/ |
H A D | tst.TypedefDataAssign.d | 85 new_int16 i16;
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/freebsd-11-stable/contrib/netbsd-tests/ipf/ |
H A D | t_filter_parse.sh | 101 test_case i16 itest text ipf 127 atf_add_test_case i16
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 293 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { 484 case MVT::i16: 638 case MVT::i16: 844 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || 916 case MVT::i16: 1080 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && 1118 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { 1274 if (DestVT != MVT::i16 && DestVT != MVT::i8) 1514 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) 1534 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetV [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 182 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0}, 183 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0}, 186 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0}, 187 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0}, 190 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1}, 191 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1}, 310 { ISD::FP_TO_SINT, MVT::i16, MVT::f32, 2 }, 311 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 }, 312 { ISD::FP_TO_SINT, MVT::i16, MVT::f64, 2 }, 313 { ISD::FP_TO_UINT, MVT::i16, MV [all...] |
H A D | ARMFastISel.cpp | 465 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1) 706 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) 824 case MVT::i16: 942 case MVT::i16: 1083 case MVT::i16: 1371 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 || 1407 case MVT::i16: 1434 // We have i1, i8, or i16, we need to either zero extend or sign extend. 1551 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8) 1558 if (SrcVT == MVT::i16 || SrcV [all...] |
/freebsd-11-stable/sys/contrib/octeon-sdk/ |
H A D | cvmx-fau.h | 301 uint64_t i16; member in union:__anon8525 304 result.i16 = cvmx_read64_int16(__cvmx_fau_atomic_address(1, reg, value));
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 357 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1) 617 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) 629 if (VT == MVT::i8 || VT == MVT::i16) 768 case MVT::i16: 823 case MVT::i16: 1182 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) || 1297 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16) 1377 case MVT::i16: 1382 LLVM_DEBUG(dbgs() << ".. .. gave up (i8/i16 arg is not extended)\n"); 1532 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 42 i16 = 4, // This is a 16 bit integer value 82 v1i16 = 34, // 1 x i16 83 v2i16 = 35, // 2 x i16 84 v3i16 = 36, // 3 x i16 85 v4i16 = 37, // 4 x i16 86 v8i16 = 38, // 8 x i16 87 v16i16 = 39, // 16 x i16 88 v32i16 = 40, // 32 x i16 89 v64i16 = 41, // 64 x i16 90 v128i16 = 42, //128 x i16 [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 335 case MVT::i16: 1000 /// simple value type such as i1, i8, and i16. 1010 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) 1175 case MVT::i16: 1497 case MVT::i16: 1684 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) { 1709 case MVT::i16: 1730 if (RetVT >= MVT::i8 && RetVT <= MVT::i16 && ISDOpc != ISD::AND) { 1760 case MVT::i16: 1773 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) { [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFastISel.cpp | 126 case MVT::i16: 454 case MVT::i16: 484 case MVT::i16: 664 case MVT::i16: 775 case MVT::i16: 911 case MVT::i16: 1177 case MVT::i16: 1234 case MVT::i16: 1320 case MVT::i16:
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/freebsd-11-stable/sys/cddl/contrib/opensolaris/uts/common/os/ |
H A D | fm.c | 230 uint16_t i16; local 267 (void) nvpair_value_int16(nvp, (void *)&i16); 268 c = fm_printf(d + 1, c, cols, "%x", i16); 272 (void) nvpair_value_uint16(nvp, &i16); 273 c = fm_printf(d + 1, c, cols, "%x", i16);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 151 addRegisterClass(MVT::i16, &AMDGPU::SReg_32RegClass); 447 setOperationAction(ISD::Constant, MVT::i16, Legal); 449 setOperationAction(ISD::SMIN, MVT::i16, Legal); 450 setOperationAction(ISD::SMAX, MVT::i16, Legal); 452 setOperationAction(ISD::UMIN, MVT::i16, Legal); 453 setOperationAction(ISD::UMAX, MVT::i16, Legal); 455 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Promote); 456 AddPromotedToType(ISD::SIGN_EXTEND, MVT::i16, MVT::i32); 458 setOperationAction(ISD::ROTR, MVT::i16, Promote); 459 setOperationAction(ISD::ROTL, MVT::i16, Promot [all...] |
H A D | AMDGPUISelDAGToDAG.cpp | 446 assert(LdHi->getMemoryVT() == MVT::i16); 474 assert(LdLo->getMemoryVT() == MVT::i16); 1195 Offset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16); 1228 Offset = CurDAG->getTargetConstant(ByteOffset, DL, MVT::i16); 1246 Offset = CurDAG->getTargetConstant(CAddr->getZExtValue(), DL, MVT::i16); 1253 Offset = CurDAG->getTargetConstant(0, SDLoc(Addr), MVT::i16); 1397 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16); 1413 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16); 1419 Offset = CurDAG->getTargetConstant(C1->getZExtValue(), DL, MVT::i16); 1424 Offset = CurDAG->getTargetConstant(0, DL, MVT::i16); [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 116 AVT = MVT::i16; 224 return MVT::i16;
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H A D | X86FastISel.cpp | 339 case MVT::i16: 509 case MVT::i16: Opc = X86::MOV16mr; break; 674 case MVT::i16: Opc = X86::MOV16mi; break; 1226 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16) 1348 case MVT::i16: return X86::CMP16rr; 1374 case MVT::i16: 1546 case MVT::i16: MovInst = X86::MOVZX32rr16; break; 1559 } else if (DstVT == MVT::i16) { 1560 // i8->i16 doesn't exist in the autogenerated isel table. Need to zero 1566 ResultReg = fastEmitInst_extractsubreg(MVT::i16, Result3 [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 377 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass); 398 MVT::i16, MVT::i32, MVT::i64}) { 407 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Legal); 429 setOperationAction(ISD::ROTL, MVT::i16, Expand); 430 setOperationAction(ISD::ROTR, MVT::i16, Expand); 433 setOperationAction(ISD::BSWAP, MVT::i16, Expand); 495 for (const auto& Ty : {MVT::i16, MVT::i32, MVT::i64}) { 506 setOperationAction(ISD::CTTZ, MVT::i16, Expand); 1334 // i8 types in IR will be i16 types in SDAG 1336 (getValueType(DL, Ty) == MVT::i8 && Outs[OIdx].VT == MVT::i16)) [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonSubtarget.h | 226 static MVT Types[] = { MVT::i8, MVT::i16, MVT::i32 };
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