Searched refs:RegMask (Results 1 - 24 of 24) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegUsageInfoPropagate.cpp13 /// each callsite queries RegisterUsageInfo for RegMask (calculated based on
14 /// actual register allocation) of the callee function, if the RegMask detail
15 /// is available then this pass will update the RegMask of the call instruction.
16 /// This updated RegMask will be used by the register allocator while allocating
64 static void setRegMask(MachineInstr &MI, ArrayRef<uint32_t> RegMask) { argument
65 assert(RegMask.size() ==
72 MO.setRegMask(RegMask.data());
125 const ArrayRef<uint32_t> RegMask = PRUI->getRegUsageInfo(F);
126 if (RegMask.empty())
128 setRegMask(MI, RegMask);
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H A DRegisterUsageInfo.cpp60 const Function &FP, ArrayRef<uint32_t> RegMask) {
61 RegMasks[&FP] = RegMask;
78 for (const auto &RegMask : RegMasks)
79 FPRMPairVector.push_back(&RegMask);
59 storeUpdateRegUsageInfo( const Function &FP, ArrayRef<uint32_t> RegMask) argument
H A DRegUsageInfoCollector.cpp14 /// MRI::isPhysRegUsed() then creates a RegMask based on this details.
15 /// The pass then stores this RegMask in PhysicalRegisterUsageInfo.cpp
123 std::vector<uint32_t> RegMask; local
129 RegMask.resize(RegMaskSize, ~((uint32_t)0));
142 auto SetRegAsDefined = [&RegMask] (unsigned Reg) {
143 RegMask[Reg / 32] &= ~(1u << Reg % 32);
183 if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg))
190 PRUI.storeUpdateRegUsageInfo(F, RegMask);
H A DLiveRegUnits.cpp26 void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) { argument
29 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
35 void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) { argument
38 if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
H A DMachineOperand.cpp310 const uint32_t *RegMask = getRegMask(); local
312 if (RegMask == OtherRegMask)
316 // Calculate the size of the RegMask
321 return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
323 // We don't know the size of the RegMask, so we can't deep compare the two
884 const uint32_t *RegMask = getRegLiveOut(); local
891 if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
H A DMachineCopyPropagation.cpp650 const MachineOperand *RegMask = nullptr; local
653 RegMask = &MO;
673 if (RegMask) {
682 if (!RegMask->clobbersPhysReg(Reg)) {
H A DMIRPrinter.cpp244 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, argument
246 assert(RegMask && "Can't print an empty register mask");
252 if (RegMask[I / 32] & (1u << (I % 32))) {
H A DPeepholeOptimizer.cpp1676 const uint32_t *RegMask = MO.getRegMask(); local
1679 if (MachineOperand::clobbersPhysReg(RegMask, Def)) {
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterUsageInfo.h50 /// To store RegMask for given Function *.
52 ArrayRef<uint32_t> RegMask);
54 /// To query stored RegMask for given Function *, it will returns ane empty
61 /// A Dense map from Function * to RegMask.
62 /// In RegMask 0 means register used (clobbered) by function.
H A DLiveRegUnits.h108 /// Removes register units not preserved by the regmask \p RegMask.
109 /// The regmask has the same format as the one in the RegMask machine operand.
110 void removeRegsNotPreserved(const uint32_t *RegMask);
112 /// Adds register units not preserved by the regmask \p RegMask.
113 /// The regmask has the same format as the one in the RegMask machine operand.
114 void addRegsInMask(const uint32_t *RegMask);
H A DMachineOperand.h172 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut. member in union:llvm::MachineOperand::ContentsUnion
611 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
615 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) { argument
618 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
621 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
626 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
630 return Contents.RegMask;
641 return Contents.RegMask;
698 Contents.RegMask = RegMaskPtr;
866 /// A RegMask operan
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H A DMachineRegisterInfo.h846 /// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
848 void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) { argument
849 UsedPhysRegMask.setBitsNotInMask(RegMask);
H A DSelectionDAGNodes.h2059 // The memory for RegMask is not owned by the node.
2060 const uint32_t *RegMask; member in class:llvm::RegisterMaskSDNode
2064 RegMask(mask) {}
2067 const uint32_t *getRegMask() const { return RegMask; }
H A DSelectionDAG.h692 SDValue getRegisterMask(const uint32_t *RegMask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp454 static void handleRegMaskClobber(const uint32_t *RegMask, MCPhysReg Reg, argument
456 if (!MachineOperand::clobbersPhysReg(RegMask, Reg))
467 const uint32_t *RegMask = MO.getRegMask(); local
469 handleRegMaskClobber(RegMask, Reg, LOHInfos);
471 handleRegMaskClobber(RegMask, Reg, LOHInfos);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp646 const uint32_t *RegMask; local
648 RegMask = MBBI->getOperand(2).getRegMask();
682 MIB.addRegMask(RegMask);
H A DSystemZInstrInfo.cpp741 const uint32_t *RegMask = MI.getOperand(1).getRegMask(); local
749 .addRegMask(RegMask)
754 const uint32_t *RegMask = MI.getOperand(0).getRegMask(); local
759 .addRegMask(RegMask)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp1318 /// by RegMask, and add them to LRegs.
1319 static void CheckForLiveRegDefMasked(SUnit *SU, const uint32_t *RegMask, argument
1327 if (!MachineOperand::clobbersPhysReg(RegMask, i)) continue;
1407 if (const uint32_t *RegMask = getNodeRegMask(Node))
1408 CheckForLiveRegDefMasked(SU, RegMask,
2843 const uint32_t *RegMask = getNodeRegMask(SU->getNode());
2844 if(!ImpDefs && !RegMask)
2853 if (RegMask &&
2854 MachineOperand::clobbersPhysReg(RegMask, SuccPred.getReg()) &&
H A DSelectionDAG.cpp1805 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1808 ID.AddPointer(RegMask);
1813 auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp552 const uint32_t *RegMask = getCallPreservedMask(MF, CC); local
553 if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister()))
H A DX86FrameLowering.cpp197 for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
198 unsigned Reg = RegMask.PhysReg;
2742 auto RegMask = Prev->getOperand(1);
2752 if (!RegMask.clobbersPhysReg(Candidate))
H A DX86ISelLowering.h1308 uint32_t *RegMask) const;
H A DX86ISelLowering.cpp2995 uint32_t *RegMask) const {
3012 if (RegMask) {
3015 RegMask[*SubRegs / 32] &= ~(1u << (*SubRegs % 32));
4233 uint32_t *RegMask = nullptr;
4241 RegMask = MF.allocateRegMask();
4243 memcpy(RegMask, Mask, sizeof(RegMask[0]) * RegMaskSize);
4246 // in the RegMask.
4250 RegMask[*SubRegs / 32] &= ~(1u << (*SubRegs % 32));
4252 // Create the RegMask Operan
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp2463 assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2596 if (const auto *RegMask = PFS.Target.getRegMask(Token.stringValue())) {
2597 Dest = MachineOperand::CreateRegMask(RegMask);

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