Searched refs:RRC (Results 1 - 11 of 11) sorted by relevance

/freebsd-11-stable/crypto/heimdal/lib/gssapi/krb5/
H A Dcfx.h54 u_char RRC[2]; member in struct:gss_cfx_wrap_token_desc_struct
H A Dcfx.c464 * In Wrap tokens that provide for confidentiality, the RRC
469 * both the EC and RRC fields in the appended checksum
473 token->RRC[0] = 0;
474 token->RRC[1] = 0;
500 Expanded, this is with with RRC = 0:
504 In DCE-RPC mode == no trailer: RRC = gss "trailer" == length(ec-padding | E"header" | krb5-trailer)
564 token->RRC[0] = (rrc >> 8) & 0xFF;
565 token->RRC[1] = (rrc >> 0) & 0xFF;
574 don't do RRC != 0
617 token->RRC[
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/freebsd-11-stable/sys/kgssapi/krb5/
H A Dkrb5_mech.c1489 /* EC + RRC - set to zero initially */
1510 * with RRC values other than zero. If we did, we
1511 * should zero RRC in the copied header.
1525 * and RRC are set to zero. Also, the original EC must
1785 int sealed, flags, EC, RRC; local
1820 /* EC + RRC */
1822 RRC = (p[6] << 8) + p[7];
1842 * Separate the header before dealing with RRC. We only need
1855 * Undo the effects of RRC by rotating left.
1857 if (RRC >
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h35 /// Y = RRC X, rotate right via carry
36 RRC,
H A DMSP430ISelLowering.cpp1379 case MSP430ISD::RRC: return "MSP430ISD::RRC";
/freebsd-11-stable/sys/dev/ctau/
H A Dctddk.h364 SA1, IDL, TRB, RRC, TRC0, TRC1, CST; member in struct:_ct_chan_t
H A Dctau.c496 set(TRB, 0); set(RRC, 0); set(TRC0,0); set(TRC1,0);
515 set(TRB, 1); set(RRC, 1); set(TRC0,1); set(TRC1,1);
1359 /* RXRDY:=1 when the receive buffer has more than RRC chars */
1360 outb (c->RRC, dma ? c->opt.dma_rrc : c->opt.pio_rrc);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1349 const TargetRegisterClass* RRC; local
1351 std::tie(RRC, Cost) = findRepresentativeClass(TRI, (MVT::SimpleValueType)i);
1352 RepRegClassForVT[i] = RRC;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp1877 auto *RRC = HBS::getFinalVRegClass(R, MRI);
1878 return OpRC->hasSubClassEq(RRC);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp1509 const TargetRegisterClass *RRC = nullptr; local
1519 RRC = &ARM::DPRRegClass;
1529 RRC = &ARM::DPRRegClass;
1533 RRC = &ARM::DPRRegClass;
1537 RRC = &ARM::DPRRegClass;
1541 return std::make_pair(RRC, Cost);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2425 const TargetRegisterClass *RRC = nullptr; local
2431 RRC = Subtarget.is64Bit() ? &X86::GR64RegClass : &X86::GR32RegClass;
2434 RRC = &X86::VR64RegClass;
2443 RRC = &X86::VR128XRegClass;
2446 return std::make_pair(RRC, Cost);
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