/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 52 const APInt &DemandedElts, 72 APInt DemandedElts = local 74 computeKnownBitsImpl(R, Known, DemandedElts); 91 const APInt &DemandedElts, 115 if (!DemandedElts) 122 TL.computeKnownBitsForTargetInstr(*this, R, Known, DemandedElts, MRI, 138 computeKnownBitsImpl(Src.getReg(), Known, DemandedElts, Depth); 151 computeKnownBitsForFrameIndex(R, Known, DemandedElts); 158 computeKnownBitsImpl(MI.getOperand(1).getReg(), Known2, DemandedElts, 163 computeKnownBitsImpl(MI.getOperand(2).getReg(), Known2, DemandedElts, 51 computeKnownBitsForFrameIndex(Register R, KnownBits &Known, const APInt &DemandedElts, unsigned Depth) argument 90 computeKnownBitsImpl(Register R, KnownBits &Known, const APInt &DemandedElts, unsigned Depth) argument 376 computeNumSignBits(Register R, const APInt &DemandedElts, unsigned Depth) argument 440 APInt DemandedElts = Ty.isVector() local [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.h | 40 const APInt &DemandedElts, 43 unsigned computeNumSignBits(Register R, const APInt &DemandedElts, 54 /// \return true if 'V & Mask' is known to be zero in DemandedElts. We use 68 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineSimplifyDemanded.cpp | 765 APInt DemandedElts = DemandedMask.zextOrTrunc(ArgWidth); local 766 if (DemandedElts.isNullValue()) 1002 APInt DemandedElts, 1008 DemandedElts.getActiveBits() == 3) 1020 DemandedElts = (1 << DemandedElts.getActiveBits()) - 1; 1026 DemandedElts &= (1 << countPopulation(DMaskVal)) - 1; 1033 if (!!DemandedElts[OrigLoadIdx]) 1043 unsigned NewNumElts = DemandedElts.countPopulation(); 1047 if (NewNumElts >= VWidth && DemandedElts 1001 simplifyAMDGCNMemoryIntrinsicDemanded(IntrinsicInst *II, APInt DemandedElts, int DMaskIdx) argument 1119 SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &UndefElts, unsigned Depth, bool AllowMultipleUsers) argument [all...] |
H A D | InstCombineVectorOps.cpp | 342 APInt DemandedElts(NumElts, 0); 343 DemandedElts.setBit(IndexC->getZExtValue()); 345 SimplifyDemandedVectorElts(SrcVec, DemandedElts, UndefElts)) { 352 APInt DemandedElts = findDemandedEltsByAllUsers(SrcVec); local 353 if (!DemandedElts.isAllOnesValue()) { 356 SrcVec, DemandedElts, UndefElts, 0 /* Depth */,
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H A D | InstCombineInternal.h | 863 APInt DemandedElts, 866 Value *SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
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H A D | InstCombineCalls.cpp | 1100 APInt DemandedElts = possiblyDemandedEltsInMask(ConstMask); local 1101 APInt UndefElts(DemandedElts.getBitWidth(), 0); 1103 DemandedElts, UndefElts)) { 1138 APInt DemandedElts = possiblyDemandedEltsInMask(ConstMask); 1139 APInt UndefElts(DemandedElts.getBitWidth(), 0); 1141 DemandedElts, UndefElts)) { 1146 DemandedElts, UndefElts)) { 1884 APInt DemandedElts = APInt::getLowBitsSet(Width, DemandedWidth); 1885 return SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 601 APInt DemandedElts = VT.isVector() local 604 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth, 611 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, 622 if (DemandedBits == 0 || DemandedElts == 0) 625 unsigned NumElts = DemandedElts.getBitWidth(); 637 Src, DemandedBits, DemandedElts, DAG, Depth + 1)) 653 if (DemandedElts[j]) 671 if (DemandedElts[i]) { 685 LHSKnown = DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1); 686 RHSKnown = DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Dept 610 SimplifyMultipleUseDemandedBits( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, SelectionDAG &DAG, unsigned Depth) const argument 814 APInt DemandedElts = OriginalDemandedElts; local 2082 SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero, DAGCombinerInfo &DCI) const argument 2154 APInt DemandedElts = OriginalDemandedElts; local 2643 computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument 2657 computeKnownBitsForTargetInstr( GISelKnownBits &Analysis, Register R, KnownBits &Known, const APInt &DemandedElts, const MachineRegisterInfo &MRI, unsigned Depth) const argument 2664 computeKnownBitsForFrameIndex(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument 2692 SimplifyDemandedVectorEltsForTargetNode( SDValue Op, const APInt &DemandedElts, APInt &KnownUndef, APInt &KnownZero, TargetLoweringOpt &TLO, unsigned Depth) const argument 2704 SimplifyDemandedBitsForTargetNode( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, unsigned Depth) const argument 2717 SimplifyMultipleUseDemandedBitsForTargetNode( SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, SelectionDAG &DAG, unsigned Depth) const argument [all...] |
H A D | SelectionDAG.cpp | 2167 APInt DemandedElts = VT.isVector() 2170 return GetDemandedBits(V, DemandedBits, DemandedElts); 2175 /// DemandedElts. 2179 const APInt &DemandedElts) { 2195 return TLI->SimplifyMultipleUseDemandedBits(V, DemandedBits, DemandedElts, 2257 APInt DemandedElts = VT.isVector() 2260 return MaskedValueIsZero(V, Mask, DemandedElts, Depth); 2264 /// DemandedElts. We use this predicate to simplify operations downstream. 2267 const APInt &DemandedElts, 2269 return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Dept [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.h | 108 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.h | 206 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.h | 66 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.h | 88 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3136 const APInt &DemandedElts, KnownBits &Known, 3153 /// through" ops that don't contribute to the DemandedBits/DemandedElts - 3156 const APInt &DemandedElts, 3160 /// Look at Vector Op. At this point, we know that only the DemandedElts 3181 bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts, 3186 /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts 3191 const APInt &DemandedElts, 3195 /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts 3200 const APInt &DemandedElts, 3209 const APInt &DemandedElts, [all...] |
H A D | SelectionDAGNodes.h | 1686 ConstantSDNode *isConstOrConstSplat(SDValue N, const APInt &DemandedElts, 1695 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, const APInt &DemandedElts, 1938 /// The DemandedElts mask indicates the elements that must be in the splat. 1941 SDValue getSplatValue(const APInt &DemandedElts, 1953 /// The DemandedElts mask indicates the elements that must be in the splat. 1957 getConstantSplatNode(const APInt &DemandedElts, 1971 /// The DemandedElts mask indicates the elements that must be in the splat. 1975 getConstantFPSplatNode(const APInt &DemandedElts,
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H A D | SelectionDAG.h | 1499 /// by DemandedElts. If so, return the simpler operand, otherwise return a 1505 const APInt &DemandedElts); 1517 /// Return true if 'Op & Mask' is known to be zero in DemandedElts. We 1521 const APInt &DemandedElts, unsigned Depth = 0) const; 1536 /// them in Known. The DemandedElts argument allows us to only collect the 1540 KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts, 1574 /// to each other, so we return 3. The DemandedElts argument allows 1578 unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts, 1618 /// for \p DemandedElts. 1621 bool isSplatValue(SDValue V, const APInt &DemandedElts, APIn [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 944 const APInt &DemandedElts, 950 const APInt &DemandedElts, 955 const APInt &DemandedElts, 963 const APInt &DemandedElts, 969 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
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H A D | X86ISelLowering.cpp | 6534 static void getPackDemandedElts(EVT VT, const APInt &DemandedElts, 6537 int NumElts = DemandedElts.getBitWidth(); 6545 // Map DemandedElts to the packed operands. 6550 if (DemandedElts[OuterIdx]) 6552 if (DemandedElts[OuterIdx + NumInnerEltsPerLane]) 6559 static void getHorizDemandedElts(EVT VT, const APInt &DemandedElts, 6562 int NumElts = DemandedElts.getBitWidth(); 6569 // Map DemandedElts to the horizontal operands. 6571 if (!DemandedElts[Idx]) 7111 // TODO: Use DemandedElts varian [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.h | 259 const APInt &DemandedElts, 263 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const APInt &DemandedElts,
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H A D | SIISelLowering.h | 387 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.h | 528 const APInt &DemandedElts, 534 const APInt &DemandedElts,
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H A D | SystemZISelLowering.cpp | 6407 // Return the demanded elements for the OpNo source operand of Op. DemandedElts 6409 static APInt getDemandedSrcElements(SDValue Op, const APInt &DemandedElts, argument 6431 SrcDemE = DemandedElts; 6444 SrcDemE.insertBits(DemandedElts, 0); 6453 SrcDemE.insertBits(DemandedElts, NumElts); 6458 if (!DemandedElts[OpNo - 1]) 6474 APInt DemEls = DemandedElts.trunc(NumSrc0Els); 6477 APInt DemEls = DemandedElts.lshr(NumSrc0Els); 6496 SrcDemE = DemandedElts; 6507 const APInt &DemandedElts, 6506 computeKnownBitsBinOp(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo) argument 6521 computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument 6615 computeNumSignBitsBinOp(SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth, unsigned OpNo) argument 6639 ComputeNumSignBitsForTargetNode( SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG, unsigned Depth) const argument [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | VectorUtils.cpp | 791 APInt DemandedElts = APInt::getAllOnesValue(VWidth); local 795 DemandedElts.clearBit(i); 796 return DemandedElts;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 316 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 413 const APInt &DemandedElts,
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 760 const APInt &DemandedElts,
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