Searched refs:intmask (Results 1 - 9 of 9) sorted by relevance

/broadcom-cfe-1.4.2/cfe/dev/
H A Ddev_rtl8139.c156 uint32_t intmask; /* interrupt mask */ member in struct:rtl8139_softc
687 status &= sc->intmask;
708 sc->intmask &= ~M_INT_PUN_LINKCHG;
710 WRITECSR2(sc, R_IMR, sc->intmask);
732 sc->intmask |= M_INT_PUN_LINKCHG;
734 WRITECSR2(sc, R_IMR, sc->intmask);
747 sc->intmask = 0;
754 sc->intmask = (M_INT_ROK | M_INT_RER
763 WRITECSR2(sc, R_IMR, sc->intmask);
777 sc->intmask
[all...]
H A Ddev_dp83815.c187 uint32_t intmask; /* interrupt mask */ member in struct:dp83815_softc
1519 status = isr & sc->intmask;
1541 WRITECSR(sc, R_IMR, sc->intmask);
1571 sc->intmask &= ~ M_INT_PHY;
1572 WRITECSR(sc, R_IMR, sc->intmask);
1594 sc->intmask |= M_INT_PHY;
1595 WRITECSR(sc, R_IMR, sc->intmask);
1606 sc->intmask = 0;
1614 sc->intmask = M_INT_RXDESC | M_INT_TXDESC;
1615 sc->intmask |
[all...]
H A Ddev_aic6915.c356 uint32_t intmask; member in struct:aic_ether_s
1206 sc->intmask = M_RxQ1DoneInt | M_TxFrameCompleteInt | M_TxDMADoneInt;
1208 WRITECSR(sc, R_InterruptEn, sc->intmask);
1227 sc->intmask = 0;
1228 WRITECSR(sc, R_InterruptEn, sc->intmask);
1267 if ((status & sc->intmask) == 0)
1289 sc->intmask = 0;
H A Ddev_bcm4401.c183 uint32_t intmask; /* interrupt mask */ member in struct:bcm4401_softc
1099 status &= sc->intmask;
1148 sc->intmask = 0;
1152 sc->intmask = (M_INT_RI | M_INT_XI | M_INT_TO); /* XXX add errors */
1156 WRITECSR(sc, R_INT_MASK, sc->intmask);
1177 sc->intmask = 0;
H A Ddev_i82559.c224 uint8_t intmask; /* shadow interrupt mask */ member in struct:i82559_softc_s
1158 if ((status & sc->intmask) == 0)
1318 sc->intmask = 0;
1323 sc->intmask = (M_SCB_FR | M_SCB_RNR | M_SCB_CX);
1347 sc->intmask = 0;
H A Ddev_tulip.c217 uint32_t intmask; /* interrupt mask */ member in struct:tulip_softc
2254 WRITECSR(sc, R_CSR_INTMASK, sc->intmask);
2308 sc->intmask = 0;
2319 sc->intmask = M_CSR7_RXINT | M_CSR7_TXINT |
2321 sc->intmask |= M_CSR7_FATALBUSERROR | M_CSR7_TXUNDERFLOW |
2323 WRITECSR(sc, R_CSR_INTMASK, sc->intmask);
2345 sc->intmask = 0;
H A Ddev_bcm5700.c401 uint32_t intmask; /* interrupt mask */ member in struct:t3_ether_s
2422 sc->intmask = 0;
2428 sc->intmask |= M_EVT_LINKCHNG;
2430 sc->intmask |= M_EVT_LINKCHNG | M_EVT_MIINT;
2432 WRITECSR(sc, R_MAC_EVENT_ENB, sc->intmask);
2446 sc->intmask = 0;
/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/bcmsb/src/
H A Ddev_sb_mac.c219 uint32_t intmask; /* interrupt mask */ member in struct:bcm4401_softc
1224 status &= sc->intmask;
1275 sc->intmask = 0;
1280 sc->intmask = (M_INT_RI | M_INT_XI); /* XXX add errors */
1282 sc->intmask |= M_INT_TO;
1286 WRITECSR(sc, R_INT_MASK, sc->intmask);
1311 sc->intmask = 0;
/broadcom-cfe-1.4.2/cfe/arch/ppc/chipset/mpc824x/src/
H A Ddev_tulip.c236 uint32_t intmask; /* interrupt mask */ member in struct:tulip_softc_s
2663 WRITECSR(sc, R_CSR_INTMASK, sc->intmask);
2717 sc->intmask = 0;
2728 sc->intmask = M_CSR7_RXINT | M_CSR7_TXINT | M_CSR7_TXBUFUNAVAIL |
2730 sc->intmask |= M_CSR7_FATALBUSERROR | M_CSR7_TXUNDERFLOW |
2732 WRITECSR(sc, R_CSR_INTMASK, sc->intmask);
2754 sc->intmask = 0;

Completed in 73 milliseconds