Searched refs:S5P_CLKREG (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
22 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
23 #define S5P_MPLL_LOCK S5P_CLKREG(0x04)
24 #define S5P_EPLL_LOCK S5P_CLKREG(0x08)
25 #define S5P_HPLL_LOCK S5P_CLKREG(0x0C)
27 #define S5P_APLL_CON S5P_CLKREG(0x100)
28 #define S5P_MPLL_CON S5P_CLKREG(0x104)
29 #define S5P_EPLL_CON S5P_CLKREG(0x108)
30 #define S5P_HPLL_CON S5P_CLKREG(0x10C)
32 #define S5P_CLK_SRC0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv310/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) macro
20 #define S5P_INFORM0 S5P_CLKREG(0x800)
22 #define S5P_EPLL_CON0 S5P_CLKREG(0x0C110)
23 #define S5P_EPLL_CON1 S5P_CLKREG(0x0C114)
24 #define S5P_VPLL_CON0 S5P_CLKREG(0x0C120)
25 #define S5P_VPLL_CON1 S5P_CLKREG(0x0C124)
27 #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210)
28 #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214)
30 #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250)
32 #define S5P_CLKDIV_TOP S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
22 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
23 #define S5P_MPLL_LOCK S5P_CLKREG(0x04)
24 #define S5P_EPLL_LOCK S5P_CLKREG(0x08)
25 #define S5P_HPLL_LOCK S5P_CLKREG(0x0C)
27 #define S5P_APLL_CON S5P_CLKREG(0x100)
28 #define S5P_MPLL_CON S5P_CLKREG(0x104)
29 #define S5P_EPLL_CON S5P_CLKREG(0x108)
30 #define S5P_HPLL_CON S5P_CLKREG(0x10C)
32 #define S5P_CLK_SRC0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv310/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S5P_VA_CMU + (x)) macro
20 #define S5P_INFORM0 S5P_CLKREG(0x800)
22 #define S5P_EPLL_CON0 S5P_CLKREG(0x0C110)
23 #define S5P_EPLL_CON1 S5P_CLKREG(0x0C114)
24 #define S5P_VPLL_CON0 S5P_CLKREG(0x0C120)
25 #define S5P_VPLL_CON1 S5P_CLKREG(0x0C124)
27 #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210)
28 #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214)
30 #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250)
32 #define S5P_CLKDIV_TOP S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23 #define S5P_VPLL_LOCK S5P_CLKREG(0x20)
25 #define S5P_APLL_CON S5P_CLKREG(0x100)
26 #define S5P_MPLL_CON S5P_CLKREG(0x108)
27 #define S5P_EPLL_CON S5P_CLKREG(0x110)
28 #define S5P_VPLL_CON S5P_CLKREG(0x120)
30 #define S5P_CLK_SRC0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23 #define S5P_VPLL_LOCK S5P_CLKREG(0x20)
25 #define S5P_APLL_CON S5P_CLKREG(0x100)
26 #define S5P_MPLL_CON S5P_CLKREG(0x108)
27 #define S5P_EPLL_CON S5P_CLKREG(0x110)
28 #define S5P_VPLL_CON S5P_CLKREG(0x120)
30 #define S5P_CLK_SRC0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6440/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x04)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x08)
23 #define S5P_APLL_CON S5P_CLKREG(0x0C)
24 #define S5P_MPLL_CON S5P_CLKREG(0x10)
25 #define S5P_EPLL_CON S5P_CLKREG(0x14)
26 #define S5P_EPLL_CON_K S5P_CLKREG(0x18)
27 #define S5P_CLK_SRC0 S5P_CLKREG(0x1C)
28 #define S5P_CLK_DIV0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6440/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x04)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x08)
23 #define S5P_APLL_CON S5P_CLKREG(0x0C)
24 #define S5P_MPLL_CON S5P_CLKREG(0x10)
25 #define S5P_EPLL_CON S5P_CLKREG(0x14)
26 #define S5P_EPLL_CON_K S5P_CLKREG(0x18)
27 #define S5P_CLK_SRC0 S5P_CLKREG(0x1C)
28 #define S5P_CLK_DIV0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6442/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23 #define S5P_VPLL_LOCK S5P_CLKREG(0x20)
25 #define S5P_APLL_CON S5P_CLKREG(0x100)
26 #define S5P_MPLL_CON S5P_CLKREG(0x108)
27 #define S5P_EPLL_CON S5P_CLKREG(0x110)
28 #define S5P_VPLL_CON S5P_CLKREG(0x120)
30 #define S5P_CLK_SRC0 S5P_CLKREG(
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6442/include/mach/
H A Dregs-clock.h18 #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) macro
20 #define S5P_APLL_LOCK S5P_CLKREG(0x00)
21 #define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22 #define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23 #define S5P_VPLL_LOCK S5P_CLKREG(0x20)
25 #define S5P_APLL_CON S5P_CLKREG(0x100)
26 #define S5P_MPLL_CON S5P_CLKREG(0x108)
27 #define S5P_EPLL_CON S5P_CLKREG(0x110)
28 #define S5P_VPLL_CON S5P_CLKREG(0x120)
30 #define S5P_CLK_SRC0 S5P_CLKREG(
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