Searched refs:PCI_PREF_BASE_UPPER32 (Results 1 - 21 of 21) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/pci/
H A Dsetup-bus.c276 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
299 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
372 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
374 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
376 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
379 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
H A Dsetup-res.c128 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
H A Dprobe.c369 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/pci/
H A Dsetup-bus.c276 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
299 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
372 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
374 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
376 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
379 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
H A Dsetup-res.c128 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
H A Dprobe.c369 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/linux/
H A Dpci_regs.h140 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/include/linux/
H A Dpci_regs.h140 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/usr/include/linux/
H A Dpci_regs.h140 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/arm-brcm-linux-uclibcgnueabi/sysroot/usr/include/linux/
H A Dpci_regs.h140 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/arm-linux/sysroot/usr/include/linux/
H A Dpci_regs.h140 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/powerpc/platforms/powermac/
H A Dpci.c1338 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sparc/kernel/
H A Dpci.c443 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/powerpc/platforms/powermac/
H A Dpci.c1338 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sparc/kernel/
H A Dpci.c443 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/ia64/sn/pci/
H A Dtioce_provider.c828 PCI_PREF_BASE_UPPER32, 4, &tmp);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/ia64/sn/pci/
H A Dtioce_provider.c828 PCI_PREF_BASE_UPPER32, 4, &tmp);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/pci/hotplug/
H A Dibmphp_pci.c1007 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, 0x00000000);
H A Dibmphp_res.c2084 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, &upper_start);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/pci/hotplug/
H A Dibmphp_pci.c1007 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, 0x00000000);
H A Dibmphp_res.c2084 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, &upper_start);

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