Searched refs:reg (Results 501 - 525 of 1755) sorted by relevance

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/freebsd-11-stable/sys/dev/etherswitch/e6000sw/
H A De6000sw.c106 static int e6000sw_readphy(device_t dev, int phy, int reg);
107 static int e6000sw_writephy(device_t dev, int phy, int reg, int data);
115 static int e6000sw_readphy_wrapper(device_t dev, int phy, int reg);
116 static int e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data);
127 static __inline void e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg,
130 int reg);
299 * PHY registers are paged. Put page index in reg 22 (accessible from every
303 e6000sw_readphy(device_t dev, int phy, int reg) argument
311 if (phy >= E6000SW_NUM_PHYS || reg >= E6000SW_NUM_PHY_REGS) {
322 val |= (reg << PHY_CMD_REG_ADD
333 e6000sw_writephy(device_t dev, int phy, int reg, int data) argument
524 e6000sw_readphy_wrapper(device_t dev, int phy, int reg) argument
540 e6000sw_writephy_wrapper(device_t dev, int phy, int reg, int data) argument
594 uint32_t reg; local
616 uint32_t reg; local
721 e6000sw_readreg(e6000sw_softc_t *sc, int addr, int reg) argument
730 e6000sw_writereg(e6000sw_softc_t *sc, int addr, int reg, int val) argument
[all...]
/freebsd-11-stable/sys/dev/etherswitch/
H A Detherswitch.h16 uint16_t reg; member in struct:etherswitch_reg
23 uint16_t reg; member in struct:etherswitch_phyreg
/freebsd-11-stable/sys/dev/etherswitch/ip17x/
H A Dip175c.c83 uint32_t ports[IP175X_NUM_PORTS], reg[IP175X_NUM_PORTS/2]; local
106 memset(reg, 0, sizeof(reg));
108 reg[i] = ports[i * 2] << 8 | ports[i * 2 + 1];
111 err = ip17x_writephy(sc->sc_dev, 29, 19, reg[0]);
113 err = ip17x_writephy(sc->sc_dev, 29, 20, reg[1]);
115 err = ip17x_updatephy(sc->sc_dev, 29, 21, 0xff00, reg[2]);
117 err = ip17x_updatephy(sc->sc_dev, 30, 18, 0x00ff, reg[2]);
/freebsd-11-stable/sys/dev/usb/controller/
H A Datmegadci.h174 #define ATMEGA_READ_1(sc, reg) \
175 bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
177 #define ATMEGA_WRITE_1(sc, reg, data) \
178 bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
180 #define ATMEGA_WRITE_MULTI_1(sc, reg, ptr, len) \
181 bus_space_write_multi_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, ptr, len)
183 #define ATMEGA_READ_MULTI_1(sc, reg, ptr, len) \
184 bus_space_read_multi_1((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, ptr, len)
H A Davr32dci.h140 #define AVR32_READ_4(sc, reg) \
141 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
143 #define AVR32_WRITE_4(sc, reg, data) \
144 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
146 #define AVR32_WRITE_MULTI_4(sc, reg, ptr, len) \
147 bus_space_write_multi_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, ptr, len)
149 #define AVR32_READ_MULTI_4(sc, reg, ptr, len) \
150 bus_space_read_multi_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, ptr, len)
/freebsd-11-stable/sys/dev/ixgb/
H A Dixgb_ee.h106 uint16_t reg);
113 uint16_t reg,
/freebsd-11-stable/sys/dev/mge/
H A Dif_mgevar.h119 #define MGE_READ(sc,reg) bus_read_4((sc)->res[0], (reg))
120 #define MGE_WRITE(sc,reg,val) bus_write_4((sc)->res[0], (reg), (val))
180 #define SW_SMI_READ_CMD(phy, reg) ((1 << 15) | (1 << 12) | (1 << 11) | (phy << 5) | reg)
181 #define SW_SMI_WRITE_CMD(phy, reg) ((1 << 15) | (1 << 12) | (1 << 10) | (phy << 5) | reg)
/freebsd-11-stable/sys/sys/
H A Dprocfs.h33 #include <machine/reg.h>
35 typedef struct reg gregset_t;
/freebsd-11-stable/sys/arm/ti/
H A Dti_adc.c106 uint32_t reg; local
117 reg = ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID;
119 reg |= ADC_CTRL_TSC_ENABLE;
122 reg |= ADC_CTRL_TSC_4WIRE;
125 reg |= ADC_CTRL_TSC_5WIRE;
128 reg |= ADC_CTRL_TSC_8WIRE;
134 reg |= ADC_CTRL_ENABLE;
136 ADC_WRITE4(sc, ADC_CTRL, reg);
213 uint32_t reg, val; local
218 reg
261 int error, reg; local
333 int error, reg; local
750 uint32_t rev, reg; local
[all...]
/freebsd-11-stable/sys/arm/lpc/
H A Dlpc_timer.c79 #define timer0_read_4(sc, reg) \
80 bus_space_read_4(sc->lt_bst0, sc->lt_bsh0, reg)
81 #define timer0_write_4(sc, reg, val) \
82 bus_space_write_4(sc->lt_bst0, sc->lt_bsh0, reg, val)
90 #define timer1_read_4(sc, reg) \
91 bus_space_read_4(sc->lt_bst1, sc->lt_bsh1, reg)
92 #define timer1_write_4(sc, reg, val) \
93 bus_space_write_4(sc->lt_bst1, sc->lt_bsh1, reg, val)
/freebsd-11-stable/sys/dev/ixgbe/
H A Dixgbe_osdep.h227 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg(a, reg)
230 #define IXGBE_WRITE_REG(a, reg, val) ixgbe_write_reg(a, reg, val)
233 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
234 ixgbe_read_reg_array(a, reg, offset)
237 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, val) \
238 ixgbe_write_reg_array(a, reg, offset, val)
H A Dixgbe_82599.h56 s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
57 s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
/freebsd-11-stable/sys/dev/iicbus/
H A Dad7418.c77 static int ad7418_read_1(device_t dev, int reg);
78 static int ad7418_write_1(device_t dev, int reg, int v);
143 ad7418_read_1(device_t dev, int reg) argument
145 uint8_t addr = reg;
155 ad7418_write_1(device_t dev, int reg, int v) argument
162 data[0] = reg;
187 ad7418_read_2(device_t dev, int reg) argument
189 uint8_t addr = reg;
/freebsd-11-stable/usr.bin/truss/
H A Damd64-cloudabi64.c44 struct reg regs;
73 struct reg regs;
H A Daarch64-cloudabi64.c44 struct reg regs;
64 struct reg regs;
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/FreeBSD/
H A DRegisterContextPOSIXProcessMonitor_arm.h32 bool ReadRegister(const unsigned reg, lldb_private::RegisterValue &value);
34 bool WriteRegister(const unsigned reg,
H A DRegisterContextPOSIXProcessMonitor_arm64.h33 bool ReadRegister(const unsigned reg, lldb_private::RegisterValue &value);
35 bool WriteRegister(const unsigned reg,
H A DRegisterContextPOSIXProcessMonitor_mips64.h34 bool ReadRegister(const unsigned reg, lldb_private::RegisterValue &value);
36 bool WriteRegister(const unsigned reg,
H A DRegisterContextPOSIXProcessMonitor_powerpc.h40 bool ReadRegister(const unsigned reg, lldb_private::RegisterValue &value);
42 bool WriteRegister(const unsigned reg,
H A DRegisterContextPOSIXProcessMonitor_x86.h34 bool ReadRegister(const unsigned reg, lldb_private::RegisterValue &value);
36 bool WriteRegister(const unsigned reg,
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/minidump/
H A DRegisterContextMinidump_ARM64.h42 const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
48 const char *GetRegisterName(unsigned reg);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp142 for (unsigned reg = X86::YMM0; reg <= X86::YMM15; ++reg) {
143 if (!MO.clobbersPhysReg(reg))
146 for (unsigned reg = X86::ZMM0; reg <= X86::ZMM15; ++reg) {
147 if (!MO.clobbersPhysReg(reg))
/freebsd-11-stable/sys/dev/usb/net/
H A Dif_ure.c219 ure_read_1(struct ure_softc *sc, uint16_t reg, uint16_t index) argument
225 shift = (reg & 3) << 3;
226 reg &= ~3;
228 ure_read_mem(sc, reg, index, &temp, 4);
236 ure_read_2(struct ure_softc *sc, uint16_t reg, uint16_t index) argument
242 shift = (reg & 2) << 3;
243 reg &= ~3;
245 ure_read_mem(sc, reg, index, &temp, 4);
253 ure_read_4(struct ure_softc *sc, uint16_t reg, uint16_t index) argument
257 ure_read_mem(sc, reg, inde
262 ure_write_1(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val) argument
283 ure_write_2(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val) argument
304 ure_write_4(struct ure_softc *sc, uint16_t reg, uint16_t index, uint32_t val) argument
315 uint16_t reg; local
326 uint16_t reg; local
335 ure_miibus_readreg(device_t dev, int phy, int reg) argument
354 ure_miibus_writereg(device_t dev, int phy, int reg, int val) argument
[all...]
/freebsd-11-stable/sys/dev/ste/
H A Dif_stereg.h481 #define CSR_WRITE_4(sc, reg, val) \
482 bus_write_4((sc)->ste_res, reg, val)
483 #define CSR_WRITE_2(sc, reg, val) \
484 bus_write_2((sc)->ste_res, reg, val)
485 #define CSR_WRITE_1(sc, reg, val) \
486 bus_write_1((sc)->ste_res, reg, val)
488 #define CSR_READ_4(sc, reg) \
489 bus_read_4((sc)->ste_res, reg)
490 #define CSR_READ_2(sc, reg) \
491 bus_read_2((sc)->ste_res, reg)
[all...]
/freebsd-11-stable/sys/dev/stge/
H A Dif_stgereg.h88 #define CSR_WRITE_4(_sc, reg, val) \
89 bus_write_4((_sc)->sc_res[0], (reg), (val))
90 #define CSR_WRITE_2(_sc, reg, val) \
91 bus_write_2((_sc)->sc_res[0], (reg), (val))
92 #define CSR_WRITE_1(_sc, reg, val) \
93 bus_write_1((_sc)->sc_res[0], (reg), (val))
95 #define CSR_READ_4(_sc, reg) \
96 bus_read_4((_sc)->sc_res[0], (reg))
97 #define CSR_READ_2(_sc, reg) \
98 bus_read_2((_sc)->sc_res[0], (reg))
[all...]

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