Lines Matching refs:reg
106 uint32_t reg;
117 reg = ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID;
119 reg |= ADC_CTRL_TSC_ENABLE;
122 reg |= ADC_CTRL_TSC_4WIRE;
125 reg |= ADC_CTRL_TSC_5WIRE;
128 reg |= ADC_CTRL_TSC_8WIRE;
134 reg |= ADC_CTRL_ENABLE;
136 ADC_WRITE4(sc, ADC_CTRL, reg);
213 uint32_t reg, val;
218 reg = input->stepconfig;
219 val = ADC_READ4(sc, reg);
241 ADC_WRITE4(sc, reg, val);
261 int error, reg;
267 reg = (int)ADC_READ4(sc, ADC_CLKDIV) + 1;
270 error = sysctl_handle_int(oidp, ®, sizeof(reg), req);
279 reg--;
280 if (reg < 9)
281 reg = 9;
282 if (reg > USHRT_MAX)
283 reg = USHRT_MAX;
289 ADC_WRITE4(sc, ADC_CLKDIV, reg);
333 int error, reg;
341 reg = (int)ADC_READ4(sc, input->stepdelay) & ADC_STEP_OPEN_DELAY;
344 error = sysctl_handle_int(oidp, ®, sizeof(reg), req);
348 if (reg < 0)
349 reg = 0;
352 ADC_WRITE4(sc, input->stepdelay, reg & ADC_STEP_OPEN_DELAY);
750 uint32_t rev, reg;
855 reg = ADC_READ4(sc, ADC_CTRL);
856 ADC_WRITE4(sc, ADC_CTRL, reg | ADC_CTRL_STEP_WP | ADC_CTRL_STEP_ID);