Searched refs:phy (Results 51 - 75 of 112) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/network/ether/intel22x/dev/igc/
H A Digc_i225.c95 hw->phy.media_type = igc_media_type_copper;
137 struct igc_phy_info *phy = &hw->phy; local
143 if (hw->phy.media_type != igc_media_type_copper) {
144 phy->type = igc_phy_none;
148 phy->ops.power_up = igc_power_up_phy_copper;
149 phy->ops.power_down = igc_power_down_phy_copper_base;
151 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500;
153 phy->reset_delay_us = 100;
155 phy
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H A Digc_mac.c535 /* In the case of the phy reset being blocked, we already have a link.
538 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
731 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
734 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
749 ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
753 ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
H A Dif_igc.c574 hw->phy.autoneg_wait_to_complete = false;
575 hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
578 if (hw->phy.media_type == igc_media_type_copper) {
579 hw->phy.mdix = AUTO_ALL_MODES;
1049 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1052 adapter->hw.phy.autoneg_advertised = ADVERTISE_2500_FULL;
1055 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1059 adapter->hw.phy.autoneg_advertised = ADVERTISE_100_FULL;
1061 adapter->hw.phy.autoneg_advertised = ADVERTISE_100_HALF;
1065 adapter->hw.phy
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/haiku/src/libs/compat/freebsd_network/
H A Dfbsd_mii.c240 device_t *children, phy; local
267 phy = device_add_child(dev, name, unit);
268 if (phy == NULL) {
278 device_set_ivars(phy, ma);
290 miibus_readreg(device_t dev, int phy, int reg) argument
295 return (MIIBUS_READREG(parent, phy, reg));
299 miibus_writereg(device_t dev, int phy, int reg, int data) argument
304 return (MIIBUS_WRITEREG(parent, phy, reg, data));
373 device_t *children, phy; local
497 phy
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/haiku/src/add-ons/kernel/drivers/network/ether/wb840/
H A Dinterface.c226 wb_miibus_readreg(wb_device *device, int phy, int reg) argument
232 frame.mii_phyaddr = phy;
241 wb_miibus_writereg(wb_device *device, int phy, int reg, int data) argument
247 frame.mii_phyaddr = phy;
/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/
H A De1000_vf.c65 hw->phy.type = e1000_phy_vf;
66 hw->phy.ops.acquire = e1000_acquire_vf;
67 hw->phy.ops.release = e1000_release_vf;
104 hw->phy.media_type = e1000_media_type_unknown;
151 hw->phy.ops.init_params = e1000_init_phy_params_vf;
H A De1000_mac.c1016 /* In the case of the phy reset being blocked, we already have a link.
1019 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
1218 if (hw->phy.media_type == e1000_media_type_internal_serdes ||
1374 if (hw->phy.media_type == e1000_media_type_fiber ||
1375 hw->phy.media_type == e1000_media_type_internal_serdes)
1378 if (hw->phy.media_type == e1000_media_type_copper)
1392 if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
1397 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
1400 ret_val = hw->phy
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H A De1000_82542.c61 struct e1000_phy_info *phy = &hw->phy; local
66 phy->type = e1000_phy_none;
108 hw->phy.media_type = e1000_media_type_fiber;
127 /* phy/fiber/serdes setup */
166 hw->phy.ops.init_params = e1000_init_phy_params_82542;
H A De1000_i210.c688 switch (hw->phy.media_type) {
717 hw->phy.ops.acquire(hw);
772 hw->phy.ops.release(hw);
823 hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
H A Dif_em.c1015 hw->phy.autoneg_wait_to_complete = false;
1016 hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1023 if (hw->phy.media_type == e1000_media_type_copper) {
1024 hw->phy.mdix = AUTO_ALL_MODES;
1025 hw->phy.disable_polarity_correction = false;
1026 hw->phy.ms_type = EM_MASTER_SLAVE;
1393 sc->hw.phy.media_type == e1000_media_type_copper) {
1582 if ((sc->hw.phy.media_type == e1000_media_type_fiber) ||
1583 (sc->hw.phy.media_type == e1000_media_type_internal_serdes)) {
1628 sc->hw.phy
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_rate/sample/
H A Dsample.h158 * XXX getting mac/phy level timings should be fixed for turbo
162 switch (rt->info[rix].phy) {
190 rt->info[rix].phy == IEEE80211_T_OFDM) {
H A Dsample.c188 if (rt->info[rix0].phy != IEEE80211_T_HT) {
299 return rt->info[rix].phy == IEEE80211_T_HT ?
308 return rt->info[rix].phy == IEEE80211_T_HT ? "MCS" : "Mb ";
333 (rt->info[rix].phy != IEEE80211_T_HT)) {
463 (rt->info[rix].phy != IEEE80211_T_HT)) {
590 if (rt->info[rix].phy == IEEE80211_T_HT)
632 if (rt->info[rix].phy == IEEE80211_T_HT)
636 if (rt->info[rix].phy != IEEE80211_T_HT)
860 (rt->info[best_rix].phy == IEEE80211_T_HT) ?
1473 if (rt->info[y].phy
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/haiku/src/libs/compat/freebsd_wlan/net80211/
H A Dieee80211_phy.h90 uint8_t phy; /* CCK/OFDM/TURBO */ member in struct:ieee80211_rate_table::__anon51
151 return (enum ieee80211_phytype)rt->info[rix].phy;
171 * sent using rate, phy and short preamble setting.
201 * using the specified 802.11 rate code, phy, and short preamble
H A Dieee80211_proto.c1484 _setifsparams(struct wmeParams *wmep, const paramType *phy) argument
1486 wmep->wmep_aifsn = phy->aifsn;
1487 wmep->wmep_logcwmin = phy->logcwmin;
1488 wmep->wmep_logcwmax = phy->logcwmax;
1489 wmep->wmep_txopLimit = phy->txopLimit;
1494 struct wmeParams *wmep, const paramType *phy)
1496 wmep->wmep_acm = phy->acm;
1497 _setifsparams(wmep, phy);
1493 setwmeparams(struct ieee80211vap *vap, const char *type, int ac, struct wmeParams *wmep, const paramType *phy) argument
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8192c/
H A Dr92c_rx.c84 struct r92c_rx_phystat *phy = (struct r92c_rx_phystat *)physt; local
88 rssi = ((phy->pwdb_all >> 1) & 0x7f) - 110;
/haiku/src/add-ons/kernel/drivers/network/wlan/broadcom43xx/dev/bwi/
H A Dbwimac.c596 struct bwi_phy *phy = &mac->mac_phy; local
622 if (phy->phy_mode == IEEE80211_MODE_11A) {
648 if (phy->phy_mode == IEEE80211_MODE_11G) {
661 if (phy->phy_mode == IEEE80211_MODE_11G) {
761 struct bwi_phy *phy = &mac->mac_phy; local
766 KASSERT(phy->phy_mode != IEEE80211_MODE_11A,
767 ("phy_mode %d", phy->phy_mode));
775 if (phy->phy_mode == IEEE80211_MODE_11G) {
776 if ((phy->phy_flags & BWI_PHY_F_LINKED) == 0)
783 if (phy
1310 struct bwi_phy *phy = &mac->mac_phy; local
1339 struct bwi_phy *phy = &mac->mac_phy; local
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/haiku/src/add-ons/kernel/bus_managers/virtio/
H A DVirtioQueue.cpp18 alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection, argument
43 if (phy)
44 *phy = pe.address;
45 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %#" B_PRIxPHYSADDR "\n",
/haiku/src/add-ons/kernel/drivers/network/ether/pegasus/
H A Ddriver.h115 uint16 phy; member in struct:_pegasus_dev
/haiku/src/libs/compat/freebsd_network/compat/sys/
H A Dhaiku-module.h43 typedef int miibus_readreg_t(device_t dev, int phy, int reg);
44 typedef int miibus_writereg_t(device_t dev, int phy, int reg, int data);
/haiku/src/add-ons/kernel/drivers/network/ether/syskonnect/dev/sk/
H A Dif_sk.c470 sk_miibus_readreg(dev, phy, reg)
472 int phy, reg;
482 v = sk_xmac_miibus_readreg(sc_if, phy, reg);
487 v = sk_marv_miibus_readreg(sc_if, phy, reg);
499 sk_miibus_writereg(dev, phy, reg, val)
501 int phy, reg, val;
511 v = sk_xmac_miibus_writereg(sc_if, phy, reg, val);
516 v = sk_marv_miibus_writereg(sc_if, phy, reg, val);
552 sk_xmac_miibus_readreg(sc_if, phy, reg)
554 int phy, re
1329 int error, i, phy, port; local
3380 u_int32_t phy, v; local
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/haiku/src/add-ons/kernel/drivers/network/ether/pcnet/dev/pcn/
H A Dif_pcn.c271 pcn_miibus_readreg(dev, phy, reg)
273 int phy, reg;
297 if (((sc->pcn_type == Am79C971 && phy != PCN_PHYAD_10BT) ||
300 phy != sc->pcn_extphyaddr)
303 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5));
308 if (((sc->pcn_type == Am79C971 && phy != PCN_PHYAD_10BT) ||
311 sc->pcn_extphyaddr = phy;
317 pcn_miibus_writereg(dev, phy, reg, data)
319 int phy, reg, data;
325 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy <<
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/haiku/headers/private/virtio/
H A Dvirtio.h97 status_t (*setup_queue)(void* cookie, uint16 queue, phys_addr_t phy, phys_addr_t phyAvail,
/haiku/src/add-ons/kernel/drivers/network/wlan/ralinkwifi/dev/ral/
H A Drt2860.c1188 uint16_t phy; local
1295 phy = le16toh(rxwi->phy);
1296 switch (phy & RT2860_PHY_MODE) {
1298 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) {
1304 if (phy & RT2860_PHY_SHPRE)
1308 switch (phy & RT2860_PHY_MCS) {
1530 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1531 txwi->phy = htole16(RT2860_PHY_CCK);
1536 txwi->phy
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/haiku/src/add-ons/kernel/drivers/network/ether/rtl8139/dev/rl/
H A Dif_rl.c392 rl_miibus_readreg(device_t dev, int phy, int reg) argument
428 device_printf(sc->rl_dev, "bad phy register\n");
434 return (mii_bitbang_readreg(dev, &rl_mii_bitbang_ops, phy, reg));
438 rl_miibus_writereg(device_t dev, int phy, int reg, int data) argument
467 device_printf(sc->rl_dev, "bad phy register\n");
474 mii_bitbang_writereg(dev, &rl_mii_bitbang_ops, phy, reg, data);
645 int error = 0, hwrev, i, phy, pmc, rid; local
795 phy = MII_PHY_ANY;
797 phy = RL_PHYAD_INTERNAL;
799 rl_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_AN
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/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/
H A Dif_ath_ioctl.c267 if (rt->info[sc->sc_txrix].phy & IEEE80211_T_HT)

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