Searched refs:plane (Results 251 - 275 of 366) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_display.c867 * but we should convert it to a modifier plane for getfb2, so the
869 * plane internally.
979 static int amdgpu_display_verify_plane(struct amdgpu_framebuffer *rfb, int plane, argument
985 ((plane && plane < format->num_planes) ? format->hsub : 1);
987 ((plane && plane < format->num_planes) ? format->vsub : 1);
988 unsigned int cpp = plane < format->num_planes ? format->cpp[plane] : 1;
994 if (rfb->base.pitches[plane]
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/linux-master/drivers/gpu/drm/i915/
H A Di915_vma.c1039 for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
1040 sg = rotate_pages(obj, rot_info->plane[i].offset,
1041 rot_info->plane[i].width, rot_info->plane[i].height,
1042 rot_info->plane[i].src_stride,
1043 rot_info->plane[i].dst_stride,
1053 obj->base.size, rot_info->plane[0].width,
1054 rot_info->plane[0].height, size);
1203 if (rem_info->plane[color_plane].linear)
1205 rem_info->plane[color_plan
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c597 * if source plane has been removed
896 struct dc_plane_state *plane = NULL; local
925 plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL);
927 if (stream && plane) {
929 plane->address.grph.cursor_cache_addr.quad_part;
945 plane->format <= SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F &&
946 plane->format >= SURFACE_PIXEL_FORMAT_GRPH_ARGB8888 &&
947 plane->address.page_table_base.quad_part == 0 &&
949 dc->hwss.does_plane_fit_in_mall(dc, plane,
1036 (plane
1079 dcn30_does_plane_fit_in_mall(struct dc *dc, struct dc_plane_state *plane, struct dc_cursor_attributes *cursor_attr) argument
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/linux-master/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddss_features.c833 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) argument
835 return omap_current_dss_features->supported_color_modes[plane];
839 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) argument
841 return omap_current_dss_features->overlay_caps[plane];
844 bool dss_feat_color_mode_supported(enum omap_plane plane, argument
847 return omap_current_dss_features->supported_color_modes[plane] &
/linux-master/drivers/gpu/drm/sun4i/
H A Dsun4i_frontend.c157 struct drm_plane *plane)
159 struct drm_plane_state *state = plane->state;
403 struct drm_plane *plane, uint32_t out_fmt)
405 struct drm_plane_state *state = plane->state;
496 struct drm_plane *plane)
498 struct drm_plane_state *state = plane->state;
156 sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, struct drm_plane *plane) argument
402 sun4i_frontend_update_formats(struct sun4i_frontend *frontend, struct drm_plane *plane, uint32_t out_fmt) argument
495 sun4i_frontend_update_coord(struct sun4i_frontend *frontend, struct drm_plane *plane) argument
/linux-master/drivers/gpu/drm/udl/
H A Dudl_modeset.c250 * Primary plane
263 static int udl_primary_plane_helper_atomic_check(struct drm_plane *plane, argument
266 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
279 static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane, argument
282 struct drm_device *dev = plane->dev;
283 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
286 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
292 return; /* no framebuffer; plane is disabled */
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_crtc.c327 struct intel_plane *plane; local
330 plane = skl_universal_plane_create(dev_priv, pipe,
333 plane = intel_sprite_plane_create(dev_priv, pipe, sprite);
334 if (IS_ERR(plane)) {
335 ret = PTR_ERR(plane);
338 crtc->plane_ids_mask |= BIT(plane->id);
H A Dintel_wm.c17 * and plane configuration.
36 * surface width = hdisplay for normal plane and 64 for cursor
126 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); local
140 if (plane->id == PLANE_CURSOR)
H A Dintel_fb.h42 bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier);
H A Dintel_display_driver.c171 struct intel_plane *plane; local
173 for_each_intel_plane(&dev_priv->drm, plane) {
175 plane->pipe);
177 plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
H A Dintel_load_detect.c25 struct drm_plane *plane; local
33 for_each_new_plane_in_state(state, plane, plane_state, i) {
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_crtc.h270 * @plane: base plane
271 * @cursor: cursor plane
274 struct drm_crtc *dpu_crtc_init(struct drm_device *dev, struct drm_plane *plane,
/linux-master/drivers/gpu/drm/
H A Ddrm_gem_framebuffer_helper.c44 * @plane: Plane index
50 * Pointer to &drm_gem_object for the given framebuffer and plane index or NULL
54 unsigned int plane)
58 if (drm_WARN_ON_ONCE(dev, plane >= ARRAY_SIZE(fb->obj)))
60 else if (drm_WARN_ON_ONCE(dev, !fb->obj[plane]))
63 return fb->obj[plane];
194 "GEM object size (%zu) smaller than minimum size (%u) for plane %d\n",
53 drm_gem_fb_get_obj(struct drm_framebuffer *fb, unsigned int plane) argument
/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_drv.h181 /* Primary-plane format; required for modesetting and color mgmt. */
374 int mgag200_primary_plane_helper_atomic_check(struct drm_plane *plane,
376 void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane,
378 void mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane,
380 void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,
/linux-master/drivers/gpu/drm/amd/display/modules/inc/
H A Dmod_freesync.h146 const struct dc_plane_state *plane,
/linux-master/drivers/gpu/drm/tiny/
H A Dsimpledrm.c582 static int simpledrm_primary_plane_helper_atomic_check(struct drm_plane *plane, argument
585 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
591 struct drm_device *dev = plane->dev;
620 static void simpledrm_primary_plane_helper_atomic_update(struct drm_plane *plane, argument
623 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
624 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
627 struct drm_device *dev = plane->dev;
658 static void simpledrm_primary_plane_helper_atomic_disable(struct drm_plane *plane, argument
661 struct drm_device *dev = plane->dev;
698 * the primary plane'
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/linux-master/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_pipeline_state.c134 * - The direct user: can be plane/crtc/wb_connector depends on component
138 * kms_plane, but kms plane will be binding to a CRTC eventually.
354 plane_st->state, plane_st->plane, plane_st->crtc);
887 struct drm_plane *plane = kplane_st->base.plane; local
892 layer->base.name, plane->base.id, plane->name,
900 err = komeda_scaler_validate(plane, kcrtc_st, dflow);
1067 /* For layer split, a plane state will be split to two data flows and handled
1090 struct drm_plane *plane local
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H A Dkomeda_crtc.c598 struct drm_plane *plane; local
600 drm_for_each_plane(plane, &kms->base) {
601 if (plane->type != DRM_PLANE_TYPE_PRIMARY)
604 kplane = to_kplane(plane);
607 return plane;
/linux-master/drivers/gpu/drm/ingenic/
H A Dingenic-drm.h226 struct drm_plane *plane, u32 fourcc);
227 void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane);
/linux-master/drivers/gpu/drm/tests/
H A Ddrm_damage_helper_test.c19 struct drm_plane plane; member in struct:drm_damage_mock
40 mock->old_state.plane = &mock->plane;
41 mock->state.plane = &mock->plane;
46 mock->plane.dev = &mock->device;
48 mock->plane.base.properties = &mock->obj_props;
52 drm_plane_enable_fb_damage_clips(&mock->plane);
113 KUNIT_FAIL(test, "Damage cannot be outside rounded plane src.");
133 KUNIT_EXPECT_EQ_MSG(test, num_hits, 1, "Should return plane sr
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/linux-master/drivers/gpu/drm/hyperv/
H A Dhyperv_drm_modeset.c139 struct drm_plane_state *state = pipe->plane.state;
179 drm_plane_enable_fb_damage_clips(&hv->pipe.plane);
/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h207 * | | plane 0 | slice 0 | |
209 * | | plane 1 | | | | |
211 * | | plane 0 | slice 1 | | |
213 * | | plane 1 | | | |
247 * or may not have a plane. If it has a plane it blends it as the left
248 * most MPC slice of the top most layer. If it doesn't have a plane it
257 * a plane. If it has a plane it blends it as the top most layer within
258 * its own ODM slice. If it doesn't have a plane i
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/linux-master/include/linux/mtd/
H A Dnand.h70 * @plane: the plane within the LUN
80 unsigned int plane; member in struct:nand_pos
756 pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;
846 pos->plane = 0;
868 pos->plane = 0;
888 pos->plane = pos->eraseblock % nand->memorg.planes_per_lun;
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_ldu.c252 * but since for LDU the display plane is closely tied to the
253 * CRTC, it makes more sense to do those at plane update time.
331 vmw_ldu_primary_plane_atomic_update(struct drm_plane *plane, argument
335 plane);
337 plane);
345 dev_priv = vmw_priv(plane->dev);
375 drm_WARN_ONCE(plane->dev, ret,
461 /* Initialize primary plane */
468 DRM_ERROR("Failed to initialize primary plane");
478 /* Initialize cursor plane */
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c960 static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane, argument
972 if (context->stream_status[i].plane_states[j] == plane &&
984 static unsigned int map_plane_to_dml_display_cfg(const struct dml2_context *dml2, const struct dc_plane_state *plane, argument
991 if (!get_plane_id(context->bw_ctx.dml2, context, plane, stream_id, plane_index, &plane_id)) {
1071 dml_dispcfg->plane.GPUVMEnable = dml2->v20.dml_core_ctx.ip.gpuvm_enable;
1072 dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels;
1073 dml_dispcfg->plane.HostVMEnable = dml2->v20.dml_core_ctx.ip.hostvm_enable;
1074 dml_dispcfg->plane.HostVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.hostvm_max_page_table_levels;
1118 populate_dummy_dml_plane_cfg(&dml_dispcfg->plane, disp_cfg_plane_location, context->streams[i]);
1120 dml_dispcfg->plane
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