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19ecbe83 |
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03-Aug-2023 |
baozhu.liu <lucas.liu@siengine.com> |
drm/komeda: drop all currently held locks if deadlock happens If komeda_pipeline_unbound_components() returns -EDEADLK, it means that a deadlock happened in the locking context. Currently, komeda is not dealing with the deadlock properly,producing the following output when CONFIG_DEBUG_WW_MUTEX_SLOWPATH is enabled: ------------[ cut here ]------------ [ 26.103984] WARNING: CPU: 2 PID: 345 at drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c:1248 komeda_release_unclaimed_resources+0x13c/0x170 [ 26.117453] Modules linked in: [ 26.120511] CPU: 2 PID: 345 Comm: composer@2.1-se Kdump: loaded Tainted: G W 5.10.110-SE-SDK1.8-dirty #16 [ 26.131374] Hardware name: Siengine Se1000 Evaluation board (DT) [ 26.137379] pstate: 20400009 (nzCv daif +PAN -UAO -TCO BTYPE=--) [ 26.143385] pc : komeda_release_unclaimed_resources+0x13c/0x170 [ 26.149301] lr : komeda_release_unclaimed_resources+0xbc/0x170 [ 26.155130] sp : ffff800017b8b8d0 [ 26.158442] pmr_save: 000000e0 [ 26.161493] x29: ffff800017b8b8d0 x28: ffff000cf2f96200 [ 26.166805] x27: ffff000c8f5a8800 x26: 0000000000000000 [ 26.172116] x25: 0000000000000038 x24: ffff8000116a0140 [ 26.177428] x23: 0000000000000038 x22: ffff000cf2f96200 [ 26.182739] x21: ffff000cfc300300 x20: ffff000c8ab77080 [ 26.188051] x19: 0000000000000003 x18: 0000000000000000 [ 26.193362] x17: 0000000000000000 x16: 0000000000000000 [ 26.198672] x15: b400e638f738ba38 x14: 0000000000000000 [ 26.203983] x13: 0000000106400a00 x12: 0000000000000000 [ 26.209294] x11: 0000000000000000 x10: 0000000000000000 [ 26.214604] x9 : ffff800012f80000 x8 : ffff000ca3308000 [ 26.219915] x7 : 0000000ff3000000 x6 : ffff80001084034c [ 26.225226] x5 : ffff800017b8bc40 x4 : 000000000000000f [ 26.230536] x3 : ffff000ca3308000 x2 : 0000000000000000 [ 26.235847] x1 : 0000000000000000 x0 : ffffffffffffffdd [ 26.241158] Call trace: [ 26.243604] komeda_release_unclaimed_resources+0x13c/0x170 [ 26.249175] komeda_crtc_atomic_check+0x68/0xf0 [ 26.253706] drm_atomic_helper_check_planes+0x138/0x1f4 [ 26.258929] komeda_kms_check+0x284/0x36c [ 26.262939] drm_atomic_check_only+0x40c/0x714 [ 26.267381] drm_atomic_nonblocking_commit+0x1c/0x60 [ 26.272344] drm_mode_atomic_ioctl+0xa3c/0xb8c [ 26.276787] drm_ioctl_kernel+0xc4/0x120 [ 26.280708] drm_ioctl+0x268/0x534 [ 26.284109] __arm64_sys_ioctl+0xa8/0xf0 [ 26.288030] el0_svc_common.constprop.0+0x80/0x240 [ 26.292817] do_el0_svc+0x24/0x90 [ 26.296132] el0_svc+0x20/0x30 [ 26.299185] el0_sync_handler+0xe8/0xf0 [ 26.303018] el0_sync+0x1a4/0x1c0 [ 26.306330] irq event stamp: 0 [ 26.309384] hardirqs last enabled at (0): [<0000000000000000>] 0x0 [ 26.315650] hardirqs last disabled at (0): [<ffff800010056d34>] copy_process+0x5d0/0x183c [ 26.323825] softirqs last enabled at (0): [<ffff800010056d34>] copy_process+0x5d0/0x183c [ 26.331997] softirqs last disabled at (0): [<0000000000000000>] 0x0 [ 26.338261] ---[ end trace 20ae984fa860184a ]--- [ 26.343021] ------------[ cut here ]------------ [ 26.347646] WARNING: CPU: 3 PID: 345 at drivers/gpu/drm/drm_modeset_lock.c:228 drm_modeset_drop_locks+0x84/0x90 [ 26.357727] Modules linked in: [ 26.360783] CPU: 3 PID: 345 Comm: composer@2.1-se Kdump: loaded Tainted: G W 5.10.110-SE-SDK1.8-dirty #16 [ 26.371645] Hardware name: Siengine Se1000 Evaluation board (DT) [ 26.377647] pstate: 20400009 (nzCv daif +PAN -UAO -TCO BTYPE=--) [ 26.383649] pc : drm_modeset_drop_locks+0x84/0x90 [ 26.388351] lr : drm_mode_atomic_ioctl+0x860/0xb8c [ 26.393137] sp : ffff800017b8bb10 [ 26.396447] pmr_save: 000000e0 [ 26.399497] x29: ffff800017b8bb10 x28: 0000000000000001 [ 26.404807] x27: 0000000000000038 x26: 0000000000000002 [ 26.410115] x25: ffff000cecbefa00 x24: ffff000cf2f96200 [ 26.415423] x23: 0000000000000001 x22: 0000000000000018 [ 26.420731] x21: 0000000000000001 x20: ffff800017b8bc10 [ 26.426039] x19: 0000000000000000 x18: 0000000000000000 [ 26.431347] x17: 0000000002e8bf2c x16: 0000000002e94c6b [ 26.436655] x15: 0000000002ea48b9 x14: ffff8000121f0300 [ 26.441963] x13: 0000000002ee2ca8 x12: ffff80001129cae0 [ 26.447272] x11: ffff800012435000 x10: ffff000ed46b5e88 [ 26.452580] x9 : ffff000c9935e600 x8 : 0000000000000000 [ 26.457888] x7 : 000000008020001e x6 : 000000008020001f [ 26.463196] x5 : ffff80001085fbe0 x4 : fffffe0033a59f20 [ 26.468504] x3 : 000000008020001e x2 : 0000000000000000 [ 26.473813] x1 : 0000000000000000 x0 : ffff000c8f596090 [ 26.479122] Call trace: [ 26.481566] drm_modeset_drop_locks+0x84/0x90 [ 26.485918] drm_mode_atomic_ioctl+0x860/0xb8c [ 26.490359] drm_ioctl_kernel+0xc4/0x120 [ 26.494278] drm_ioctl+0x268/0x534 [ 26.497677] __arm64_sys_ioctl+0xa8/0xf0 [ 26.501598] el0_svc_common.constprop.0+0x80/0x240 [ 26.506384] do_el0_svc+0x24/0x90 [ 26.509697] el0_svc+0x20/0x30 [ 26.512748] el0_sync_handler+0xe8/0xf0 [ 26.516580] el0_sync+0x1a4/0x1c0 [ 26.519891] irq event stamp: 0 [ 26.522943] hardirqs last enabled at (0): [<0000000000000000>] 0x0 [ 26.529207] hardirqs last disabled at (0): [<ffff800010056d34>] copy_process+0x5d0/0x183c [ 26.537379] softirqs last enabled at (0): [<ffff800010056d34>] copy_process+0x5d0/0x183c [ 26.545550] softirqs last disabled at (0): [<0000000000000000>] 0x0 [ 26.551812] ---[ end trace 20ae984fa860184b ]--- According to the call trace information,it can be located to be WARN_ON(IS_ERR(c_st)) in the komeda_pipeline_unbound_components function; Then follow the function. komeda_pipeline_unbound_components -> komeda_component_get_state_and_set_user -> komeda_pipeline_get_state_and_set_crtc -> komeda_pipeline_get_state ->drm_atomic_get_private_obj_state -> drm_atomic_get_private_obj_state -> drm_modeset_lock komeda_pipeline_unbound_components -> komeda_component_get_state_and_set_user -> komeda_component_get_state -> drm_atomic_get_private_obj_state -> drm_modeset_lock ret = drm_modeset_lock(&obj->lock, state->acquire_ctx); if (ret) return ERR_PTR(ret); Here it return -EDEADLK. deal with the deadlock as suggested by [1], using the function drm_modeset_backoff(). [1] https://docs.kernel.org/gpu/drm-kms.html?highlight=kms#kms-locking Therefore, handling this problem can be solved by adding return -EDEADLK back to the drm_modeset_backoff processing flow in the drm_mode_atomic_ioctl function. Signed-off-by: baozhu.liu <lucas.liu@siengine.com> Signed-off-by: menghui.huang <menghui.huang@siengine.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230804013117.6870-1-menghui.huang@siengine.com
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f9bff0e3 |
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02-Aug-2023 |
Matthew Wilcox (Oracle) <willy@infradead.org> |
minmax: add in_range() macro Patch series "New page table range API", v6. This patchset changes the API used by the MM to set up page table entries. The four APIs are: set_ptes(mm, addr, ptep, pte, nr) update_mmu_cache_range(vma, addr, ptep, nr) flush_dcache_folio(folio) flush_icache_pages(vma, page, nr) flush_dcache_folio() isn't technically new, but no architecture implemented it, so I've done that for them. The old APIs remain around but are mostly implemented by calling the new interfaces. The new APIs are based around setting up N page table entries at once. The N entries belong to the same PMD, the same folio and the same VMA, so ptep++ is a legitimate operation, and locking is taken care of for you. Some architectures can do a better job of it than just a loop, but I have hesitated to make too deep a change to architectures I don't understand well. One thing I have changed in every architecture is that PG_arch_1 is now a per-folio bit instead of a per-page bit when used for dcache clean/dirty tracking. This was something that would have to happen eventually, and it makes sense to do it now rather than iterate over every page involved in a cache flush and figure out if it needs to happen. The point of all this is better performance, and Fengwei Yin has measured improvement on x86. I suspect you'll see improvement on your architecture too. Try the new will-it-scale test mentioned here: https://lore.kernel.org/linux-mm/20230206140639.538867-5-fengwei.yin@intel.com/ You'll need to run it on an XFS filesystem and have CONFIG_TRANSPARENT_HUGEPAGE set. This patchset is the basis for much of the anonymous large folio work being done by Ryan, so it's received quite a lot of testing over the last few months. This patch (of 38): Determine if a value lies within a range more efficiently (subtraction + comparison vs two comparisons and an AND). It also has useful (under some circumstances) behaviour if the range exceeds the maximum value of the type. Convert all the conflicting definitions of in_range() within the kernel; some can use the generic definition while others need their own definition. Link: https://lkml.kernel.org/r/20230802151406.3735276-1-willy@infradead.org Link: https://lkml.kernel.org/r/20230802151406.3735276-2-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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b62cc8fa |
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26-May-2022 |
pengfuyuan <pengfuyuan@kylinos.cn> |
drm/arm: Fix spelling typo in comments Fix spelling typo in comments. Reported-by: k2ci <kernel-bot@kylinos.cn> Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220426121639.39160-1-pengfuyuan@kylinos.cn
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a1c3be89 |
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04-Feb-2021 |
Carsten Haitzler <carsten.haitzler@arm.com> |
drm/komeda: Fix bit check to import to value of proper type Another issue found by KASAN. The bit finding is buried inside the dp_for_each_set_bit() macro (that passes on to for_each_set_bit() that calls the bit stuff. These bit functions want an unsigned long pointer as input and just dumbly casting leads to out-of-bounds accesses. This fixes that. Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Reviewed-by: James Qian Wang <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210204131102.68658-1-carsten.haitzler@foss.arm.com
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a24cf238 |
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27-Nov-2020 |
Carsten Haitzler <carsten.haitzler@arm.com> |
drm/komeda: Handle NULL pointer access code path in error case komeda_component_get_old_state() technically can return a NULL pointer. komeda_compiz_set_input() even warns when this happens, but then proceeeds to use that NULL pointer to compare memory content there agains the new state to see if it changed. In this case, it's better to assume that the input changed as there is no old state to compare against and thus assume the changes happen anyway. Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com> Reviewed-by: Steven Price <steven.price@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> [Applied small spelling fixes and fix suggested by Steven Price] Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201127110054.133686-1-carsten.haitzler@foss.arm.com
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db9cd76d |
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12-Nov-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Adds gamma and color-transform support for DOU-IPS Adds gamma and color-transform support for DOU-IPS. Adds two caps members fgamma_coeffs and ctm_coeffs to komeda_improc_state. If color management changed, set gamma and color-transform accordingly. v5: Rebase with drm-misc-next Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191112110927.20931-5-james.qian.wang@arm.com
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8ae501e2 |
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29-Sep-2019 |
Mihail Atanassov <Mihail.Atanassov@arm.com> |
drm/komeda: Fix typos in komeda_splitter_validate Fix both the string and the struct member being printed. Changes since v1: - Now with a bonus grammar fix, too. Fixes: 264b9436d23b ("drm/komeda: Enable writeback split support") Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190930122231.33029-1-mihail.atanassov@arm.com
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f61714cd |
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15-Oct-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Adds output-color format support Sets output color format according to the connector formats and display supported formats. Default value is RGB444 and only force YUV format which must be YUV. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191015091019.26021-1-lowry.li@arm.com
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f9204ad9 |
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12-Oct-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Set output color depth for output Set color_depth according to connector->bpc. Changes since v1: - Fixed min_bpc is effectively set but not used in komeda_crtc_get_color_config(). Changes since v2: - Align the code. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191012065030.12691-1-lowry.li@arm.com
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2b2510da |
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24-Sep-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Add line size support On D71, we are using the global line size. From D32, every component have a line size register to indicate the fifo size. So this patch is to set line size support and do the line size check. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190924080022.19250-2-lowry.li@arm.com
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d6cb0135 |
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06-Sep-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: SW workaround for D71 doesn't flush shadow registers This is a SW workaround for shadow un-flushed when together with the DOU Timing-disable. D71 HW doesn't update shadow registers when display output is turned off. So when we disable all pipeline components together with display output disabling by one flush or one operation, the disable operation updated registers will not be flushed or valid in HW, which may lead problem. To workaround this problem, introduce a two phase disable for pipeline disable. Phase1: Disable components with display is on and flush it, this phase for flushing or validating the shadow registers. Phase2: Turn-off display output. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190906071750.4563-1-lowry.li@arm.com
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8965ad84 |
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18-Jun-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Enable dual-link support Komeda HW can support dual-link which splits display frame to two halves (left/link0, right/link1) and output them by two output links. Due to the halved pixel rate of each link, the pxlclk of dual-link can be reduced two times compare with single-link. For enabling dual-link: - The DT need to configure two output-links for the pipeline node. - Komeda enable dual-link when both link0 and link1 have been connected. Example of how the pipeline node will look like for dual-link setup pipe0: pipeline@0 { clocks = <&fpgaosc2>; clock-names = "pxclk"; reg = <0>; #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; dp0_pipe0_link0: endpoint@0 { reg = <0>; remote-endpoint = <&dlink_connector_in0>; }; dp0_pipe0_link1: endpoint@1 { reg = <1>; remote-endpoint = <&dlink_connector_in1>; }; }; }; Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190618081013.13638-3-james.qian.wang@arm.com
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990dee3a |
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08-Jul-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Computing image enhancer internally Enable image enhancer when the input data flow is 2x+ upscaling. Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190708070000.4945-1-james.qian.wang@arm.com
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1930c112 |
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08-Jul-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Computing layer_split internally For layer_split no need user to enable/disable it, but compute it in komeda internally, komeda will enable it if the scaling exceed the acceptable range of scaler. Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190708065923.4887-1-james.qian.wang@arm.com
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264b9436 |
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12-Jun-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Enable writeback split support Writeback split is also for workaround the size limitation of d71 scaler. Like layer_split, writeback downscaling also can use two scalers to handle the scaling half-by-half. The only differnence is writback needs a standalone component (splitter)'s help to split the composition result. The data pipeline of writeback split as below: /-> scaler-0 ->\ compiz -> splitter merger -> wb_layer -> memory \-> scaler-1 ->/ v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
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3b9dfa4e |
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10-Jun-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Add slave pipeline support One crtc can use two komeda_pipeline, and one works as master and as slave. the slave pipeline doesn't have its own output and timing ctrlr, but pre-composite the input layer data flow and then feed the result to master. the pipeline configuration like: slave-layer-0 \ ... slave->CU slave-layer-4 / \ \ master-layer-0 --------> master->CU -> ... ... / master-layer-4 ------> Since komeda Compiz doesn't output alpha, so the slave->CU result only can be used as bottom input when blend it with master input data flows. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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a407a650 |
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10-Jun-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add layer split support Komeda supports two types of layer split: - none-scaling split - scaling split Since D71 merger only support scaler as input, so for none-scaling split, the two layer dflow will be output to compiz directly. for scaling_split, the data flow will be merged by merger firstly, then output the merged data flow to compiz. Komeda handles the split in kernel completely to hide the detailed and complicated split calcualtion to user mode, for user only need to set the layer_split property to enable/disable it. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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b35d0927 |
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10-Jun-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add split support for scaler To achieve same caling effect compare with none split, the texel calculation need to use the same scaling ratio before split, so add "total_xxx" to pipeline to describe the hsize/vsize before split. Update pipeline and d71_scaler_update accordingly. v2: Rebase and addressed Liviu's comments Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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6f84da0c |
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05-Jun-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Rename main engine clk name "mclk" to "aclk" To avoid confusion, unify the driver main engine clk name "mclk" to the spec name "aclk". Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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df860f98 |
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17-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_fb_check_src_coords Add komeda_fb_check_src_coords and check if the layer configured src rect can meet the requirement of fb and fb format. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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19358630 |
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21-Apr-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Adds limitation check for AFBC wide block not support Rot90 Komeda series hardware doesn't support Rot90 for AFBC wide block. So add limitation check to reject it if such configuration has been posted. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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429bfabe |
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21-Apr-2019 |
Lowry Li (Arm Technology China) <Lowry.Li@arm.com> |
drm/komeda: Add rotation support on Komeda driver - Adds rotation property to plane. - Komeda display rotation support diverges from the specific formats, so need to check the user required rotation type with the format caps and reject the commit if it can not be supported. - In the layer validate flow, sets the rotation value to the layer state. If r90 or r270, swap the width and height of the data flow for next stage. Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com> Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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42b6f118 |
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22-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add image enhancement support Besides scaling, Arm display scaler also can support image enhancement. For support it, Add a new property "img_enhancement" to plane, then user can turn on/off it by this property, and kernel follow user's requirement to maitain the state and enable/disable the real HW image enhancement. v2: Rebase and rename "needs_img_enhancement" to "en_img_enhancement" Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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1f7f9ab7 |
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22-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add engine clock requirement check for the downscaling For downscaling there is a restriction, the downscaling needed engine clock can not acceed the real engine clock, and the clock requirement mostly depend on the specific HW, to solve this problem: 1. Add a pipeline func - downscaling_clk_check for CORE to query the real HW if downscaling can be supported. 2. Add new property clock ratio which is the ratio of: (mclk << 32) / pxlclk then User driver can use this ratio to do the clock check to avoid post an invalid downscaling to kernel. v2: Rebase and Delete debug print Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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d92b66b8 |
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22-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add writeback scaling support 1. Add scaler to writeback pipeline to enable the writeback scaling support 2. Display HW can not do upscaling for writeback, check it when validate. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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502932a0 |
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22-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add the initial scaler support for CORE This patch add the initial and necessary logic for CORE to support scaler: - Complete the struct komeda_scaler and komeda_scaler_state for adding the scaler specific features and capablities. - Implement komeda_scaler_validate to check the scaler with the data flow configurations. - Enable scaling support for plane input path (layer input data flow). v2: Fix a typo, and rename "needs_scaling" to "en_scaling" Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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65ad2392 |
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23-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Added AFBC support for komeda driver For supporting AFBC: 1. Check if the user requested modifier can be supported by display HW. 2. Check the obj->size with AFBC's requirement. 3. Configure HW according to the modifier (afbc features) This patch depends on: - https://patchwork.freedesktop.org/series/59915/ - https://patchwork.freedesktop.org/series/59000/ v2: Rebase and addressed Ayan's comments Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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5d51f6c0 |
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23-May-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add writeback support Komeda driver uses a individual component to describe the HW's writeback caps, but drivers doesn't define a new structure and still uses the existing "struct komeda_layer" to describe this new component. The detailed changes as follow: 1. Initialize wb_layer according to HW and report it to CORE. 2. CORE exposes wb_layer as a resource to KMS by private_obj. 3. Report writeback supporting by add a wb_connector to KMS, and then wb_connector will take act as a component resources user, so the func komeda_wb_encoder_atomic_check claims komeda resources (scaler and wb_layer) accroding to its state configuration to the wb_connector. and the wb_state configuration will be validated on the specific component resources to see if the caps of component can meet the requirement of wb_connector. if not check failed. 4. Update irq_handler to notify the completion of writeback. NOTE: This change doesn't add scaling writeback support, that support will be added in the future after the scaler support. v2: Rebase v3: Rebase and constify the d71_wb_layer_funcs v4: Addressed Ayan's comments Depends on: - https://patchwork.freedesktop.org/series/59915/ Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Acked-by: Ayan Kumar Halder <ayan.halder@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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15e9122d |
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23-Apr-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Mark the local functions as static Fix the kbuild test rebot reported warnings: - symbol was not declared. Should it be static? - missing braces around initializer Depends on: - https://patchwork.freedesktop.org/series/58976/ Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: james qian wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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b7925b61 |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_crtc_atomic_enable/disable Pass enable/disable command to komeda and adjust komeda hardware for enable/disable a display instance. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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59dd6d58 |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_crtc_atomic_flush A komeda flush is comprised two steps: 1. update pipeline/component state to HW. 2. call dev_func->flush to notify HW to kickoff the update. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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552b831c |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_release_unclaimed_resources Komeda driver treats KMS-CRTC/PLANE as user which will acquire pipeline resources, but we still need to release the unclaimed resources. crtc_atomic_check is the final check stage, so beside build a display data pipeline according the crtc_state, but still needs to release/disable the unclaimed pipeline resources. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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c3015342 |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_build_display_data_flow This function builds a display output pipeline according to crtc_state. And this change only added single pipeline support, the dual pipeline with slave enabled data flow support will be added in the following change. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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11bb22ee |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_build_layer_data_flow build_layer_data_flow builds a input pipeline according to plane_state. and in this initial stage only added this simplest pipeline usage: Layer -> compiz The scaler and layer_split will be added in the future. v2: - Rebase. - Introduce struct komeda_data_flow_cfg - Add a function komeda_component_validate_private to replace the MACRO component_validate_private Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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8d537d3b |
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22-Jan-2019 |
james qian wang (Arm Technology China) <james.qian.wang@arm.com> |
drm/komeda: Add komeda_pipeline/component_get_state_and_set_user get_state_and_set_user packed get_state and set_user into one function, which get pipeline/component state for a specific pipeline/component, if success set the user to it. v2: - Rebase. - Applied commit: b962a12050a3 ("drm/atomic: integrate modeset lock with private objects") And delete our private modeset lock for pipeline. Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
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