Searched refs:phy (Results 26 - 50 of 112) sorted by relevance

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/haiku/src/add-ons/kernel/drivers/dvb/cx23882/
H A Dutil.h30 area_id map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection,
32 area_id alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection,
/haiku/src/add-ons/kernel/bus_managers/firewire/
H A Dutil.c37 alloc_mem(void **virt, void **phy, size_t size, uint32 protection, argument
40 // TODO: phy should be phys_addr_t*!
66 if (phy)
67 *phy = (void*)(addr_t)pe.address;
68 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %" B_PRIxPHYSADDR "\n", area, size, virtadr,
75 map_mem(void **virt, void *phy, size_t size, uint32 protection, argument
83 TRACE("mapping physical address %p with %ld bytes for %s\n", phy, size,
86 offset = (intptr_t)phy & (B_PAGE_SIZE - 1);
87 phyadr = (char *)phy - offset;
100 "mapadr = %p, size = %ld, area = 0x%08" B_PRIx32 "\n", phy, *vir
[all...]
/haiku/src/libs/compat/freebsd_network/compat/dev/mii/
H A Dmii_bitbang.h51 int phy, int reg);
54 int phy, int reg, int val);
H A Dmiivar.h186 int __haiku_miibus_readreg(device_t dev, int phy, int reg);
187 int __haiku_miibus_writereg(device_t dev, int phy, int reg, int data);
192 #define MIIBUS_READREG(dev, phy, reg) \
193 __haiku_miibus_readreg((dev), (phy), (reg))
195 #define MIIBUS_WRITEREG(dev, phy, reg, value) \
196 __haiku_miibus_writereg((dev), (phy), (reg), (value))
/haiku/src/add-ons/kernel/drivers/audio/generic/
H A Dutil.c67 alloc_mem(phys_addr_t *phy, void **log, size_t size, const char *name, bool user) argument
101 if (phy)
102 *phy = pe.address;
103 LOG(("area = %d, size = %d, log = %#08X, phy = %#08X\n", area, size, logadr,
110 map_mem(void **log, phys_addr_t phy, size_t size, const char *name) argument
117 LOG(("mapping physical address %p with %#x bytes for %s\n",phy,size,name));
119 offset = (uint32)phy & (B_PAGE_SIZE - 1);
120 phyadr = phy - offset;
127 phy, *log, offset, phyadr, mapadr, size, area));
/haiku/src/add-ons/kernel/drivers/network/ether/ipro1000/dev/e1000/
H A De1000_82575.c161 struct e1000_phy_info *phy = &hw->phy; local
167 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic;
168 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic;
170 if (hw->phy.media_type != e1000_media_type_copper) {
171 phy->type = e1000_phy_none;
175 phy->ops.power_up = e1000_power_up_phy_copper;
176 phy->ops.power_down = e1000_power_down_phy_copper_base;
178 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
179 phy
611 struct e1000_phy_info *phy = &hw->phy; local
714 struct e1000_phy_info *phy = &hw->phy; local
761 struct e1000_phy_info *phy = &hw->phy; local
847 struct e1000_phy_info *phy = &hw->phy; local
894 struct e1000_phy_info *phy = &hw->phy; local
1108 struct e1000_phy_info *phy = &hw->phy; local
2592 struct e1000_phy_info *phy = &hw->phy; local
2681 struct e1000_phy_info *phy = &hw->phy; local
2838 struct e1000_phy_info *phy = &hw->phy; local
2920 struct e1000_phy_info *phy = &hw->phy; local
[all...]
H A De1000_80003es2lan.c90 struct e1000_phy_info *phy = &hw->phy; local
95 if (hw->phy.media_type != e1000_media_type_copper) {
96 phy->type = e1000_phy_none;
99 phy->ops.power_up = e1000_power_up_phy_copper;
100 phy->ops.power_down = e1000_power_down_phy_copper_80003es2lan;
103 phy->addr = 1;
104 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
105 phy->reset_delay_us = 100;
106 phy
687 struct e1000_phy_info *phy = &hw->phy; local
971 struct e1000_phy_info *phy = &hw->phy; local
[all...]
H A De1000_82571.c94 struct e1000_phy_info *phy = &hw->phy; local
99 if (hw->phy.media_type != e1000_media_type_copper) {
100 phy->type = e1000_phy_none;
104 phy->addr = 1;
105 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
106 phy->reset_delay_us = 100;
108 phy->ops.check_reset_block = e1000_check_reset_block_generic;
109 phy->ops.reset = e1000_phy_hw_reset_generic;
110 phy
463 struct e1000_phy_info *phy = &hw->phy; local
873 struct e1000_phy_info *phy = &hw->phy; local
1852 struct e1000_phy_info *phy = &hw->phy; local
[all...]
H A De1000_ich8lan.c210 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg);
215 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg);
224 if (hw->phy.id) {
225 if (hw->phy.id == phy_id)
228 hw->phy.id = phy_id;
229 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);
237 hw->phy.ops.release(hw);
241 hw->phy.ops.acquire(hw);
252 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg);
254 hw->phy
456 struct e1000_phy_info *phy = &hw->phy; local
550 struct e1000_phy_info *phy = &hw->phy; local
2281 struct e1000_phy_info *phy = &hw->phy; local
3237 struct e1000_phy_info *phy = &hw->phy; local
3333 struct e1000_phy_info *phy = &hw->phy; local
[all...]
H A De1000_82540.c69 struct e1000_phy_info *phy = &hw->phy; local
72 phy->addr = 1;
73 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
74 phy->reset_delay_us = 10000;
75 phy->type = e1000_phy_m88;
78 phy->ops.check_polarity = e1000_check_polarity_m88;
79 phy->ops.commit = e1000_phy_sw_reset_generic;
80 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
81 phy
[all...]
H A De1000_82543.c87 struct e1000_phy_info *phy = &hw->phy; local
92 if (hw->phy.media_type != e1000_media_type_copper) {
93 phy->type = e1000_phy_none;
96 phy->ops.power_up = e1000_power_up_phy_copper;
97 phy->ops.power_down = e1000_power_down_phy_copper;
100 phy->addr = 1;
101 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
102 phy->reset_delay_us = 10000;
103 phy
[all...]
H A De1000_api.c101 if (hw->phy.ops.init_params) {
102 ret_val = hw->phy.ops.init_params(hw);
108 DEBUGOUT("phy.init_phy_params was NULL\n");
1009 if (hw->phy.ops.check_reset_block)
1010 return hw->phy.ops.check_reset_block(hw);
1026 if (hw->phy.ops.read_reg)
1027 return hw->phy.ops.read_reg(hw, offset, data);
1043 if (hw->phy.ops.write_reg)
1044 return hw->phy.ops.write_reg(hw, offset, data);
1058 if (hw->phy
[all...]
H A De1000_base.c135 struct e1000_phy_info *phy = &hw->phy; local
137 if (!(phy->ops.check_reset_block))
141 if (phy->ops.check_reset_block(hw))
/haiku/src/add-ons/kernel/drivers/network/ether/rtl8139/dev/mii/
H A Drlphy.c171 rlphy_status(struct mii_softc *phy) argument
173 struct mii_data *mii = phy->mii_pdata;
180 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
184 bmcr = PHY_READ(phy, MII_BMCR);
206 if ((anlpar = PHY_READ(phy, MII_ANAR) &
207 PHY_READ(phy, MII_ANLPAR))) {
222 mii_phy_flowstatus(phy);
252 if (!(phy->mii_mpd_model == 0 && phy
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/rtl81xx/dev/mii/
H A Drlphy.c171 rlphy_status(struct mii_softc *phy) argument
173 struct mii_data *mii = phy->mii_pdata;
180 bmsr = PHY_READ(phy, MII_BMSR) | PHY_READ(phy, MII_BMSR);
184 bmcr = PHY_READ(phy, MII_BMCR);
206 if ((anlpar = PHY_READ(phy, MII_ANAR) &
207 PHY_READ(phy, MII_ANLPAR))) {
222 mii_phy_flowstatus(phy);
252 if (!(phy->mii_mpd_model == 0 && phy
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/intel22x/dev/igc/
H A Digc_api.c75 if (hw->phy.ops.init_params) {
76 ret_val = hw->phy.ops.init_params(hw);
82 DEBUGOUT("phy.init_phy_params was NULL\n");
439 if (hw->phy.ops.check_reset_block)
440 return hw->phy.ops.check_reset_block(hw);
456 if (hw->phy.ops.read_reg)
457 return hw->phy.ops.read_reg(hw, offset, data);
473 if (hw->phy.ops.write_reg)
474 return hw->phy.ops.write_reg(hw, offset, data);
488 if (hw->phy
[all...]
H A Digc_base.c100 struct igc_phy_info *phy = &hw->phy; local
102 if (!(phy->ops.check_reset_block))
106 if (phy->ops.check_reset_block(hw))
/haiku/src/add-ons/kernel/busses/scsi/ahci/
H A Dutil.cpp25 alloc_mem(void **virt, phys_addr_t *phy, size_t size, uint32 protection, argument
50 if (phy)
51 *phy = pe.address;
52 TRACE("area = %" B_PRId32 ", size = %ld, virt = %p, phy = %#" B_PRIxPHYSADDR "\n",
59 map_mem(void **virt, phys_addr_t phy, size_t size, uint32 protection, argument
68 " bytes for %s\n", phy, size, name);
70 offset = phy & (B_PAGE_SIZE - 1);
71 phyadr = phy - offset;
85 B_PRIuSIZE ", area = 0x%08" B_PRIx32 "\n", phy, *virt, offset, phyadr,
/haiku/src/add-ons/kernel/drivers/network/wlan/broadcom43xx/dev/bwi/
H A Dbwiphy.c158 struct bwi_phy *phy = &mac->mac_phy; local
182 phy->phy_init = bwi_phy_init_11a;
183 phy->phy_mode = IEEE80211_MODE_11A;
184 phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11A;
185 phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11A;
186 phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11A;
191 phy->phy_init = bwi_sup_bphy[i].init;
200 phy->phy_mode = IEEE80211_MODE_11B;
208 phy->phy_init = bwi_phy_init_11g;
209 phy
227 struct bwi_phy *phy = &mac->mac_phy; local
246 struct bwi_phy *phy = &mac->mac_phy; local
268 struct bwi_phy *phy = &mac->mac_phy; local
280 struct bwi_phy *phy = &mac->mac_phy; local
316 struct bwi_phy *phy = &mac->mac_phy; local
509 struct bwi_phy *phy = &mac->mac_phy; local
611 struct bwi_phy *phy = &mac->mac_phy; local
751 struct bwi_phy *phy = &mac->mac_phy; local
883 struct bwi_phy *phy = &mac->mac_phy; local
964 struct bwi_phy *phy = &mac->mac_phy; local
1015 bwi_phy_clear_state(struct bwi_phy *phy) argument
[all...]
H A Dbwirf.c230 struct bwi_phy *phy = &mac->mac_phy; local
272 switch (phy->phy_mode) {
305 if (phy->phy_rev == 6)
388 struct bwi_phy *phy = &mac->mac_phy; local
444 if (phy->phy_rev >= 3)
456 phy->phy_rev >= 7) {
680 struct bwi_phy *phy = &mac->mac_phy; local
684 if ((phy->phy_flags & BWI_PHY_F_LINKED) == 0)
713 if (phy->phy_rev >= 7 && (sc->sc_card_flags & BWI_CARD_F_EXT_LNA)) {
771 struct bwi_phy *phy local
1089 struct bwi_phy *phy = &mac->mac_phy; local
1262 struct bwi_phy *phy = &mac->mac_phy; local
1393 struct bwi_phy *phy = &mac->mac_phy; local
1649 struct bwi_phy *phy = &mac->mac_phy; local
1768 struct bwi_phy *phy = &mac->mac_phy; local
1921 struct bwi_phy *phy = &mac->mac_phy; local
2279 struct bwi_phy *phy = &mac->mac_phy; local
2295 struct bwi_phy *phy = &mac->mac_phy; local
[all...]
/haiku/src/add-ons/kernel/drivers/network/ether/pegasus/
H A Dif_aue.c202 aue_miibus_readreg(pegasus_dev *sc, int phy, int reg) argument
219 if (phy == 3)
222 if (phy != 1)
227 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
246 aue_miibus_writereg(pegasus_dev *sc, int phy, int reg, int data) argument
250 if (phy == 3)
254 aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
274 return aue_miibus_readreg(dev, dev->phy, reg);
281 aue_miibus_writereg(dev, dev->phy, reg, value);
286 aue_miibus_status_from_phy(pegasus_dev *dev, uint16 phy) argument
310 uint16 phy, status; local
[all...]
/haiku/src/add-ons/kernel/drivers/audio/ice1712/
H A Dutil.cpp41 alloc_mem(physical_entry *phy, addr_t *log, size_t size, const char *name) argument
62 rv = get_memory_map(logadr, size, phy, 1);
73 B_PRIXADDR ", phy = 0x%" B_PRIXPHYSADDR "\n", areaid, size,
74 *log, phy->address);
/haiku/src/libs/compat/freebsd_network/
H A Dfbsd_mii_bitbang.c118 mii_bitbang_readreg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg) argument
126 mii_bitbang_sendbits(dev, ops, phy, 5);
166 mii_bitbang_writereg(device_t dev, mii_bitbang_ops_t ops, int phy, int reg, argument
174 mii_bitbang_sendbits(dev, ops, phy, 5);
/haiku/src/add-ons/kernel/drivers/network/ether/wb840/
H A Dwb840.c51 status = wb_miibus_readreg(device, device->phy, MII_STATUS);
100 device->phy = device->currentPHY->address;
101 status = wb_miibus_readreg(device, device->phy, MII_CONTROL);
104 wb_miibus_writereg(device, device->phy, MII_CONTROL, status);
113 uint16 phy; local
115 for (phy = 0; phy < 32; phy++) {
120 status = wb_miibus_readreg(device, phy, MII_STATUS);
121 status = wb_miibus_readreg(device, phy, MII_STATU
[all...]
/haiku/src/add-ons/kernel/drivers/network/wlan/realtekwifi/dev/rtwn/rtl8188e/
H A Dr88e_rx.c180 struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; local
183 lna_idx = (phy->agc_rpt & 0xe0) >> 5;
184 vga_idx = (phy->agc_rpt & 0x1f);
225 struct r88e_rx_phystat *phy = (struct r88e_rx_phystat *)physt; local
229 rssi = ((phy->sig_qual >> 1) & 0x7f) - 110;

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