1/*- 2 * Copyright 2021 Intel Corp 3 * Copyright 2021 Rubicon Communications, LLC (Netgate) 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <sys/cdefs.h> 8__FBSDID("$FreeBSD$"); 9 10#include "igc_api.h" 11 12/** 13 * igc_init_mac_params - Initialize MAC function pointers 14 * @hw: pointer to the HW structure 15 * 16 * This function initializes the function pointers for the MAC 17 * set of functions. Called by drivers or by igc_setup_init_funcs. 18 **/ 19s32 igc_init_mac_params(struct igc_hw *hw) 20{ 21 s32 ret_val = IGC_SUCCESS; 22 23 if (hw->mac.ops.init_params) { 24 ret_val = hw->mac.ops.init_params(hw); 25 if (ret_val) { 26 DEBUGOUT("MAC Initialization Error\n"); 27 goto out; 28 } 29 } else { 30 DEBUGOUT("mac.init_mac_params was NULL\n"); 31 ret_val = -IGC_ERR_CONFIG; 32 } 33 34out: 35 return ret_val; 36} 37 38/** 39 * igc_init_nvm_params - Initialize NVM function pointers 40 * @hw: pointer to the HW structure 41 * 42 * This function initializes the function pointers for the NVM 43 * set of functions. Called by drivers or by igc_setup_init_funcs. 44 **/ 45s32 igc_init_nvm_params(struct igc_hw *hw) 46{ 47 s32 ret_val = IGC_SUCCESS; 48 49 if (hw->nvm.ops.init_params) { 50 ret_val = hw->nvm.ops.init_params(hw); 51 if (ret_val) { 52 DEBUGOUT("NVM Initialization Error\n"); 53 goto out; 54 } 55 } else { 56 DEBUGOUT("nvm.init_nvm_params was NULL\n"); 57 ret_val = -IGC_ERR_CONFIG; 58 } 59 60out: 61 return ret_val; 62} 63 64/** 65 * igc_init_phy_params - Initialize PHY function pointers 66 * @hw: pointer to the HW structure 67 * 68 * This function initializes the function pointers for the PHY 69 * set of functions. Called by drivers or by igc_setup_init_funcs. 70 **/ 71s32 igc_init_phy_params(struct igc_hw *hw) 72{ 73 s32 ret_val = IGC_SUCCESS; 74 75 if (hw->phy.ops.init_params) { 76 ret_val = hw->phy.ops.init_params(hw); 77 if (ret_val) { 78 DEBUGOUT("PHY Initialization Error\n"); 79 goto out; 80 } 81 } else { 82 DEBUGOUT("phy.init_phy_params was NULL\n"); 83 ret_val = -IGC_ERR_CONFIG; 84 } 85 86out: 87 return ret_val; 88} 89 90/** 91 * igc_set_mac_type - Sets MAC type 92 * @hw: pointer to the HW structure 93 * 94 * This function sets the mac type of the adapter based on the 95 * device ID stored in the hw structure. 96 * MUST BE FIRST FUNCTION CALLED (explicitly or through 97 * igc_setup_init_funcs()). 98 **/ 99s32 igc_set_mac_type(struct igc_hw *hw) 100{ 101 struct igc_mac_info *mac = &hw->mac; 102 s32 ret_val = IGC_SUCCESS; 103 104 DEBUGFUNC("igc_set_mac_type"); 105 106 switch (hw->device_id) { 107 case IGC_DEV_ID_I225_LM: 108 case IGC_DEV_ID_I225_V: 109 case IGC_DEV_ID_I225_K: 110 case IGC_DEV_ID_I225_I: 111 case IGC_DEV_ID_I220_V: 112 case IGC_DEV_ID_I225_K2: 113 case IGC_DEV_ID_I225_LMVP: 114 case IGC_DEV_ID_I225_IT: 115 case IGC_DEV_ID_I226_LM: 116 case IGC_DEV_ID_I226_V: 117 case IGC_DEV_ID_I226_IT: 118 case IGC_DEV_ID_I221_V: 119 case IGC_DEV_ID_I226_BLANK_NVM: 120 case IGC_DEV_ID_I225_BLANK_NVM: 121 mac->type = igc_i225; 122 break; 123 default: 124 /* Should never have loaded on this device */ 125 ret_val = -IGC_ERR_MAC_INIT; 126 break; 127 } 128 129 return ret_val; 130} 131 132/** 133 * igc_setup_init_funcs - Initializes function pointers 134 * @hw: pointer to the HW structure 135 * @init_device: true will initialize the rest of the function pointers 136 * getting the device ready for use. FALSE will only set 137 * MAC type and the function pointers for the other init 138 * functions. Passing FALSE will not generate any hardware 139 * reads or writes. 140 * 141 * This function must be called by a driver in order to use the rest 142 * of the 'shared' code files. Called by drivers only. 143 **/ 144s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device) 145{ 146 s32 ret_val; 147 148 /* Can't do much good without knowing the MAC type. */ 149 ret_val = igc_set_mac_type(hw); 150 if (ret_val) { 151 DEBUGOUT("ERROR: MAC type could not be set properly.\n"); 152 goto out; 153 } 154 155 if (!hw->hw_addr) { 156 DEBUGOUT("ERROR: Registers not mapped\n"); 157 ret_val = -IGC_ERR_CONFIG; 158 goto out; 159 } 160 161 /* 162 * Init function pointers to generic implementations. We do this first 163 * allowing a driver module to override it afterward. 164 */ 165 igc_init_mac_ops_generic(hw); 166 igc_init_phy_ops_generic(hw); 167 igc_init_nvm_ops_generic(hw); 168 169 /* 170 * Set up the init function pointers. These are functions within the 171 * adapter family file that sets up function pointers for the rest of 172 * the functions in that family. 173 */ 174 switch (hw->mac.type) { 175 case igc_i225: 176 igc_init_function_pointers_i225(hw); 177 break; 178 default: 179 DEBUGOUT("Hardware not supported\n"); 180 ret_val = -IGC_ERR_CONFIG; 181 break; 182 } 183 184 /* 185 * Initialize the rest of the function pointers. These require some 186 * register reads/writes in some cases. 187 */ 188 if (!(ret_val) && init_device) { 189 ret_val = igc_init_mac_params(hw); 190 if (ret_val) 191 goto out; 192 193 ret_val = igc_init_nvm_params(hw); 194 if (ret_val) 195 goto out; 196 197 ret_val = igc_init_phy_params(hw); 198 if (ret_val) 199 goto out; 200 } 201 202out: 203 return ret_val; 204} 205 206/** 207 * igc_get_bus_info - Obtain bus information for adapter 208 * @hw: pointer to the HW structure 209 * 210 * This will obtain information about the HW bus for which the 211 * adapter is attached and stores it in the hw structure. This is a 212 * function pointer entry point called by drivers. 213 **/ 214s32 igc_get_bus_info(struct igc_hw *hw) 215{ 216 if (hw->mac.ops.get_bus_info) 217 return hw->mac.ops.get_bus_info(hw); 218 219 return IGC_SUCCESS; 220} 221 222/** 223 * igc_clear_vfta - Clear VLAN filter table 224 * @hw: pointer to the HW structure 225 * 226 * This clears the VLAN filter table on the adapter. This is a function 227 * pointer entry point called by drivers. 228 **/ 229void igc_clear_vfta(struct igc_hw *hw) 230{ 231 if (hw->mac.ops.clear_vfta) 232 hw->mac.ops.clear_vfta(hw); 233} 234 235/** 236 * igc_write_vfta - Write value to VLAN filter table 237 * @hw: pointer to the HW structure 238 * @offset: the 32-bit offset in which to write the value to. 239 * @value: the 32-bit value to write at location offset. 240 * 241 * This writes a 32-bit value to a 32-bit offset in the VLAN filter 242 * table. This is a function pointer entry point called by drivers. 243 **/ 244void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value) 245{ 246 if (hw->mac.ops.write_vfta) 247 hw->mac.ops.write_vfta(hw, offset, value); 248} 249 250/** 251 * igc_update_mc_addr_list - Update Multicast addresses 252 * @hw: pointer to the HW structure 253 * @mc_addr_list: array of multicast addresses to program 254 * @mc_addr_count: number of multicast addresses to program 255 * 256 * Updates the Multicast Table Array. 257 * The caller must have a packed mc_addr_list of multicast addresses. 258 **/ 259void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list, 260 u32 mc_addr_count) 261{ 262 if (hw->mac.ops.update_mc_addr_list) 263 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, 264 mc_addr_count); 265} 266 267/** 268 * igc_force_mac_fc - Force MAC flow control 269 * @hw: pointer to the HW structure 270 * 271 * Force the MAC's flow control settings. Currently no func pointer exists 272 * and all implementations are handled in the generic version of this 273 * function. 274 **/ 275s32 igc_force_mac_fc(struct igc_hw *hw) 276{ 277 return igc_force_mac_fc_generic(hw); 278} 279 280/** 281 * igc_check_for_link - Check/Store link connection 282 * @hw: pointer to the HW structure 283 * 284 * This checks the link condition of the adapter and stores the 285 * results in the hw->mac structure. This is a function pointer entry 286 * point called by drivers. 287 **/ 288s32 igc_check_for_link(struct igc_hw *hw) 289{ 290 if (hw->mac.ops.check_for_link) 291 return hw->mac.ops.check_for_link(hw); 292 293 return -IGC_ERR_CONFIG; 294} 295 296/** 297 * igc_reset_hw - Reset hardware 298 * @hw: pointer to the HW structure 299 * 300 * This resets the hardware into a known state. This is a function pointer 301 * entry point called by drivers. 302 **/ 303s32 igc_reset_hw(struct igc_hw *hw) 304{ 305 if (hw->mac.ops.reset_hw) 306 return hw->mac.ops.reset_hw(hw); 307 308 return -IGC_ERR_CONFIG; 309} 310 311/** 312 * igc_init_hw - Initialize hardware 313 * @hw: pointer to the HW structure 314 * 315 * This inits the hardware readying it for operation. This is a function 316 * pointer entry point called by drivers. 317 **/ 318s32 igc_init_hw(struct igc_hw *hw) 319{ 320 if (hw->mac.ops.init_hw) 321 return hw->mac.ops.init_hw(hw); 322 323 return -IGC_ERR_CONFIG; 324} 325 326/** 327 * igc_setup_link - Configures link and flow control 328 * @hw: pointer to the HW structure 329 * 330 * This configures link and flow control settings for the adapter. This 331 * is a function pointer entry point called by drivers. While modules can 332 * also call this, they probably call their own version of this function. 333 **/ 334s32 igc_setup_link(struct igc_hw *hw) 335{ 336 if (hw->mac.ops.setup_link) 337 return hw->mac.ops.setup_link(hw); 338 339 return -IGC_ERR_CONFIG; 340} 341 342/** 343 * igc_get_speed_and_duplex - Returns current speed and duplex 344 * @hw: pointer to the HW structure 345 * @speed: pointer to a 16-bit value to store the speed 346 * @duplex: pointer to a 16-bit value to store the duplex. 347 * 348 * This returns the speed and duplex of the adapter in the two 'out' 349 * variables passed in. This is a function pointer entry point called 350 * by drivers. 351 **/ 352s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex) 353{ 354 if (hw->mac.ops.get_link_up_info) 355 return hw->mac.ops.get_link_up_info(hw, speed, duplex); 356 357 return -IGC_ERR_CONFIG; 358} 359 360/** 361 * igc_disable_pcie_master - Disable PCI-Express master access 362 * @hw: pointer to the HW structure 363 * 364 * Disables PCI-Express master access and verifies there are no pending 365 * requests. Currently no func pointer exists and all implementations are 366 * handled in the generic version of this function. 367 **/ 368s32 igc_disable_pcie_master(struct igc_hw *hw) 369{ 370 return igc_disable_pcie_master_generic(hw); 371} 372 373/** 374 * igc_config_collision_dist - Configure collision distance 375 * @hw: pointer to the HW structure 376 * 377 * Configures the collision distance to the default value and is used 378 * during link setup. 379 **/ 380void igc_config_collision_dist(struct igc_hw *hw) 381{ 382 if (hw->mac.ops.config_collision_dist) 383 hw->mac.ops.config_collision_dist(hw); 384} 385 386/** 387 * igc_rar_set - Sets a receive address register 388 * @hw: pointer to the HW structure 389 * @addr: address to set the RAR to 390 * @index: the RAR to set 391 * 392 * Sets a Receive Address Register (RAR) to the specified address. 393 **/ 394int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index) 395{ 396 if (hw->mac.ops.rar_set) 397 return hw->mac.ops.rar_set(hw, addr, index); 398 399 return IGC_SUCCESS; 400} 401 402/** 403 * igc_validate_mdi_setting - Ensures valid MDI/MDIX SW state 404 * @hw: pointer to the HW structure 405 * 406 * Ensures that the MDI/MDIX SW state is valid. 407 **/ 408s32 igc_validate_mdi_setting(struct igc_hw *hw) 409{ 410 if (hw->mac.ops.validate_mdi_setting) 411 return hw->mac.ops.validate_mdi_setting(hw); 412 413 return IGC_SUCCESS; 414} 415 416/** 417 * igc_hash_mc_addr - Determines address location in multicast table 418 * @hw: pointer to the HW structure 419 * @mc_addr: Multicast address to hash. 420 * 421 * This hashes an address to determine its location in the multicast 422 * table. Currently no func pointer exists and all implementations 423 * are handled in the generic version of this function. 424 **/ 425u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr) 426{ 427 return igc_hash_mc_addr_generic(hw, mc_addr); 428} 429 430/** 431 * igc_check_reset_block - Verifies PHY can be reset 432 * @hw: pointer to the HW structure 433 * 434 * Checks if the PHY is in a state that can be reset or if manageability 435 * has it tied up. This is a function pointer entry point called by drivers. 436 **/ 437s32 igc_check_reset_block(struct igc_hw *hw) 438{ 439 if (hw->phy.ops.check_reset_block) 440 return hw->phy.ops.check_reset_block(hw); 441 442 return IGC_SUCCESS; 443} 444 445/** 446 * igc_read_phy_reg - Reads PHY register 447 * @hw: pointer to the HW structure 448 * @offset: the register to read 449 * @data: the buffer to store the 16-bit read. 450 * 451 * Reads the PHY register and returns the value in data. 452 * This is a function pointer entry point called by drivers. 453 **/ 454s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data) 455{ 456 if (hw->phy.ops.read_reg) 457 return hw->phy.ops.read_reg(hw, offset, data); 458 459 return IGC_SUCCESS; 460} 461 462/** 463 * igc_write_phy_reg - Writes PHY register 464 * @hw: pointer to the HW structure 465 * @offset: the register to write 466 * @data: the value to write. 467 * 468 * Writes the PHY register at offset with the value in data. 469 * This is a function pointer entry point called by drivers. 470 **/ 471s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data) 472{ 473 if (hw->phy.ops.write_reg) 474 return hw->phy.ops.write_reg(hw, offset, data); 475 476 return IGC_SUCCESS; 477} 478 479/** 480 * igc_release_phy - Generic release PHY 481 * @hw: pointer to the HW structure 482 * 483 * Return if silicon family does not require a semaphore when accessing the 484 * PHY. 485 **/ 486void igc_release_phy(struct igc_hw *hw) 487{ 488 if (hw->phy.ops.release) 489 hw->phy.ops.release(hw); 490} 491 492/** 493 * igc_acquire_phy - Generic acquire PHY 494 * @hw: pointer to the HW structure 495 * 496 * Return success if silicon family does not require a semaphore when 497 * accessing the PHY. 498 **/ 499s32 igc_acquire_phy(struct igc_hw *hw) 500{ 501 if (hw->phy.ops.acquire) 502 return hw->phy.ops.acquire(hw); 503 504 return IGC_SUCCESS; 505} 506 507/** 508 * igc_get_phy_info - Retrieves PHY information from registers 509 * @hw: pointer to the HW structure 510 * 511 * This function gets some information from various PHY registers and 512 * populates hw->phy values with it. This is a function pointer entry 513 * point called by drivers. 514 **/ 515s32 igc_get_phy_info(struct igc_hw *hw) 516{ 517 if (hw->phy.ops.get_info) 518 return hw->phy.ops.get_info(hw); 519 520 return IGC_SUCCESS; 521} 522 523/** 524 * igc_phy_hw_reset - Hard PHY reset 525 * @hw: pointer to the HW structure 526 * 527 * Performs a hard PHY reset. This is a function pointer entry point called 528 * by drivers. 529 **/ 530s32 igc_phy_hw_reset(struct igc_hw *hw) 531{ 532 if (hw->phy.ops.reset) 533 return hw->phy.ops.reset(hw); 534 535 return IGC_SUCCESS; 536} 537 538/** 539 * igc_set_d0_lplu_state - Sets low power link up state for D0 540 * @hw: pointer to the HW structure 541 * @active: boolean used to enable/disable lplu 542 * 543 * Success returns 0, Failure returns 1 544 * 545 * The low power link up (lplu) state is set to the power management level D0 546 * and SmartSpeed is disabled when active is true, else clear lplu for D0 547 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU 548 * is used during Dx states where the power conservation is most important. 549 * During driver activity, SmartSpeed should be enabled so performance is 550 * maintained. This is a function pointer entry point called by drivers. 551 **/ 552s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active) 553{ 554 if (hw->phy.ops.set_d0_lplu_state) 555 return hw->phy.ops.set_d0_lplu_state(hw, active); 556 557 return IGC_SUCCESS; 558} 559 560/** 561 * igc_set_d3_lplu_state - Sets low power link up state for D3 562 * @hw: pointer to the HW structure 563 * @active: boolean used to enable/disable lplu 564 * 565 * Success returns 0, Failure returns 1 566 * 567 * The low power link up (lplu) state is set to the power management level D3 568 * and SmartSpeed is disabled when active is true, else clear lplu for D3 569 * and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU 570 * is used during Dx states where the power conservation is most important. 571 * During driver activity, SmartSpeed should be enabled so performance is 572 * maintained. This is a function pointer entry point called by drivers. 573 **/ 574s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active) 575{ 576 if (hw->phy.ops.set_d3_lplu_state) 577 return hw->phy.ops.set_d3_lplu_state(hw, active); 578 579 return IGC_SUCCESS; 580} 581 582/** 583 * igc_read_mac_addr - Reads MAC address 584 * @hw: pointer to the HW structure 585 * 586 * Reads the MAC address out of the adapter and stores it in the HW structure. 587 * Currently no func pointer exists and all implementations are handled in the 588 * generic version of this function. 589 **/ 590s32 igc_read_mac_addr(struct igc_hw *hw) 591{ 592 if (hw->mac.ops.read_mac_addr) 593 return hw->mac.ops.read_mac_addr(hw); 594 595 return igc_read_mac_addr_generic(hw); 596} 597 598/** 599 * igc_read_pba_string - Read device part number string 600 * @hw: pointer to the HW structure 601 * @pba_num: pointer to device part number 602 * @pba_num_size: size of part number buffer 603 * 604 * Reads the product board assembly (PBA) number from the EEPROM and stores 605 * the value in pba_num. 606 * Currently no func pointer exists and all implementations are handled in the 607 * generic version of this function. 608 **/ 609s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size) 610{ 611 return igc_read_pba_string_generic(hw, pba_num, pba_num_size); 612} 613 614/** 615 * igc_validate_nvm_checksum - Verifies NVM (EEPROM) checksum 616 * @hw: pointer to the HW structure 617 * 618 * Validates the NVM checksum is correct. This is a function pointer entry 619 * point called by drivers. 620 **/ 621s32 igc_validate_nvm_checksum(struct igc_hw *hw) 622{ 623 if (hw->nvm.ops.validate) 624 return hw->nvm.ops.validate(hw); 625 626 return -IGC_ERR_CONFIG; 627} 628 629/** 630 * igc_update_nvm_checksum - Updates NVM (EEPROM) checksum 631 * @hw: pointer to the HW structure 632 * 633 * Updates the NVM checksum. Currently no func pointer exists and all 634 * implementations are handled in the generic version of this function. 635 **/ 636s32 igc_update_nvm_checksum(struct igc_hw *hw) 637{ 638 if (hw->nvm.ops.update) 639 return hw->nvm.ops.update(hw); 640 641 return -IGC_ERR_CONFIG; 642} 643 644/** 645 * igc_reload_nvm - Reloads EEPROM 646 * @hw: pointer to the HW structure 647 * 648 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the 649 * extended control register. 650 **/ 651void igc_reload_nvm(struct igc_hw *hw) 652{ 653 if (hw->nvm.ops.reload) 654 hw->nvm.ops.reload(hw); 655} 656 657/** 658 * igc_read_nvm - Reads NVM (EEPROM) 659 * @hw: pointer to the HW structure 660 * @offset: the word offset to read 661 * @words: number of 16-bit words to read 662 * @data: pointer to the properly sized buffer for the data. 663 * 664 * Reads 16-bit chunks of data from the NVM (EEPROM). This is a function 665 * pointer entry point called by drivers. 666 **/ 667s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data) 668{ 669 if (hw->nvm.ops.read) 670 return hw->nvm.ops.read(hw, offset, words, data); 671 672 return -IGC_ERR_CONFIG; 673} 674 675/** 676 * igc_write_nvm - Writes to NVM (EEPROM) 677 * @hw: pointer to the HW structure 678 * @offset: the word offset to read 679 * @words: number of 16-bit words to write 680 * @data: pointer to the properly sized buffer for the data. 681 * 682 * Writes 16-bit chunks of data to the NVM (EEPROM). This is a function 683 * pointer entry point called by drivers. 684 **/ 685s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data) 686{ 687 if (hw->nvm.ops.write) 688 return hw->nvm.ops.write(hw, offset, words, data); 689 690 return IGC_SUCCESS; 691} 692 693/** 694 * igc_power_up_phy - Restores link in case of PHY power down 695 * @hw: pointer to the HW structure 696 * 697 * The phy may be powered down to save power, to turn off link when the 698 * driver is unloaded, or wake on lan is not enabled (among others). 699 **/ 700void igc_power_up_phy(struct igc_hw *hw) 701{ 702 if (hw->phy.ops.power_up) 703 hw->phy.ops.power_up(hw); 704 705 igc_setup_link(hw); 706} 707 708/** 709 * igc_power_down_phy - Power down PHY 710 * @hw: pointer to the HW structure 711 * 712 * The phy may be powered down to save power, to turn off link when the 713 * driver is unloaded, or wake on lan is not enabled (among others). 714 **/ 715void igc_power_down_phy(struct igc_hw *hw) 716{ 717 if (hw->phy.ops.power_down) 718 hw->phy.ops.power_down(hw); 719} 720 721