Searched refs:num_levels (Results 26 - 50 of 63) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.c1294 clks.clocks_in_khz[clks.num_levels-1], 1000);
1296 clks.clocks_in_khz[clks.num_levels/8], 1000);
1298 clks.clocks_in_khz[clks.num_levels*2/8], 1000);
1300 clks.clocks_in_khz[clks.num_levels*3/8], 1000);
1302 clks.clocks_in_khz[clks.num_levels*4/8], 1000);
1304 clks.clocks_in_khz[clks.num_levels*5/8], 1000);
1306 clks.clocks_in_khz[clks.num_levels*6/8], 1000);
1317 clks.clocks_in_khz[clks.num_levels-1], 1000);
1319 clks.clocks_in_khz[clks.num_levels>>1], 1000);
1332 clks.clocks_in_khz[clks.num_levels>>
[all...]
/linux-master/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.c798 u32 n_current_state_levels = (old_ps == NULL) ? 1 : old_ps->num_levels;
800 for (i = 0; i < new_ps->num_levels; i++) {
805 for (i = new_ps->num_levels; i < n_current_state_levels; i++)
921 if (new_ps->levels[new_ps->num_levels - 1].sclk >=
922 current_ps->levels[current_ps->num_levels - 1].sclk)
935 if (new_ps->levels[new_ps->num_levels - 1].sclk <
936 current_ps->levels[current_ps->num_levels - 1].sclk)
1161 if (ps->num_levels <= 1)
1168 ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
1172 for (i = 0; i < ps->num_levels;
[all...]
H A Dkv_dpm.h83 u32 num_levels; member in struct:kv_ps
H A Dsumo_dpm.h47 u32 num_levels; member in struct:sumo_ps
H A Dkv_dpm.c1544 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)
1551 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))
1570 new_ps->levels[new_ps->num_levels - 1].sclk)
1579 new_ps->levels[new_ps->num_levels - 1].sclk))
1984 for (i = 0; i < ps->num_levels; i++) {
1990 for (i = 0; i < ps->num_levels; i++) {
2002 for (i = 0; i < ps->num_levels; i++) {
2013 for (i = 0; i < ps->num_levels; i++) {
2375 ps->num_levels = 1;
2420 ps->num_levels
[all...]
H A Dr200.c419 track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK)
/linux-master/drivers/gpu/drm/i915/display/
H A Dskl_watermark.c370 for (level = i915->display.wm.num_levels - 1;
766 for (level = 0; level < i915->display.wm.num_levels; level++) {
1542 for (level = i915->display.wm.num_levels - 1; level >= 0; level--) {
1618 for (level++; level < i915->display.wm.num_levels; level++) {
2007 for (level = 0; level < i915->display.wm.num_levels; level++) {
2259 for (level = i915->display.wm.num_levels - 1; level >= 0; level--) {
2297 crtc_state->wm_level_disabled = level < i915->display.wm.num_levels - 1;
2299 for (level++; level < i915->display.wm.num_levels; level++) {
2406 for (level = 0; level < i915->display.wm.num_levels; level++)
2441 for (level = 0; level < i915->display.wm.num_levels; leve
3355 adjust_wm_latency(struct drm_i915_private *i915, u16 wm[], int num_levels, int read_latency) argument
3400 int num_levels = i915->display.wm.num_levels; local
3420 int num_levels = i915->display.wm.num_levels; local
[all...]
H A Dintel_display_core.h272 u8 num_levels; member in struct:intel_wm
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.h109 u32 num_levels; member in struct:kv_ps
H A Dkv_dpm.c1780 if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)
1787 (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))
1806 new_ps->levels[new_ps->num_levels - 1].sclk)
1815 new_ps->levels[new_ps->num_levels - 1].sclk))
2244 for (i = 0; i < ps->num_levels; i++) {
2250 for (i = 0; i < ps->num_levels; i++) {
2262 for (i = 0; i < ps->num_levels; i++) {
2273 for (i = 0; i < ps->num_levels; i++) {
2638 ps->num_levels = 1;
2683 ps->num_levels
[all...]
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c1203 clocks->num_levels = 0;
1206 clocks->data[clocks->num_levels].clocks_in_khz =
1208 clocks->data[clocks->num_levels].latency_in_us = latency_required ?
1212 clocks->num_levels++;
1257 clocks->num_levels = 0;
1260 clocks->data[clocks->num_levels].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;
1261 clocks->data[clocks->num_levels].voltage_in_mv = pclk_vol_table->entries[i].vol;
1262 clocks->num_levels++;
H A Dvega12_hwmgr.c1867 clocks->num_levels = ucount;
1900 clocks->num_levels = data->mclk_latency_table.count = ucount;
1928 clocks->num_levels = ucount;
1956 clocks->num_levels = ucount;
1992 clocks->num_levels = 0;
2281 for (i = 0; i < clocks.num_levels; i++)
2297 for (i = 0; i < clocks.num_levels; i++)
2315 for (i = 0; i < clocks.num_levels; i++)
2333 for (i = 0; i < clocks.num_levels; i++)
H A Dvega20_hwmgr.c2815 clocks->num_levels = count;
2843 clocks->num_levels = data->mclk_latency_table.count = count;
2868 clocks->num_levels = count;
2890 clocks->num_levels = count;
2932 clocks->num_levels = 0;
3384 for (i = 0; i < clocks.num_levels; i++)
3402 for (i = 0; i < clocks.num_levels; i++)
3420 for (i = 0; i < clocks.num_levels; i++)
3450 for (i = 0; i < clocks.num_levels; i++)
/linux-master/lib/
H A Ddecompress_unlzma.c201 rc_bit_tree_decode(struct rc *rc, uint16_t *p, int num_levels, int *symbol) argument
203 int i = num_levels;
208 *symbol -= 1 << num_levels;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1453 ASSERT(fclks->num_levels);
1456 vmid0p72_idx = fclks->num_levels -
1457 (fclks->num_levels > 2 ? 3 : (fclks->num_levels > 1 ? 2 : 1));
1458 vnom0p8_idx = fclks->num_levels - (fclks->num_levels > 1 ? 2 : 1);
1459 vmax0p9_idx = fclks->num_levels - 1;
1481 if (dcfclks->num_levels >= 3) {
1483 dc->dcn_soc->dcfclkv_mid0p72 = dcfclks->data[dcfclks->num_levels - 3].clocks_in_khz / 1000.0;
1484 dc->dcn_soc->dcfclkv_nom0p8 = dcfclks->data[dcfclks->num_levels
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/linux-master/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfs_core.c52 .num_levels = num_levels_val,\
160 int num_levels; member in struct:init_tree_node
1256 if (ft_attr->level >= fs_prio->num_levels) {
2564 int num_levels,
2576 fs_prio->num_levels = num_levels;
2585 int num_levels)
2587 return _fs_create_prio(ns, prio, num_levels, FS_TYPE_PRIO_CHAINS);
2591 unsigned int prio, int num_levels)
2593 return _fs_create_prio(ns, prio, num_levels, FS_TYPE_PRI
2562 _fs_create_prio(struct mlx5_flow_namespace *ns, unsigned int prio, int num_levels, enum fs_node_type type) argument
2583 fs_create_prio_chained(struct mlx5_flow_namespace *ns, unsigned int prio, int num_levels) argument
2590 fs_create_prio(struct mlx5_flow_namespace *ns, unsigned int prio, int num_levels) argument
[all...]
H A Dfs_core.h250 unsigned int num_levels; member in struct:fs_prio
/linux-master/drivers/hwmon/
H A Dnpcm750-pwm-fan.c843 u32 pwm_port, u8 num_levels)
852 cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
856 cdev->max_state = num_levels - 1;
859 num_levels);
840 npcm7xx_create_pwm_cooling(struct device *dev, struct device_node *child, struct npcm7xx_pwm_fan_data *data, u32 pwm_port, u8 num_levels) argument
H A Daspeed-pwm-tacho.c820 u32 pwm_port, u8 num_levels)
830 cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
834 cdev->max_state = num_levels - 1;
837 num_levels);
817 aspeed_create_pwm_cooling(struct device *dev, struct device_node *child, struct aspeed_pwm_tacho_data *priv, u32 pwm_port, u8 num_levels) argument
/linux-master/fs/verity/
H A Dverify.c143 for (level = 0; level < params->num_levels; level++) {
/linux-master/drivers/regulator/
H A Dscmi-regulator.c188 sreg->desc.n_voltages = vinfo->num_levels;
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clk_mgr.c582 if (dc->sclk_lvls.num_levels == 0)
585 for (i = 0; i < dc->sclk_lvls.num_levels; i++) {
595 return dc->sclk_lvls.clocks_in_khz[dc->sclk_lvls.num_levels - 1];
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c556 clocks->num_levels = min_t(uint32_t,
560 for (i = 0; i < clocks->num_levels; i++) {
774 display_levels = (clocks.num_levels == 1) ? 1 : 2;
872 for (i = 0; i < clocks.num_levels; i++) {
875 freq_match |= (clocks.num_levels == 1);
/linux-master/drivers/base/
H A Dcacheinfo.c319 this_cpu_ci->num_levels = levels;
505 this_cpu_ci->num_levels = levels;
/linux-master/include/linux/
H A Dscmi_protocol.h568 * @num_levels: number of total entries in @levels_uv.
578 unsigned int num_levels; member in struct:scmi_voltage_info

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