Searched refs:ioread32be (Results 26 - 50 of 140) sorted by path

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/linux-master/drivers/clk/
H A Dclk-gate.c30 return ioread32be(gate->reg);
H A Dclk-mux.c30 return ioread32be(mux->reg);
H A Dclk-qoriq.c117 val = ioread32be(reg);
473 reg = ioread32be(&cg->guts->rcwsr[7]);
485 reg = ioread32be(&cg->guts->rcwsr[7]);
503 reg = ioread32be(&cg->guts->rcwsr[7]);
518 reg = ioread32be(&cg->guts->rcwsr[7]);
/linux-master/drivers/clocksource/
H A Dtimer-fsl-ftm.c35 return ioread32be(addr);
/linux-master/drivers/counter/
H A Dftm-quaddec.c38 *data = ioread32be(ftm->ftm_base + offset);
/linux-master/drivers/crypto/caam/
H A Dregs.h114 return ioread32be(reg);
122 iowrite32be((ioread32be(reg) & ~clear) | set, reg);
/linux-master/drivers/dma/
H A Dfsl-edma-common.h367 l = ioread32be(addr);
368 h = ioread32be(addr + 4);
380 return ioread32be(addr);
H A Dfsldma.h238 #define fsl_ioread32be(p) ioread32be(p)
/linux-master/drivers/dma/ppc4xx/
H A Dadma.c983 rv = ioread32be(&xor_reg->sr);
991 u32 val = ioread32be(&xor_reg->ccbalr);
995 val = ioread32be(&xor_reg->crsr);
1006 if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&
1037 busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;
1053 if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)
1064 iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,
1145 if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {
1155 iowrite32be(ioread32be(&xor_reg->crsr) |
1189 return ioread32be(
[all...]
/linux-master/drivers/edac/
H A Dfsl_ddr_edac.c40 return little_endian ? ioread32(addr) : ioread32be(addr);
/linux-master/drivers/fsi/
H A Dfsi-master-ast-cf.c392 rdata = ioread32be(master->sram + RSP_DATA);
448 ioread32be(master->sram + CMD_STAT_REG),
451 ioread32be(master->sram + RSP_DATA),
452 ioread32be(master->sram + INT_CNT));
886 fw_options = ioread32be(master->cf_mem + HDR_OFFSET + HDR_FW_OPTIONS);
/linux-master/drivers/gpio/
H A Dgpio-hlwd.c70 pending = ioread32be(hlwd->regs + HW_GPIOB_INTFLAG);
71 pending &= ioread32be(hlwd->regs + HW_GPIOB_INTMASK);
79 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
123 mask = ioread32be(hlwd->regs + HW_GPIOB_INTMASK);
139 mask = ioread32be(hlwd->regs + HW_GPIOB_INTMASK);
157 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
158 state = ioread32be(hlwd->regs + HW_GPIOB_IN) & BIT(hwirq);
185 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
190 level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
H A Dgpio-mmio.c121 return ioread32be(reg);
H A Dgpio-realtek-otto.c117 return ioread32be(reg);
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dos.h9 #define ioread32_native ioread32be
/linux-master/drivers/i2c/busses/
H A Di2c-brcmstb.c168 #define __bsc_readl(_reg) ioread32be(_reg)
H A Di2c-mlxbf.c676 data32 = ioread32be(priv->mst->io + addr + offset);
678 data32 = ioread32be(priv->slv->io + addr + offset);
686 data32 = ioread32be(priv->mst->io + addr + offset);
688 data32 = ioread32be(priv->slv->io + addr + offset);
1877 data32 = ioread32be(priv->slv->io +
H A Di2c-ocores.c136 return ioread32be(i2c->base + (reg << i2c->reg_shift));
502 rd = ioread32be(i2c->base + (rreg << i2c->reg_shift));
517 curr = ioread32be(i2c->base + (rreg << i2c->reg_shift));
H A Di2c-xiic.c291 ret = ioread32be(i2c->base + reg);
/linux-master/drivers/input/serio/
H A Dapbps2.c65 while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) {
66 data = ioread32be(&priv->regs->data);
88 while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--)
91 if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) {
112 while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit)
113 ioread32be(&priv->regs->data);
/linux-master/drivers/irqchip/
H A Dirq-bcm7038-l1.c106 return ioread32be(reg);
H A Dirq-ls-extirq.c38 intpcr = ioread32be(priv->intpcr);
H A Dirq-ls-scfg-msi.c202 val = ioread32be(msir->reg);
H A Dirq-xilinx-intc.c59 return ioread32be(irqc->base + reg);
/linux-master/drivers/leds/
H A Dleds-bcm6328.c90 return ioread32be(reg);

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