| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 46 unsigned CC = ARMCC::AL; local
815 unsigned CC = ARMCC::AL; local
878 unsigned CC; local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 603 static Mips::CondCode condCodeToFCC(ISD::CondCode CC) { argument
631 static bool invertFPCondCodeUser(Mips::CondCode CC) { argument
111 getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument
121 getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument
131 getVectorTypeBreakdownForCallingConv( LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const argument
658 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local
667 ConstantSDNode *CC = cast<ConstantSDNode>(Cond.getOperand(2)); local
708 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); local
745 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get(); local
2033 Mips::CondCode CC = local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2508 AArch64CC::CondCode CC = AArch64CC::NE; local
2639 AArch64CC::CondCode CC = getCompareCC(Predicate); local
2743 AArch64CC::CondCode CC = AArch64CC::NE; local
3065 CallingConv::ID CC = CLI.CallConv; local
3154 CallingConv::ID CC = CLI.CallConv; local
3192 CallingConv::ID CC = CLI.CallConv; local
3388 foldXALUIntrinsic(AArch64CC::CondCode &CC, const Instruction *I, const Value *Cond) argument
3731 AArch64CC::CondCode CC = AArch64CC::Invalid; local
3862 CallingConv::ID CC = F.getCallingConv(); local
[all...] |
| H A D | AArch64InstructionSelector.cpp | 1004 const AArch64CC::CondCode CC = changeICMPPredToAArch64CC( local
3615 const AArch64CC::CondCode CC = changeICMPPredToAArch64CC(P); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 477 ARMCC::CondCodes CC = (ARMCC::CondCodes)(int)Cond[0].getImm(); local
2154 ARMCC::CondCodes CC = getInstrPredicate(MI, PredReg); local
2729 inline static ARMCC::CondCodes getCmpToAddCondition(ARMCC::CondCodes CC) { argument
3048 ARMCC::CondCodes CC; local
[all...] |
| H A D | ARMISelDAGToDAG.cpp | 3524 unsigned CC = (unsigned) cast<ConstantSDNode>(N2)->getZExtValue(); local
3636 ARMCC::CondCodes CC = local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 119 HexagonCCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF, argument
868 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); local
|
| /freebsd-11-stable/contrib/llvm-project/clang/lib/AST/ |
| H A D | Type.cpp | 2931 StringRef FunctionType::getNameForCallConv(CallingConv CC) { argument
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | CodeViewDebug.cpp | 1878 CallingConvention CC = dwarfCCToCodeView(Ty->getCC()); local
1927 CallingConvention CC = dwarfCCToCodeView(Ty->getCC()); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 3797 const ConstantInt *CC = cast<ConstantInt>(II->getArgOperand(2)); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 2081 X86::CondCode X86AsmParser::ParseConditionCode(StringRef CC) { argument
2484 unsigned CC = StringSwitch<unsigned>( local
2555 unsigned CC = StringSwitch<unsigned>( local
2584 unsigned CC = StringSwitch<unsigned>( local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | TargetInfo.cpp | 1004 unsigned CC = CallingConv::CC_C; member in struct:__anon27::CCState
[all...] |
| H A D | CGDebugInfo.cpp | 1146 static unsigned getDwarfCC(CallingConv CC) { argument
3382 CallingConv CC = FD->getType()->castAs<FunctionType>()->getCallConv(); local
3553 CallingConv CC = FTy ? FTy->getCallConv() : CallingConv::CC_C; local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2703 X86::CondCode CC = X86::COND_INVALID; local
2797 mayUseCarryFlag(X86::CondCode CC) argument
2862 X86::CondCode CC = (X86::CondCode)UI->getConstantOperandVal(CCOpNo); local
4181 ISD::CondCode CC = cast<CondCodeSDNode>(Setcc.getOperand(2))->get(); local
[all...] |
| H A D | X86InstrInfo.cpp | 2451 X86::CondCode CC = X86::getCondFromBranch(*I); local
2794 X86::CondCode CC = (X86::CondCode)Cond[0].getImm(); local
5997 X86::CondCode CC = static_cast<X86::CondCode>(Cond[0].getImm()); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 355 static void normaliseSetCC(SDValue &LHS, SDValue &RHS, ISD::CondCode &CC) { argument
372 static unsigned getBranchOpcodeForIntCondCode(ISD::CondCode CC) { argument
650 auto CC = cast<CondCodeSDNode>(CondV.getOperand(2)); local
771 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT); local
823 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT); local
1300 auto CC = static_cast<ISD::CondCode>(MI.getOperand(3).getImm()); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | CFG.cpp | 5350 print_construction_context(raw_ostream &OS, StmtPrinterHelper &Helper, const ConstructionContext *CC) argument
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 210 virtual void markLibCallAttributes(MachineFunction *MF, unsigned CC, argument
1186 bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const { argument
1192 bool isCondCodeLegalOrCustom(ISD::CondCode CC, MV argument
599 shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd( SDValue X, ConstantSDNode *XC, ConstantSDNode *CC, SDValue Y, unsigned OldShiftOpcode, unsigned NewShiftOpcode, SelectionDAG &DAG) const argument
836 getVectorTypeBreakdownForCallingConv( LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const argument
1334 getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument
1342 getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const argument
2626 setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) argument
2637 setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) argument
3495 setLibCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList) argument
3508 setCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList) argument
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 834 CCAssignFn *AMDGPUCallLowering::CCAssignFnForCall(CallingConv::ID CC, argument
856 CCAssignFn *AMDGPUCallLowering::CCAssignFnForReturn(CallingConv::ID CC, argument
913 CallingConv::ID CC = Fn.getCallingConv(); local
1033 CCAssignFn *AMDGPUTargetLowering::CCAssignFnForCall(CallingConv::ID CC, argument
1038 CCAssignFn *AMDGPUTargetLowering::CCAssignFnForReturn(CallingConv::ID CC, argument
1256 combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, SDValue True, SDValue False, SDValue CC, DAGCombinerInfo &DCI) const argument
3586 SDValue CC = Cond.getOperand(2); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2672 AArch64CC::CondCode CC = StringSwitch<AArch64CC::CondCode>(Cond.lower()) local
2720 AArch64CC::CondCode CC = parseCondCodeString(Cond); local
3803 AArch64CC::CondCode CC = parseCondCodeString(Head); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/clang/include/clang/AST/ |
| H A D | Type.h | 3577 ExtInfo(CallingConv CC) : Bits(CC) {} argument
3849 ExtProtoInfo(CallingConv CC) argument
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 4140 SDValue CC = N->getOperand(3); local
4633 SDValue CC = DAG.getNode( local
4647 SDValue CC = N->getOperand(3); local
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1967 CCMaskForCondCode(ISD::CondCode CC) argument
2486 getIntrinsicCmp(SelectionDAG &DAG, unsigned Opcode, SDValue Call, unsigned CCValid, uint64_t CC, ISD::CondCode Cond) argument
4090 SDValue CC = getCCResult(DAG, SDValue(Node, 0)); local
4091 DAG.ReplaceAllUsesOfValueWith(SDValue(Op.getNode(), 0), CC); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaType.cpp | 3593 CallingConv CC; local
3642 CallingConv CC = S.Context.getDefaultCallingConvention(FTI.isVariadic, local
7139 CallingConv CC = fn->getCallConv(); local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2906 get32BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC, int64_t RHSValue, SDLoc dl) argument
3079 get32BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC, int64_t RHSValue, SDLoc dl) argument
3251 get64BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC, int64_t RHSValue, SDLoc dl) argument
3408 get64BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC, int64_t RHSValue, SDLoc dl) argument
3609 ISD::CondCode CC = local
3695 SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC, const SDLoc &dl) argument
3852 getPredicateForSetCC(ISD::CondCode CC, const EVT &VT, const PPCSubtarget *Subtarget) argument
3893 getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) argument
3925 getVCmpInst(MVT VecVT, ISD::CondCode CC, bool HasVSX, bool &Swap, bool &Negate) argument
4036 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get(); local
4234 mayUseP9Setb(SDNode *N, const ISD::CondCode &CC, SelectionDAG *DAG, bool &NeedSwapOps, bool &IsUnCmp) argument
4863 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get(); local
5070 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get(); local
[all...] |