Target/SystemZ/SystemZISelLowering.cpp

52   // The mask of CC values that Opcode can produce.
55   // The mask of CC values for which the original condition is true.
120   // such as SystemZ has with CC, so set this to the register-pressure
250   // We can use the CC result of compare-and-swap to implement
1741 // Return true if Op is an intrinsic node with chain that returns the CC value
1743 // the mask of valid CC values if so.
1769 // CC value as its final argument.  Provide the associated SystemZISD
1770 // opcode and the mask of valid CC values if so.
1928 // Emit an intrinsic with chain and an explicit CC register result.
1939   assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
1948 // Emit an intrinsic with an explicit CC register result.
1962 // CC is a comparison that will be implemented using an integer or
1967 static unsigned CCMaskForCondCode(ISD::CondCode CC) {
1973   switch (CC) {
2164 // Return a version of comparison CC mask CCMask in which the LT and GT
2195 // negation to set CC, so avoiding separate LOAD AND TEST and
2245 // reuse CC.
2280 // instruction and whether the CC value is descriptive enough to handle
2284 // return the corresponding CC mask, otherwise return 0.
2483 // node Call against constant integer CC using comparison code Cond.
2487                                   SDValue Call, unsigned CCValid, uint64_t CC,
2493     // bit 3 for CC==0, bit 0 for CC==3, always false for CC>3.
2494     C.CCMask = CC < 4 ? 1 << (3 - CC) : 0;
2497     C.CCMask = CC < 4 ? ~(1 << (3 - CC)) : -1;
2499     // bits above bit 3 for CC==0 (always false), bits above bit 0 for CC==3,
2500     // always true for CC>3.
2501     C.CCMask = CC < 4 ? ~0U << (4 - CC) : -1;
2504     C.CCMask = CC < 4 ? ~(~0U << (4 - CC)) : 0;
2506     // bit 3 and above for CC==0, bit 0 and above for CC==3 (always true),
2507     // always true for CC>3.
2508     C.CCMask = CC < 4 ? ~0U << (3 - CC) : -1;
2511     C.CCMask = CC < 4 ? ~(~0U << (3 - CC)) : 0;
2641 // Return an i32 value that is 1 if the CC value produced by CCReg is
2642 // in the mask CCMask and 0 otherwise.  CC is known to have a value
2653 // Return the SystemISD vector comparison operation for CC, or 0 if it cannot
2659 static unsigned getVectorComparison(ISD::CondCode CC, CmpMode Mode) {
2660   switch (CC) {
2705 // Return the SystemZISD vector comparison operation for CC or its inverse,
2707 // result is for the inverse of CC.  Mode is as above.
2708 static unsigned getVectorComparisonOrInvert(ISD::CondCode CC, CmpMode Mode,
2710   if (unsigned Opcode = getVectorComparison(CC, Mode)) {
2715   CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32);
2716   if (unsigned Opcode = getVectorComparison(CC, Mode)) {
2776 // Lower a vector comparison of type CC between CmpOp0 and CmpOp1, producing
2782                                                 ISD::CondCode CC,
2794   switch (CC) {
2833     if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2836       CC = ISD::getSetCCSwappedOperands(CC);
2837       if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2862   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2866     return lowerVectorSETCC(DAG, DL, VT, CC, CmpOp0, CmpOp1);
2868   Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
2879   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(3))->get();
2883     SDValue Res = lowerVectorSETCC(DAG, DL, VT, CC, CmpOp0, CmpOp1,
2888   Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling));
2897   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2903   Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
2939   ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
2942   Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
3945   // still need to expand extracting the "success" result from the CC.
4088     assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
4090     SDValue CC = getCCResult(DAG, SDValue(Node, 0));
4091     DAG.ReplaceAllUsesOfValueWith(SDValue(Op.getNode(), 0), CC);
4106     assert(Op->getNumValues() == 2 && "Expected a CC and non-CC result");
6208     // Compute the effective CC mask for the new branch or select.
6238     // Avoid introducing CC spills (because SRA would clobber CC).
6245     // Compute the effective CC mask for the new branch or select.
6315   // Optimize away GET_CCMASK (SELECT_CCMASK) if the CC masks are compatible
6528   // Intrinsic CC result is returned in the two low bits.
6743 // The CC operand of MI might be missing a kill marker because there
6744 // were multiple uses of CC, and ISel didn't know which to mark.
6747   // Scan forward through BB for a use/def of CC.
6751     if (mi.readsRegister(SystemZ::CC))
6753     if (mi.definesRegister(SystemZ::CC))
6757   // If we hit the end of the block, check whether CC is live into a
6761       if ((*SI)->isLiveIn(SystemZ::CC))
6864              "Bad CCValid operands since CC was not redefined.");
6872     if (NextMIIt->definesRegister(SystemZ::CC) ||
6893       (LastMI->killsRegister(SystemZ::CC) || checkCCKill(*LastMI, MBB));
6898   // Unless CC was killed in the last Select instruction, mark it as
6901     FalseMBB->addLiveIn(SystemZ::CC);
6902     JoinMBB->addLiveIn(SystemZ::CC);
6992   // Unless CC was killed in the CondStore instruction, mark it as
6994   if (!MI.killsRegister(SystemZ::CC) && !checkCCKill(MI, JoinMBB)) {
6995     FalseMBB->addLiveIn(SystemZ::CC);
6996     JoinMBB->addLiveIn(SystemZ::CC);
7377   // If the CC def wasn't dead in the ATOMIC_CMP_SWAPW, mark CC as live-in
7378   // to the block after the loop.  At this point, CC may have been defined
7380   if (!MI.registerDefIsDead(SystemZ::CC))
7381     DoneMBB->addLiveIn(SystemZ::CC);
7566       // CC live-through into EndMBB, so add it as live-in.
7567       DoneMBB->addLiveIn(SystemZ::CC);
7618     MBB->addLiveIn(SystemZ::CC);
7626 // Opcode until CC != 3.
7679   DoneMBB->addLiveIn(SystemZ::CC);