Searched refs:priority (Results 201 - 225 of 1104) sorted by path

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras.c3877 .priority = MCE_PRIO_UC,
H A Damdgpu_sched.c37 int32_t priority)
58 amdgpu_ctx_priority_override(ctx, priority);
68 int32_t priority)
91 amdgpu_ctx_priority_override(ctx, priority);
116 if (!amdgpu_ctx_priority_is_valid(args->in.priority)) {
117 WARN(1, "Invalid context priority %d\n", args->in.priority);
125 args->in.priority);
131 args->in.priority);
35 amdgpu_sched_process_priority_override(struct amdgpu_device *adev, int fd, int32_t priority) argument
65 amdgpu_sched_context_priority_override(struct amdgpu_device *adev, int fd, unsigned ctx_id, int32_t priority) argument
H A Dgfx_v10_0.c6461 bool priority = 0; local
6464 /* set up default queue priority level
6465 * 0x0 = low priority, 0x1 = high priority
6468 priority = 1;
6471 tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_QUEUE_PRIORITY, PRIORITY_LEVEL, priority);
6503 /* set up gfx queue priority */
6739 /* set static priority for a compute queue/ring */
/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm199 // Clear SPI_PRIO: do not save with elevated priority.
H A Dcwsr_trap_handler_gfx9.asm202 // Clear SPI_PRIO: do not save with elevated priority.
H A Dkfd_chardev.c200 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
247 q_properties->priority = args->queue_priority;
277 q_properties->priority, args->queue_priority);
470 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
491 properties.priority = args->queue_priority;
H A Dkfd_device_queue_manager.c210 queue_input.inprocess_gang_priority = q->properties.priority;
H A Dkfd_kernel_queue.c131 prop.priority = 1;
H A Dkfd_mqd_manager_cik.c72 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
73 m->cp_hqd_queue_priority = q->priority;
124 * Identifies the pipe relative priority when this queue is connected
125 * to the pipeline. The pipe priority is against the GFX pipe and HP3D.
126 * In KFD we are using a fixed pipe priority set to CS_MEDIUM.
H A Dkfd_mqd_manager_v10.c72 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
73 m->cp_hqd_queue_priority = q->priority;
H A Dkfd_mqd_manager_v11.c98 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
99 m->cp_hqd_queue_priority = q->priority;
H A Dkfd_mqd_manager_v9.c106 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
107 m->cp_hqd_queue_priority = q->priority;
H A Dkfd_mqd_manager_vi.c75 m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
76 m->cp_hqd_queue_priority = q->priority;
H A Dkfd_priv.h446 * @priority: Defines the queue priority relative to other queues in the
448 * This is just an indication and HW scheduling may override the priority as
450 * the priority granularity is from 0 to f which f is the highest priority.
451 * currently all queues are initialized with the highest priority.
494 uint32_t priority; member in struct:queue_properties
1231 uint32_t priority; member in struct:kfd_criu_queue_priv_data
H A Dkfd_process_queue_manager.c526 pqn->q->properties.priority = p->priority;
758 q_data->priority = q->properties.priority;
887 qp->priority = q_data->priority;
/linux-master/drivers/gpu/drm/exynos/
H A Dexynos_mixer.c457 unsigned int priority, bool enable)
465 MXR_LAYER_CFG_GRP0_VAL(priority),
471 MXR_LAYER_CFG_GRP1_VAL(priority),
481 MXR_LAYER_CFG_VP_VAL(priority),
519 unsigned int priority = state->base.normalized_zpos + 1; local
591 mixer_cfg_layer(ctx, plane->index, priority, true);
606 unsigned int priority = state->base.normalized_zpos + 1; local
679 mixer_cfg_layer(ctx, win, priority, true);
716 /* reset default layer priority */
456 mixer_cfg_layer(struct mixer_context *ctx, unsigned int win, unsigned int priority, bool enable) argument
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_atomic_plane.c1069 struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_context.c175 s64 priority = args->value; local
183 if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
184 priority < I915_CONTEXT_MIN_USER_PRIORITY)
187 if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
298 pc->sched.priority = I915_PRIORITY_NORMAL;
929 pc->sched.priority = args->value;
987 if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
1338 * Send a "high priority pulse" down the engine to cause the
2081 ctx->sched.priority = args->value;
2087 if (ctx->sched.priority >
[all...]
H A Di915_gem_ttm.c983 bo->priority = TTM_MAX_BO_PRIORITY - 1;
985 bo->priority = I915_TTM_PRIO_PURGE;
987 bo->priority = I915_TTM_PRIO_NO_PAGES;
1003 bo->priority = I915_TTM_PRIO_NEEDS_CPU_ACCESS;
1005 bo->priority = I915_TTM_PRIO_HAS_PAGES;
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_engine_heartbeat.c41 if (rq && rq->sched.attr.priority >= I915_PRIORITY_BARRIER &&
46 * The final try is at the highest priority possible. Up until now
112 rq->sched.attr.priority);
138 struct i915_sched_attr attr = { .priority = I915_PRIORITY_MIN };
185 rq->sched.attr.priority < I915_PRIORITY_BARRIER) {
187 * Gradually raise the priority of the heartbeat to
188 * give high priority work [which presumably desires
192 attr.priority = I915_PRIORITY_NORMAL;
193 if (rq->sched.attr.priority >= attr.priority)
[all...]
H A Dintel_engine_pm.c222 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
H A Dintel_execlists_submission.c188 * engine, sorted by priority. Here we preallocate the nodes we need
258 return READ_ONCE(rq->sched.attr.priority);
287 return to_priolist(rb)->priority;
306 * Check if the current priority hint merits a preemption attempt.
308 * We record the highest value priority we saw during rescheduling
313 * However, the priority hint is a mere hint that we may need to
320 * priority level: the task that is running should remain running
329 * power of PI, be the highest priority of that context.
337 * it was the set of queued requests? Pick the highest priority in
341 * The highest priority reques
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H A Dselftest_context.c26 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
H A Dselftest_execlists.c271 .priority = prio,
390 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
437 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
893 .priority = prio,
1329 struct i915_sched_attr attr = { .priority = I915_PRIORITY_MAX };
1369 /* Queue: semaphore signal, matching priority as semaphore */
1466 /* Followed by a maximum priority barrier (heartbeat) */
1481 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
1497 * allow the maximum priority barrier through. Wait long
1545 ctx_hi->sched.priority
[all...]
H A Dselftest_hangcheck.c931 .priority =
986 h.ctx->sched.priority = 1024;
1259 "others-priority",
1263 "self-priority",

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