/linux-master/drivers/clocksource/ |
H A D | renesas-ostm.c | 76 return readl(system_clock);
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/linux-master/drivers/bcma/ |
H A D | host_soc.c | 28 return readl(core->io_addr + offset); 142 return readl(core->io_wrap + offset);
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/linux-master/drivers/atm/ |
H A D | fore200e.c | 434 return le32_to_cpu(readl(addr)); 449 int irq_posted = readl(fore200e->regs.pca.psr); 452 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
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/linux-master/drivers/ata/ |
H A D | sata_sil24.c | 505 *val = readl(scr_addr + sil24_scr_map[sc_reg] * 4); 613 irq_enabled = readl(port + PORT_IRQ_ENABLE_SET); 962 tmp = readl(port + PORT_IRQ_STAT); 980 irq_stat = readl(port + PORT_IRQ_STAT); 1034 context = readl(port + PORT_CONTEXT); 1054 cerr = readl(port + PORT_CMD_ERR); 1112 slot_stat = readl(port + PORT_SLOT_STAT); 1146 status = readl(host_base + HOST_IRQ_STAT); 1240 tmp = readl(port + PORT_CTRL_STAT); 1289 tmp = readl(ioma [all...] |
H A D | sata_nv.c | 918 notifier = readl(mmio + NV_ADMA_NOTIFIER); 919 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); 922 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL); 1610 mask = readl(mmio_base + NV_INT_ENABLE_MCP55); 1623 mask = readl(mmio_base + NV_INT_ENABLE_MCP55); 1637 u32 notifier = readl(mmio + NV_ADMA_NOTIFIER); 1638 u32 notifier_error = readl(mmio + NV_ADMA_NOTIFIER_ERROR); 1639 u32 gen_ctl = readl(pp->gen_block + NV_ADMA_GEN_CTL); 1769 sactive = readl(pp->sactive_block); 1822 tmp = readl(mmi [all...] |
H A D | sata_mv.c | 832 (void) readl(addr); /* flush to avoid PCI posted write */ 920 pp->cached.fiscfg = readl(port_mmio + FISCFG); 921 pp->cached.ltmode = readl(port_mmio + LTMODE); 922 pp->cached.haltcond = readl(port_mmio + EDMA_HALTCOND); 923 pp->cached.unknown_rsvd = readl(port_mmio + EDMA_UNKNOWN_RSVD); 1170 u32 edma_stat = readl(port_mmio + EDMA_STATUS); 1194 u32 reg = readl(port_mmio + EDMA_CMD); 1228 "%08x ", readl(start + b)); 1315 *val = readl(mv_ap_base(link->ap) + ofs); 1342 if ((val & 0xf) == 1 || (readl(add [all...] |
H A D | pata_macio.c | 586 while (--timeout && (readl(&dma_regs->status) & RUN)) 633 (void)readl(&dma_regs->control); 647 while (--timeout && (readl(&dma_regs->status) & RUN)) 658 dstat = readl(&dma_regs->status); 696 dstat = readl(&dma_regs->status); 873 u32 fcr = readl(priv->kauai_fcr);
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/linux-master/drivers/acpi/x86/ |
H A D | lpss.c | 135 val = readl(pdata->mmio_base + offset); 138 val = readl(pdata->mmio_base + LPSS_UART_CPR); 141 val = readl(pdata->mmio_base + offset); 153 val = readl(pdata->mmio_base + offset); 194 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) 450 if (!readl(prv_base)) 695 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
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/linux-master/arch/x86/platform/ce4100/ |
H A D | ce4100.c | 39 return readl(p->membase + offset); 58 ret = readl(p->membase + offset);
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/linux-master/arch/x86/include/asm/ |
H A D | apic.h | 103 return readl((void __iomem *)(APIC_BASE + reg));
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/linux-master/arch/x86/events/intel/ |
H A D | uncore_snbep.c | 5146 config = readl(box->io_addr); 5158 config = readl(box->io_addr);
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/linux-master/arch/sh/boards/ |
H A D | board-sh7757lcr.c | 57 writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); 59 writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); 120 writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); 123 writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT);
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/linux-master/arch/alpha/kernel/ |
H A D | io.c | 135 return IO_CONCAT(__IO_PREFIX,readl)(addr); 190 u32 readl(const volatile void __iomem *addr) function 234 EXPORT_SYMBOL(readl); variable
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/linux-master/arch/alpha/include/asm/ |
H A D | io.h | 157 REMAP1(u32, readl, const volatile) 248 extern u32 readl(const volatile void __iomem *addr); 256 #define readl readl macro 486 return IO_CONCAT(__IO_PREFIX,readl)(addr); 504 extern inline u32 readl(const volatile void __iomem *addr) function
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/linux-master/drivers/soc/ti/ |
H A D | wkup_m3_ipc.c | 260 return readl(m3_ipc->ipc_mem_base +
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/linux-master/drivers/soc/tegra/ |
H A D | pmc.c | 503 return readl(pmc->base + offset); 532 return readl(pmc->scratch + offset); 2385 value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID)); 2404 value = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(offset)); 2424 value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); 3049 value = readl(pmc->wake + offset); 3104 status = readl(pmc->wake + WAKE_AOWAKE_SW_STATUS(i)); 3118 mask = readl(pmc->wake + WAKE_AOWAKE_TIER2_ROUTING(i)); 3119 status = readl(pmc->wake + WAKE_AOWAKE_STATUS_R(i)) & mask; 3158 mask = readl(pm [all...] |
/linux-master/drivers/soc/renesas/ |
H A D | renesas-soc.c | 519 product = readl(chipid + id->offset);
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/linux-master/drivers/soc/qcom/ |
H A D | rpmh-rsc.c | 242 if (readl(tcs_reg_addr(drv, reg, tcs_id)) == data)
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H A D | qcom_stats.c | 145 stats_offset = readl(reg + RPM_DYNAMIC_ADDR); 159 type = readl(d[i].base);
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/linux-master/drivers/memory/ |
H A D | mtk-smi.c | 211 reg_val = readl(common->smi_ao_base
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/linux-master/drivers/edac/ |
H A D | synopsys_edac.c | 365 regval = readl(base + STAT_OFST); 372 regval = readl(base + CE_LOG_OFST); 377 regval = readl(base + CE_ADDR_OFST); 381 p->ceinfo.data = readl(base + CE_DATA_31_0_OFST); 387 regval = readl(base + UE_LOG_OFST); 391 regval = readl(base + UE_ADDR_OFST); 395 p->ueinfo.data = readl(base + UE_DATA_31_0_OFST); 421 regval = readl(base + ECC_ERRCNT_OFST); 427 regval = readl(base + ECC_STAT_OFST); 433 regval = readl(bas [all...] |
/linux-master/drivers/bus/ |
H A D | stm32_rifsc.c | 75 return !(readl(addr) & SEMCR_MUTEX); 87 FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) != RIF_CID1) 105 FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) == RIF_CID1); 126 sec_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id); 127 cid_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * firewall_id); 210 nb_risup = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF1_MASK; 211 nb_rimu = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF2_MASK; 212 nb_risal = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF3_MASK;
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H A D | stm32_etzpc.c | 58 sec_val = (readl(ctrl->mmio + reg_offset) >> offset) & ETZPC_PROT_MASK; 99 readl(etzpc_controller->mmio + ETZPC_HWCFGR)); 101 readl(etzpc_controller->mmio + ETZPC_HWCFGR));
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/linux-master/arch/arm/mach-orion5x/ |
H A D | dns323-setup.c | 574 reg = readl(ETH_SMI_REG); 586 reg = readl(ETH_SMI_REG);
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/linux-master/arch/arm/mach-imx/ |
H A D | mmdc.c | 214 return readl(reg);
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