/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | psp_v10_0.c | 75 struct psp_ring *ring = &psp->km_ring; local 78 /* Write low address of the ring to C2PMSG_69 */ 79 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 81 /* Write high address of the ring to C2PMSG_70 */ 82 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 84 /* Write size of ring to C2PMSG_71 */ 85 psp_ring_reg = ring->ring_size; 87 /* Write the ring initialization command to C2PMSG_64 */ 109 /* Write the ring destroy command to C2PMSG_64 */ 127 struct psp_ring *ring local [all...] |
H A D | psp_v11_0.c | 266 /* Write the ring destroy command*/ 293 struct psp_ring *ring = &psp->km_ring; local 297 ring->ring_wptr = 0; 304 /* Write low address of the ring to C2PMSG_102 */ 305 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 307 /* Write high address of the ring to C2PMSG_103 */ 308 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 311 /* Write the ring initialization command to C2PMSG_101 */ 323 /* Wait for sOS ready for ring creation */ 327 DRM_ERROR("Failed to wait for sOS ready for ring creatio 361 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v11_0_8.c | 38 /* Write the ring destroy command*/ 47 /* Write the ring destroy command*/ 65 struct psp_ring *ring = &psp->km_ring; local 75 /* Write low address of the ring to C2PMSG_102 */ 76 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 78 /* Write high address of the ring to C2PMSG_103 */ 79 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 82 /* Write the ring initialization command to C2PMSG_101 */ 94 /* Wait for sOS ready for ring creation */ 98 DRM_ERROR("Failed to wait for trust OS ready for ring creatio 131 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v12_0.c | 155 /* Change IH ring for VMC */ 168 /* Change IH ring for UMC */ 186 struct psp_ring *ring = &psp->km_ring; local 192 /* Write low address of the ring to C2PMSG_102 */ 193 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 195 /* Write high address of the ring to C2PMSG_103 */ 196 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 199 /* Write the ring initialization command to C2PMSG_101 */ 211 /* Write low address of the ring to C2PMSG_69 */ 212 psp_ring_reg = lower_32_bits(ring 268 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v13_0.c | 337 /* Write the ring destroy command*/ 346 /* Write the ring destroy command*/ 364 struct psp_ring *ring = &psp->km_ring; local 374 /* Write low address of the ring to C2PMSG_102 */ 375 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 377 /* Write high address of the ring to C2PMSG_103 */ 378 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 381 /* Write the ring initialization command to C2PMSG_101 */ 393 /* Wait for sOS ready for ring creation */ 397 DRM_ERROR("Failed to wait for trust OS ready for ring creatio 430 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v13_0_4.c | 201 /* Write the ring destroy command*/ 210 /* Write the ring destroy command*/ 228 struct psp_ring *ring = &psp->km_ring; local 238 /* Write low address of the ring to C2PMSG_102 */ 239 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 241 /* Write high address of the ring to C2PMSG_103 */ 242 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 245 /* Write the ring initialization command to C2PMSG_101 */ 257 /* Wait for sOS ready for ring creation */ 261 DRM_ERROR("Failed to wait for trust OS ready for ring creatio 294 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v14_0.c | 230 /* Write the ring destroy command*/ 239 /* Write the ring destroy command*/ 257 struct psp_ring *ring = &psp->km_ring; local 267 /* Write low address of the ring to C2PMSG_102 */ 268 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 270 /* Write high address of the ring to C2PMSG_103 */ 271 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 274 /* Write the ring initialization command to C2PMSG_101 */ 286 /* Wait for sOS ready for ring creation */ 290 DRM_ERROR("Failed to wait for trust OS ready for ring creatio 323 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | psp_v3_1.c | 160 /* Change IH ring for VMC */ 173 /* Change IH ring for UMC */ 191 struct psp_ring *ring = &psp->km_ring; local 197 ring->ring_wptr = 0; 204 /* Write low address of the ring to C2PMSG_102 */ 205 psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); 207 /* Write high address of the ring to C2PMSG_103 */ 208 psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); 211 /* Write the ring initialization command to C2PMSG_101 */ 225 /* Write low address of the ring t 283 struct psp_ring *ring = &psp->km_ring; local [all...] |
H A D | sdma_v2_4.c | 82 * and each one supports 1 ring buffer used for gfx 86 * (ring buffer, IBs, etc.), but sDMA has it's own 182 * @ring: amdgpu ring pointer 186 static uint64_t sdma_v2_4_ring_get_rptr(struct amdgpu_ring *ring) argument 189 return *ring->rptr_cpu_addr >> 2; 195 * @ring: amdgpu ring pointer 199 static uint64_t sdma_v2_4_ring_get_wptr(struct amdgpu_ring *ring) argument 201 struct amdgpu_device *adev = ring 214 sdma_v2_4_ring_set_wptr(struct amdgpu_ring *ring) argument 221 sdma_v2_4_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 244 sdma_v2_4_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 272 sdma_v2_4_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 304 sdma_v2_4_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 400 struct amdgpu_ring *ring; local 528 sdma_v2_4_ring_test_ring(struct amdgpu_ring *ring) argument 581 sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 731 sdma_v2_4_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 755 sdma_v2_4_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 783 sdma_v2_4_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 800 sdma_v2_4_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 830 struct amdgpu_ring *ring; local [all...] |
H A D | sdma_v3_0.c | 186 * and each one supports 1 ring buffer used for gfx 190 * (ring buffer, IBs, etc.), but sDMA has it's own 340 * @ring: amdgpu ring pointer 344 static uint64_t sdma_v3_0_ring_get_rptr(struct amdgpu_ring *ring) argument 347 return *ring->rptr_cpu_addr >> 2; 353 * @ring: amdgpu ring pointer 357 static uint64_t sdma_v3_0_ring_get_wptr(struct amdgpu_ring *ring) argument 359 struct amdgpu_device *adev = ring 379 sdma_v3_0_ring_set_wptr(struct amdgpu_ring *ring) argument 397 sdma_v3_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 420 sdma_v3_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 448 sdma_v3_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 480 sdma_v3_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 637 struct amdgpu_ring *ring; local 802 sdma_v3_0_ring_test_ring(struct amdgpu_ring *ring) argument 855 sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1004 sdma_v3_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1028 sdma_v3_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1056 sdma_v3_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1073 sdma_v3_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1110 struct amdgpu_ring *ring; local [all...] |
H A D | sdma_v4_0.c | 602 * @ring: amdgpu ring pointer 606 static uint64_t sdma_v4_0_ring_get_rptr(struct amdgpu_ring *ring) argument 611 rptr = ((u64 *)ring->rptr_cpu_addr); 620 * @ring: amdgpu ring pointer 624 static uint64_t sdma_v4_0_ring_get_wptr(struct amdgpu_ring *ring) argument 626 struct amdgpu_device *adev = ring->adev; 629 if (ring->use_doorbell) { 631 wptr = READ_ONCE(*((u64 *)ring 651 sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring) argument 693 sdma_v4_0_page_ring_get_wptr(struct amdgpu_ring *ring) argument 717 sdma_v4_0_page_ring_set_wptr(struct amdgpu_ring *ring) argument 737 sdma_v4_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 760 sdma_v4_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 781 sdma_v4_0_wait_reg_mem(struct amdgpu_ring *ring, int mem_space, int hdp, uint32_t addr0, uint32_t addr1, uint32_t ref, uint32_t mask, uint32_t inv) argument 813 sdma_v4_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 839 sdma_v4_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 1019 sdma_v4_0_rb_cntl(struct amdgpu_ring *ring, uint32_t rb_cntl) argument 1044 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; local 1129 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; local 1337 struct amdgpu_ring *ring; local 1416 sdma_v4_0_ring_test_ring(struct amdgpu_ring *ring) argument 1469 sdma_v4_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1621 sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1646 sdma_v4_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1669 sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1675 sdma_v4_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1684 sdma_v4_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1750 struct amdgpu_ring *ring; local [all...] |
H A D | sdma_v4_4_2.c | 154 * @ring: amdgpu ring pointer 158 static uint64_t sdma_v4_4_2_ring_get_rptr(struct amdgpu_ring *ring) argument 163 rptr = READ_ONCE(*((u64 *)&ring->adev->wb.wb[ring->rptr_offs])); 172 * @ring: amdgpu ring pointer 176 static uint64_t sdma_v4_4_2_ring_get_wptr(struct amdgpu_ring *ring) argument 178 struct amdgpu_device *adev = ring->adev; 181 if (ring 203 sdma_v4_4_2_ring_set_wptr(struct amdgpu_ring *ring) argument 245 sdma_v4_4_2_page_ring_get_wptr(struct amdgpu_ring *ring) argument 269 sdma_v4_4_2_page_ring_set_wptr(struct amdgpu_ring *ring) argument 289 sdma_v4_4_2_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 312 sdma_v4_4_2_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 333 sdma_v4_4_2_wait_reg_mem(struct amdgpu_ring *ring, int mem_space, int hdp, uint32_t addr0, uint32_t addr1, uint32_t ref, uint32_t mask, uint32_t inv) argument 365 sdma_v4_4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 392 sdma_v4_4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 596 sdma_v4_4_2_rb_cntl(struct amdgpu_ring *ring, uint32_t rb_cntl) argument 622 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; local 710 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; local 867 struct amdgpu_ring *ring; local 954 sdma_v4_4_2_ring_test_ring(struct amdgpu_ring *ring) argument 1007 sdma_v4_4_2_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1159 sdma_v4_4_2_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1184 sdma_v4_4_2_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1207 sdma_v4_4_2_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1213 sdma_v4_4_2_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1222 sdma_v4_4_2_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1282 struct amdgpu_ring *ring; local [all...] |
H A D | sdma_v5_0.c | 252 static unsigned sdma_v5_0_ring_init_cond_exec(struct amdgpu_ring *ring, argument 257 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE)); 258 amdgpu_ring_write(ring, lower_32_bits(addr)); 259 amdgpu_ring_write(ring, upper_32_bits(addr)); 260 amdgpu_ring_write(ring, 1); 262 ret = ring->wptr & ring->buf_mask; 264 amdgpu_ring_write(ring, 0); 272 * @ring: amdgpu ring pointe 276 sdma_v5_0_ring_get_rptr(struct amdgpu_ring *ring) argument 294 sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring) argument 320 sdma_v5_0_ring_set_wptr(struct amdgpu_ring *ring) argument 387 sdma_v5_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 410 sdma_v5_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 445 sdma_v5_0_ring_emit_mem_sync(struct amdgpu_ring *ring) argument 469 sdma_v5_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 503 sdma_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 668 struct amdgpu_ring *ring; local 969 sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring) argument 1046 sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1227 sdma_v5_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1252 sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1281 sdma_v5_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1287 sdma_v5_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1296 sdma_v5_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1310 sdma_v5_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, uint32_t reg0, uint32_t reg1, uint32_t ref, uint32_t mask) argument 1341 struct amdgpu_ring *ring; local 1475 sdma_v5_0_ring_preempt_ib(struct amdgpu_ring *ring) argument [all...] |
H A D | sdma_v5_2.c | 92 static unsigned sdma_v5_2_ring_init_cond_exec(struct amdgpu_ring *ring, argument 97 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE)); 98 amdgpu_ring_write(ring, lower_32_bits(addr)); 99 amdgpu_ring_write(ring, upper_32_bits(addr)); 100 amdgpu_ring_write(ring, 1); 102 ret = ring->wptr & ring->buf_mask; 104 amdgpu_ring_write(ring, 0); 112 * @ring: amdgpu ring pointe 116 sdma_v5_2_ring_get_rptr(struct amdgpu_ring *ring) argument 134 sdma_v5_2_ring_get_wptr(struct amdgpu_ring *ring) argument 160 sdma_v5_2_ring_set_wptr(struct amdgpu_ring *ring) argument 194 sdma_v5_2_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 217 sdma_v5_2_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 252 sdma_v5_2_ring_emit_mem_sync(struct amdgpu_ring *ring) argument 277 sdma_v5_2_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 312 sdma_v5_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 475 struct amdgpu_ring *ring; local 809 sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring) argument 886 sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1067 sdma_v5_2_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1092 sdma_v5_2_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1121 sdma_v5_2_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1127 sdma_v5_2_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1136 sdma_v5_2_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1150 sdma_v5_2_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, uint32_t reg0, uint32_t reg1, uint32_t ref, uint32_t mask) argument 1214 struct amdgpu_ring *ring; local 1332 sdma_v5_2_ring_preempt_ib(struct amdgpu_ring *ring) argument 1639 sdma_v5_2_ring_begin_use(struct amdgpu_ring *ring) argument 1654 sdma_v5_2_ring_end_use(struct amdgpu_ring *ring) argument [all...] |
H A D | sdma_v6_0.c | 83 static unsigned sdma_v6_0_ring_init_cond_exec(struct amdgpu_ring *ring, argument 88 amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COND_EXE)); 89 amdgpu_ring_write(ring, lower_32_bits(addr)); 90 amdgpu_ring_write(ring, upper_32_bits(addr)); 91 amdgpu_ring_write(ring, 1); 93 ret = ring->wptr & ring->buf_mask; 95 amdgpu_ring_write(ring, 0); 103 * @ring: amdgpu ring pointe 107 sdma_v6_0_ring_get_rptr(struct amdgpu_ring *ring) argument 125 sdma_v6_0_ring_get_wptr(struct amdgpu_ring *ring) argument 145 sdma_v6_0_ring_set_wptr(struct amdgpu_ring *ring) argument 180 sdma_v6_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 203 sdma_v6_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 238 sdma_v6_0_ring_emit_mem_sync(struct amdgpu_ring *ring) argument 263 sdma_v6_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 294 sdma_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 423 struct amdgpu_ring *ring; local 717 struct amdgpu_ring *ring; local 831 sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring) argument 908 sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 1088 sdma_v6_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 1112 sdma_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1140 sdma_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1167 sdma_v6_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1176 sdma_v6_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1190 sdma_v6_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, uint32_t reg0, uint32_t reg1, uint32_t ref, uint32_t mask) argument 1238 struct amdgpu_ring *ring; local 1358 sdma_v6_0_ring_preempt_ib(struct amdgpu_ring *ring) argument [all...] |
H A D | si.c | 1483 static void si_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) argument 1485 if (!ring || !ring->funcs->emit_wreg) { 1489 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); 1494 struct amdgpu_ring *ring) 1496 if (!ring || !ring->funcs->emit_wreg) { 1500 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); 1493 si_invalidate_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring) argument
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H A D | si_dma.c | 41 static uint64_t si_dma_ring_get_rptr(struct amdgpu_ring *ring) argument 43 return *ring->rptr_cpu_addr; 46 static uint64_t si_dma_ring_get_wptr(struct amdgpu_ring *ring) argument 48 struct amdgpu_device *adev = ring->adev; 49 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; 54 static void si_dma_ring_set_wptr(struct amdgpu_ring *ring) argument 56 struct amdgpu_device *adev = ring->adev; 57 u32 me = (ring == &adev->sdma.instance[0].ring) 62 si_dma_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 91 si_dma_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 128 struct amdgpu_ring *ring; local 192 si_dma_ring_test_ring(struct amdgpu_ring *ring) argument 243 si_dma_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 400 si_dma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) argument 413 si_dma_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 438 si_dma_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 452 si_dma_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 476 struct amdgpu_ring *ring; local [all...] |
H A D | si_ih.c | 116 dev_warn(adev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n", 139 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); 140 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); 141 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); 142 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
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H A D | tonga_ih.c | 38 * Starting with r6xx, interrupts are handled via a ring buffer. 44 * pointers are equal, the ring is idle. When the GPU 45 * writes vectors to the ring buffer, it increments the 54 * tonga_ih_enable_interrupts - Enable the interrupt ring buffer 58 * Enable the interrupt ring buffer (VI). 71 * tonga_ih_disable_interrupts - Disable the interrupt ring buffer 75 * Disable the interrupt ring buffer (VI). 92 * tonga_ih_irq_init - init and enable the interrupt ring 96 * Allocate a ring buffer for the interrupt controller, 98 * ring buffe [all...] |
H A D | umsch_mm_v4_0.c | 49 struct amdgpu_device *adev = umsch->ring.adev; 181 struct amdgpu_device *adev = umsch->ring.adev; 211 struct amdgpu_ring *ring = &umsch->ring; local 212 struct amdgpu_device *adev = ring->adev; 216 data = REG_SET_FIELD(data, VCN_UMSCH_RB_DB_CTRL, OFFSET, ring->doorbell_index); 220 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, 223 WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_BASE_LO, lower_32_bits(ring->gpu_addr)); 224 WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); 226 WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_SIZE, ring 241 struct amdgpu_ring *ring = &umsch->ring; local [all...] |
H A D | uvd_v3_1.c | 40 * @ring: amdgpu_ring pointer 44 static uint64_t uvd_v3_1_ring_get_rptr(struct amdgpu_ring *ring) argument 46 struct amdgpu_device *adev = ring->adev; 54 * @ring: amdgpu_ring pointer 58 static uint64_t uvd_v3_1_ring_get_wptr(struct amdgpu_ring *ring) argument 60 struct amdgpu_device *adev = ring->adev; 68 * @ring: amdgpu_ring pointer 72 static void uvd_v3_1_ring_set_wptr(struct amdgpu_ring *ring) argument 74 struct amdgpu_device *adev = ring->adev; 76 WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring 89 uvd_v3_1_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 110 uvd_v3_1_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 139 uvd_v3_1_ring_test_ring(struct amdgpu_ring *ring) argument 167 uvd_v3_1_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 322 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 547 struct amdgpu_ring *ring; local 631 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local [all...] |
H A D | uvd_v4_2.c | 54 * @ring: amdgpu_ring pointer 58 static uint64_t uvd_v4_2_ring_get_rptr(struct amdgpu_ring *ring) argument 60 struct amdgpu_device *adev = ring->adev; 68 * @ring: amdgpu_ring pointer 72 static uint64_t uvd_v4_2_ring_get_wptr(struct amdgpu_ring *ring) argument 74 struct amdgpu_device *adev = ring->adev; 82 * @ring: amdgpu_ring pointer 86 static void uvd_v4_2_ring_set_wptr(struct amdgpu_ring *ring) argument 88 struct amdgpu_device *adev = ring->adev; 90 WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring 106 struct amdgpu_ring *ring; local 157 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 285 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 477 uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 506 uvd_v4_2_ring_test_ring(struct amdgpu_ring *ring) argument 544 uvd_v4_2_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 555 uvd_v4_2_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument [all...] |
H A D | uvd_v5_0.c | 52 * @ring: amdgpu_ring pointer 56 static uint64_t uvd_v5_0_ring_get_rptr(struct amdgpu_ring *ring) argument 58 struct amdgpu_device *adev = ring->adev; 66 * @ring: amdgpu_ring pointer 70 static uint64_t uvd_v5_0_ring_get_wptr(struct amdgpu_ring *ring) argument 72 struct amdgpu_device *adev = ring->adev; 80 * @ring: amdgpu_ring pointer 84 static void uvd_v5_0_ring_set_wptr(struct amdgpu_ring *ring) argument 86 struct amdgpu_device *adev = ring->adev; 88 WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring 104 struct amdgpu_ring *ring; local 153 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 322 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 493 uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 522 uvd_v5_0_ring_test_ring(struct amdgpu_ring *ring) argument 559 uvd_v5_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 572 uvd_v5_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument [all...] |
H A D | uvd_v6_0.c | 73 * @ring: amdgpu_ring pointer 77 static uint64_t uvd_v6_0_ring_get_rptr(struct amdgpu_ring *ring) argument 79 struct amdgpu_device *adev = ring->adev; 87 * @ring: amdgpu_ring pointer 91 static uint64_t uvd_v6_0_enc_ring_get_rptr(struct amdgpu_ring *ring) argument 93 struct amdgpu_device *adev = ring->adev; 95 if (ring == &adev->uvd.inst->ring_enc[0]) 103 * @ring: amdgpu_ring pointer 107 static uint64_t uvd_v6_0_ring_get_wptr(struct amdgpu_ring *ring) argument 109 struct amdgpu_device *adev = ring 121 uvd_v6_0_enc_ring_get_wptr(struct amdgpu_ring *ring) argument 138 uvd_v6_0_ring_set_wptr(struct amdgpu_ring *ring) argument 152 uvd_v6_0_enc_ring_set_wptr(struct amdgpu_ring *ring) argument 170 uvd_v6_0_enc_ring_test_ring(struct amdgpu_ring *ring) argument 208 uvd_v6_0_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, struct amdgpu_bo *bo, struct dma_fence **fence) argument 271 uvd_v6_0_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, struct amdgpu_bo *bo, struct dma_fence **fence) argument 332 uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 380 struct amdgpu_ring *ring; local 465 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 727 struct amdgpu_ring *ring = &adev->uvd.inst->ring; local 924 uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 956 uvd_v6_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 973 uvd_v6_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 985 uvd_v6_0_ring_test_ring(struct amdgpu_ring *ring) argument 1023 uvd_v6_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 1051 uvd_v6_0_enc_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 1065 uvd_v6_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1076 uvd_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1091 uvd_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1108 uvd_v6_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 1120 uvd_v6_0_enc_ring_emit_pipeline_sync(struct amdgpu_ring *ring) argument 1131 uvd_v6_0_enc_ring_insert_end(struct amdgpu_ring *ring) argument 1136 uvd_v6_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument [all...] |
H A D | uvd_v7_0.c | 67 * @ring: amdgpu_ring pointer 71 static uint64_t uvd_v7_0_ring_get_rptr(struct amdgpu_ring *ring) argument 73 struct amdgpu_device *adev = ring->adev; 75 return RREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_RPTR); 81 * @ring: amdgpu_ring pointer 85 static uint64_t uvd_v7_0_enc_ring_get_rptr(struct amdgpu_ring *ring) argument 87 struct amdgpu_device *adev = ring->adev; 89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) 90 return RREG32_SOC15(UVD, ring 102 uvd_v7_0_ring_get_wptr(struct amdgpu_ring *ring) argument 116 uvd_v7_0_enc_ring_get_wptr(struct amdgpu_ring *ring) argument 136 uvd_v7_0_ring_set_wptr(struct amdgpu_ring *ring) argument 150 uvd_v7_0_enc_ring_set_wptr(struct amdgpu_ring *ring) argument 175 uvd_v7_0_enc_ring_test_ring(struct amdgpu_ring *ring) argument 216 uvd_v7_0_enc_get_create_msg(struct amdgpu_ring *ring, u32 handle, struct amdgpu_bo *bo, struct dma_fence **fence) argument 279 uvd_v7_0_enc_get_destroy_msg(struct amdgpu_ring *ring, u32 handle, struct amdgpu_bo *bo, struct dma_fence **fence) argument 339 uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) argument 400 struct amdgpu_ring *ring; local 520 struct amdgpu_ring *ring; local 789 struct amdgpu_ring *ring; local 955 struct amdgpu_ring *ring; local 1180 uvd_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 1221 uvd_v7_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) argument 1239 uvd_v7_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) argument 1251 uvd_v7_0_ring_test_ring(struct amdgpu_ring *ring) argument 1292 struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched); local 1320 uvd_v7_0_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 1353 uvd_v7_0_enc_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, struct amdgpu_ib *ib, uint32_t flags) argument 1367 uvd_v7_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument 1383 uvd_v7_0_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1402 uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned vmid, uint64_t pd_addr) argument 1417 uvd_v7_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) argument 1430 uvd_v7_0_enc_ring_insert_end(struct amdgpu_ring *ring) argument 1435 uvd_v7_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, uint32_t val, uint32_t mask) argument 1445 uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring, unsigned int vmid, uint64_t pd_addr) argument 1458 uvd_v7_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val) argument [all...] |