#
4e8303cf |
|
11-Sep-2023 |
Lijo Lazar <lijo.lazar@amd.com> |
drm/amdgpu: Use function for IP version check Use an inline function for version check. Gives more flexibility to handle any format changes. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
b3122c92 |
|
17-May-2023 |
Jesse Zhang <jesse.zhang@amd.com> |
drm/amdgpu: don't enable secure display on incompatible platforms [why] [drm] psp gfx command LOAD_TA(0x1) failed and response status is (0x7) [drm] psp gfx command INVOKE_CMD(0x3) failed and response status is (0x4) amdgpu 0000:04:00.0: amdgpu: Secure display: Generic Failure. [how] don't enable secure display on incompatible platforms Suggested-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Jesse zhang <jesse.zhang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
7fc602db |
|
17-May-2023 |
Jesse Zhang <jesse.zhang@amd.com> |
drm/amdgpu: don't enable secure display on incompatible platforms [why] [drm] psp gfx command LOAD_TA(0x1) failed and response status is (0x7) [drm] psp gfx command INVOKE_CMD(0x3) failed and response status is (0x4) amdgpu 0000:04:00.0: amdgpu: Secure display: Generic Failure. [how] don't enable secure display on incompatible platforms Suggested-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Jesse zhang <jesse.zhang@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
|
#
2d39c7ae |
|
03-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Load PSP microcode during early_init Simplifies the code so that all PSP versions will get the firmware name from `amdgpu_ucode_ip_version_decode` and then use this filename to load microcode as part of the early_init process. Any failures will cause the driver to fail to probe before the firmware framebuffer has been removed. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
994a9744 |
|
03-Jan-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Parse both v1 and v2 TA microcode headers using same function Several IP versions duplicate code and can't use the common helpers. Move this code into a single function so that the helpers can be used. v2: squash in fix from Mario to remove duplicate ta parsing Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
aec3bb3a |
|
16-Nov-2022 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: make psp_ring_init common All of the IP specific versions are the same now, so we can just use a common function. Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4320e6f8 |
|
21-Oct-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Update TA version output in driver TA version should only be displayed in firmware version column. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
de3a1e33 |
|
08-Sep-2021 |
Candice Li <candice.li@amd.com> |
drm/amdgpu: Unify PSP TA context Remove all TA binary structures and add the specific binary structure in struct ta_context. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6457205c |
|
12-Aug-2021 |
Candice Li <candice.li@amd.com> |
drm/amd/amdgpu: consolidate PSP TA context Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ecaafb7b |
|
08-Dec-2020 |
Jinzhou Su <Jinzhou.Su@amd.com> |
drm/amdgpu: Add secure display TA interface Add interface to load, unload, invoke command for secure display TA. v2: Add debugfs interface for secure display TA v3: fix warning in copy_from_user (Alex) Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
54f78a76 |
|
15-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add apu flags (v2) Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f4503f9e |
|
20-Apr-2020 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: switch to helper function to init asd ucode call common helper function to initialize asd ucode Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
bc9fb7e9 |
|
20-Apr-2020 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: retire unused check_fw_loading status The driver can't access UCODE_DATA/ADDR registers on production boards. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5bdd0b72 |
|
18-Nov-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: switch to common helper func for psp cmd submission Drop all the IP specific cmd_submit callback function and use the common helper instead Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
13a390a6 |
|
18-Nov-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add psp funcs for ring write pointer read/write The ring write pointer regsiter update is the only part that is IP specific ones in psp_cmd_submit function. Add two callbacks for wptr read/write so that we unify the psp_cmd_submit function for all the ASICs. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: John Clements <john.clements@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3a8b7d27 |
|
14-Oct-2019 |
chen gong <curry.gong@amd.com> |
drm/amdgpu/psp: declare PSP TA firmware Add PSP TA firmware declaration for raven raven2 picasso Signed-off-by: chen gong <curry.gong@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e8186eec |
|
17-Sep-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/psp: flush HDP write fifo after submitting cmds to the psp We need to make sure the fifo is flushed before we ask the psp to process the commands. Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
143f2305 |
|
19-Jun-2019 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amdgpu: psp DTM init DTM is the display topology manager. This is needed to communicate with psp about the display configurations. This patch adds -Loading the firmware -The functions and definitions for communication with the firmware v2: Fix formatting Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ed19a9a2 |
|
19-Jun-2019 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amdgpu: psp HDCP init This patch adds -Loading the firmware -The functions and definitions for communication with the firmware v2: Fix formatting Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
50e275e8 |
|
16-Aug-2019 |
Xiaojie Yuan <xiaojie.yuan@amd.com> |
drm/amdgpu: remove redundant argument for psp_funcs::cmd_submit callback Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f867723b |
|
09-Jun-2019 |
Sam Ravnborg <sam@ravnborg.org> |
drm/amd: drop use of drmP.h in amdgpu.h Delete the unused drmP.h from amdgpu.h. Fix fallout in various files. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-5-sam@ravnborg.org
|
#
be4630d9 |
|
03-Jan-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfaces get_fw_type and prep_cmd_buf should be common interface instead of IP specific ones Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
0db2a8cd |
|
02-Jan-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL was renamed to GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL in latest psp_gfx_if drop Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
900cc363 |
|
15-Nov-2018 |
YueHaibing <yuehaibing@huawei.com> |
drm/amdgpu: remove set but not used variable 'ring' Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/psp_v10_0.c: In function 'psp_v10_0_ring_stop': drivers/gpu/drm/amd/amdgpu/psp_v10_0.c:230:19: warning: variable 'ring' set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/psp_v3_1.c: In function 'psp_v3_1_ring_stop': drivers/gpu/drm/amd/amdgpu/psp_v3_1.c:359:19: warning: variable ‘ring’ set but not used [-Wunused-but-set-variable] It not used since commit 4ef72453311a ("drm/amdgpu: added api for stopping psp ring (v2)") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
741deade |
|
13-Sep-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: simplify Raven, Raven2, and Picasso handling Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e11fa1b6 |
|
05-Jun-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: add psp support for raven2 Modified for using raven2_asd.bin to replace raven_asd.bin for raven2 Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
227f3dc5 |
|
10-Jul-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu: initilize picasso psp firmwares support Same as raven for now. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6b7eab2c |
|
11-Sep-2018 |
David Francis <David.Francis@amd.com> |
drm/amd: Add PSP DMCU support DMCU (Display Microcontroller Unit) is a GPU chip involved in eDP features like Adaptive Backlight Modulation and Panel Self Refresh. PSP is already equipped to handle DMCU firmware loading, all that is needed is to translate between the new DMCU ucode ID and the equivalent psp_gfx_fw_type. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
235ac9de |
|
09-Aug-2018 |
Likun Gao <Likun.Gao@amd.com> |
drm/amdgpu:add VCN support in PSP driver Add VCN support in PSP driver Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
|
#
621a6318 |
|
22-Jan-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add save restore list cntl gpm and srm firmware support RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff function. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e7f9ccb4 |
|
23-Jan-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/psp: use a function pointer structure This way we can make all of the IP specific functions static, and we only need a single entry point into the PSP IP modules. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4fd09a19 |
|
29-Nov-2017 |
Shaoyun Liu <Shaoyun.Liu@amd.com> |
drm/admgpu: Reduce the usage of soc15ip.h Remove the header where it's not used. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cd29253f |
|
29-Nov-2017 |
Shaoyun Liu <Shaoyun.Liu@amd.com> |
drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a146391b |
|
27-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup raven1 mp header files. Cleanup asic_reg/raven1/MP folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
5a18155d |
|
27-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup raven1 gc header files. Cleanup asic_reg/raven1/GC folder. Remove unused files: gc_9_1_default.h gc_9_1_sh_mask.h Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
02cf8837 |
|
27-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup raven1 sdma header files. Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
fb960bd2 |
|
23-Nov-2017 |
Feifei Xu <Feifei.Xu@amd.com> |
drm/amd/include:cleanup vega10 header files. Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4694257e |
|
16-Oct-2017 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu/psp: prevent page fault by checking write_frame address(v4) - Prevent a possible buffer overflow when updating the ring buffer by bounds checking the command frame against the available space in the ring buffer. v2: update the ring_buffer_end address v3: update the commit log v4: squash in print fix (Michel) Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
98512bb8 |
|
14-Sep-2017 |
Ken Wang <Ken.Wang@amd.com> |
drm/amdgpu: Add GPU reset functionality for Vega10 V2 Signed-off-by: Ken Wang <Ken.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
cf661ec1 |
|
15-Sep-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/psp: declare raven psp firmware So it gets picked up properly by the kernel. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
4ef72453 |
|
07-Sep-2017 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: added api for stopping psp ring (v2) - v2: reuse the ring stop api in ring destory Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f1ac0fc2 |
|
04-Sep-2017 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: fixed raven psp cmd prepare and submit - fw_size in psp_v10_0_prep_cmd_buf is wrongly set as 0 - fixed the wrong calculation of psp_write_ptr_reg in psp_v10_0_cmd_submit Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
a4f478bc |
|
14-Jul-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: add ring_destroy for psp v10 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
ccce0552 |
|
14-Jul-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: add ring_create function for psp v10 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6ab77113 |
|
14-Jul-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: add init microcode function for psp v10 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f04f5691 |
|
14-Jul-2017 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amdgpu: remove unncessary code in psp v10 ring init func Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
f03defe0 |
|
22-Jun-2017 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup Rather than casting and shifting. Fixes sparse cast warnings. Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c5c1effd |
|
12-Jun-2017 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
|
#
fd341dc5 |
|
04-May-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add psp v10 function callback for raven PSP is the security processor. These are the support functions. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|