Searched refs:ch (Results 151 - 175 of 1047) sorted by relevance

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/linux-master/drivers/staging/vt6655/
H A Dchannel.c76 * @ch: Channel to be set
81 bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) argument
85 if (priv->current_ch == ch->hw_value)
103 priv->current_ch = ch->hw_value;
105 ch->hw_value);
109 rf_write_wake_prog_syn(priv, priv->rf_type, ch->hw_value);
/linux-master/arch/x86/boot/
H A Dvideo.c33 if (oreg.ch & 0x20)
36 if ((oreg.ch & 0x1f) > (oreg.cl & 0x1f))
141 char ch; local
160 ch = '0';
178 ch, mode_id, mi->x, resbuf, card->card_name);
185 if (ch == '9')
186 ch = 'a';
187 else if (ch == 'z' || ch == ' ')
188 ch
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/linux-master/drivers/accessibility/speakup/
H A Dserialio.c29 static int spk_serial_out(struct spk_synth *in_synth, const char ch);
30 static void spk_serial_send_xchar(struct spk_synth *in_synth, char ch);
153 static void spk_serial_send_xchar(struct spk_synth *synth, char ch) argument
162 outb(ch, speakup_info.port_tts);
283 static int spk_serial_out(struct spk_synth *in_synth, const char ch) argument
286 outb_p(ch, speakup_info.port_tts);
295 u_char ch; local
297 while ((ch = *buff)) {
298 if (ch == '\n')
299 ch
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H A Dspeakup_decext.c26 static void read_buff_add(u_char ch) argument
28 last_char = ch;
155 u_char ch; local
185 ch = synth_buffer_peek();
189 if (ch == '\n')
190 ch = 0x0D;
191 if (synth_full() || !synth->io_ops->synth_out(synth, ch)) {
199 if (ch == '[') {
201 } else if (ch == ']') {
203 } else if (ch <
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H A Dspeakup_dectlk.c162 static int is_indnum(u_char *ch) argument
164 if ((*ch >= '0') && (*ch <= '9')) {
165 *ch = *ch - '0';
212 static u_char ch; local
260 ch = synth_buffer_peek();
265 if (ch == '\n')
266 ch = 0x0D;
267 if (synth_full_val || !synth->io_ops->synth_out(synth, ch)) {
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/linux-master/sound/mips/
H A Dsgio2audio.c344 unsigned int ch, unsigned int count)
354 struct snd_pcm_runtime *runtime = chip->channel[ch].substream->runtime;
356 spin_lock_irqsave(&chip->channel[ch].lock, flags);
358 src_base = (unsigned long) chip->ring_base | (ch << CHANNEL_RING_SHIFT);
359 src_pos = readq(&mace->perif.audio.chan[ch].read_ptr);
361 dst_pos = chip->channel[ch].pos;
365 chip->channel[ch].size += (count >> 3); /* in frames */
366 ret = chip->channel[ch].size >= runtime->period_size;
367 chip->channel[ch].size %= runtime->period_size;
382 writeq(src_pos, &mace->perif.audio.chan[ch]
343 snd_sgio2audio_dma_pull_frag(struct snd_sgio2audio *chip, unsigned int ch, unsigned int count) argument
391 snd_sgio2audio_dma_push_frag(struct snd_sgio2audio *chip, unsigned int ch, unsigned int count) argument
443 int ch = chan->idx; local
473 int count, ch; local
493 int count, ch; local
585 int ch = chan->idx; local
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/linux-master/net/sctp/
H A Dinqueue.c95 struct sctp_chunkhdr *ch = NULL; local
104 ch = (struct sctp_chunkhdr *)chunk->chunk_end;
106 return ch;
118 struct sctp_chunkhdr *ch = NULL; local
145 ch = (struct sctp_chunkhdr *)chunk->chunk_end;
189 ch = (struct sctp_chunkhdr *)chunk->skb->data;
206 chunk->chunk_hdr = ch;
207 chunk->chunk_end = ((__u8 *)ch) + SCTP_PAD4(ntohs(ch->length));
208 skb_pull(chunk->skb, sizeof(*ch));
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/linux-master/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dhv_vhca_stats.c17 mlx5e_hv_vhca_fill_ring_stats(struct mlx5e_priv *priv, int ch, argument
23 stats = priv->channel_stats[ch];
36 int ch, i = 0; local
38 for (ch = 0; ch < priv->stats_nch; ch++) {
46 mlx5e_hv_vhca_fill_ring_stats(priv, ch, buf);
/linux-master/drivers/hwmon/
H A Dmax6639.c28 #define MAX6639_REG_TEMP(ch) (0x00 + (ch))
32 #define MAX6639_REG_TEMP_EXT(ch) (0x05 + (ch))
33 #define MAX6639_REG_ALERT_LIMIT(ch) (0x08 + (ch))
34 #define MAX6639_REG_OT_LIMIT(ch) (0x0A + (ch))
35 #define MAX6639_REG_THERM_LIMIT(ch) (0x0C + (ch))
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/linux-master/drivers/net/ethernet/ti/icssg/
H A Dicssg_ethtool.c133 struct ethtool_channels *ch)
143 emac->tx_ch_num = ch->tx_count;
149 struct ethtool_channels *ch)
153 ch->max_rx = 1;
154 ch->max_tx = PRUETH_MAX_TX_QUEUES;
155 ch->rx_count = 1;
156 ch->tx_count = emac->tx_ch_num;
132 emac_set_channels(struct net_device *ndev, struct ethtool_channels *ch) argument
148 emac_get_channels(struct net_device *ndev, struct ethtool_channels *ch) argument
/linux-master/drivers/dma/dw-edma/
H A Ddw-edma-v0-debugfs.c28 __ch_regs = REGS_ADDR(dw, type.legacy.ch); \
30 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
32 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].wr); \
40 #define CTX_REGISTER(dw, name, dir, ch) \
41 { dw, #name, REGS_CH_ADDR(dw, name, dir, ch), dir, ch }
68 u16 ch; member in struct:dw_edma_debugfs_entry
78 reg >= REGS_ADDR(dw, type.legacy.ch)) {
83 viewport_sel |= FIELD_PREP(EDMA_V0_VIEWPORT_MASK, entry->ch);
120 u16 ch, struc
119 dw_edma_debugfs_regs_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, struct dentry *dent) argument
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/linux-master/drivers/dma/
H A Damba-pl08x.c369 static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch) argument
374 if (ch->reg_busy) {
375 val = readl(ch->reg_busy);
376 return !!(val & BIT(ch->id));
378 val = readl(ch->reg_config);
582 static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) argument
587 if (ch->ftdmac020) {
589 val = readl(ch->reg_control);
591 writel(val, ch->reg_control);
596 val = readl(ch
610 pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) argument
634 pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x, struct pl08x_phy_chan *ch) argument
671 get_bytes_in_phy_channel(struct pl08x_phy_chan *ch) argument
711 get_bytes_in_lli(struct pl08x_phy_chan *ch, const u32 *llis_va) argument
757 struct pl08x_phy_chan *ch; local
821 struct pl08x_phy_chan *ch = NULL; local
848 pl08x_put_phy_channel(struct pl08x_driver_data *pl08x, struct pl08x_phy_chan *ch) argument
862 struct pl08x_phy_chan *ch; local
880 pl08x_phy_reassign_start(struct pl08x_phy_chan *ch, struct pl08x_dma_chan *plchan) argument
2453 struct pl08x_phy_chan *ch; local
2866 struct pl08x_phy_chan *ch = &pl08x->phy_chans[i]; local
[all...]
/linux-master/drivers/isdn/mISDN/
H A Dl1oip_core.c435 queue_ch_frame(&bch->ch, PH_DATA_IND, rx_counter, nskb);
866 handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb) argument
868 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
903 queue_ch_frame(ch, PH_DATA_CNF, hh->id, skb);
911 queue_ch_frame(ch, PH_ACTIVATE_IND, hh->id, skb);
913 queue_ch_frame(ch, PH_DEACTIVATE_IND, hh->id, skb);
922 queue_ch_frame(ch, PH_ACTIVATE_IND, hh->id, skb);
924 queue_ch_frame(ch, PH_DEACTIVATE_IND, hh->id, skb);
998 rq->ch = &dch->dev.D;
1008 int ch; local
1031 l1oip_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg) argument
1086 handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb) argument
1201 l1oip_bctrl(struct mISDNchannel *ch, u_int cmd, void *arg) argument
1235 int ch; local
1291 int i, ch; local
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/linux-master/drivers/net/wireless/ath/wcn36xx/
H A Ddxe.c57 static void wcn36xx_dxe_free_ctl_block(struct wcn36xx_dxe_ch *ch) argument
59 struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl, *next;
62 for (i = 0; i < ch->desc_num && ctl; i++) {
69 static int wcn36xx_dxe_allocate_ctl_block(struct wcn36xx_dxe_ch *ch) argument
75 spin_lock_init(&ch->lock);
76 for (i = 0; i < ch->desc_num; i++) {
83 ch->head_blk_ctl = cur_ctl;
84 ch->tail_blk_ctl = cur_ctl;
85 } else if (ch->desc_num - 1 == i) {
87 cur_ctl->next = ch
236 wcn36xx_dxe_init_tx_bd(struct wcn36xx_dxe_ch *ch, struct wcn36xx_dxe_mem_pool *pool) argument
400 reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch) argument
580 wcn36xx_rx_handle_packets(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch, u32 ctrl, u32 en_mask, u32 int_mask, u32 status_reg) argument
753 struct wcn36xx_dxe_ch *ch = NULL; local
853 _wcn36xx_dxe_tx_channel_is_empty(struct wcn36xx_dxe_ch *ch) argument
[all...]
/linux-master/drivers/reset/
H A Dreset-uniphier.c157 #define UNIPHIER_MIO_RESET_SD(id, ch) \
158 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 0)
160 #define UNIPHIER_MIO_RESET_SD_BRIDGE(id, ch) \
161 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 26)
163 #define UNIPHIER_MIO_RESET_EMMC_HW_RESET(id, ch) \
164 UNIPHIER_RESETX((id), 0x80 + 0x200 * (ch), 0)
166 #define UNIPHIER_MIO_RESET_USB2(id, ch) \
167 UNIPHIER_RESETX((id), 0x114 + 0x200 * (ch), 0)
169 #define UNIPHIER_MIO_RESET_USB2_BRIDGE(id, ch) \
170 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 2
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Dauxgm200.c29 int ch; member in struct:gm200_i2c_aux
36 nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00710000, 0x00000000);
51 ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50));
60 nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00700000, ureq);
63 ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50));
82 const u32 base = aux->ch * 0x50;
100 nvkm_i2c_aux_autodpcd(i2c, aux->ch, false);
162 nvkm_i2c_aux_autodpcd(i2c, aux->ch, true);
185 aux->ch = drive;
186 aux->base.intr = 1 << aux->ch;
[all...]
H A Dauxg94.c29 int ch; member in struct:g94_i2c_aux
36 nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00310000, 0x00000000);
51 ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
60 nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00300000, ureq);
63 ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
82 const u32 base = aux->ch * 0x50;
100 nvkm_i2c_aux_autodpcd(i2c, aux->ch, false);
161 nvkm_i2c_aux_autodpcd(i2c, aux->ch, true);
179 aux->ch = drive;
180 aux->base.intr = 1 << aux->ch;
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/linux-master/drivers/firmware/tegra/
H A Dbpmp-tegra210.c25 #define CH_MASK(ch) (0x3 << ((ch) * 2))
26 #define SL_SIGL(ch) (0x0 << ((ch) * 2))
27 #define SL_QUED(ch) (0x1 << ((ch) * 2))
28 #define MA_FREE(ch) (0x2 << ((ch) * 2))
29 #define MA_ACKD(ch) (0x3 << ((ch) *
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/linux-master/drivers/net/ethernet/freescale/dpaa2/
H A Ddpaa2-eth-debugfs.c97 struct dpaa2_eth_channel *ch; local
106 ch = priv->channel[i];
108 "CH#", i, ch->ch_id,
109 ch->nctx.desired_cpu,
110 ch->stats.dequeue_portal_busy,
111 ch->stats.frames,
112 ch->stats.cdan,
113 div64_u64(ch->stats.frames, ch->stats.cdan),
114 ch
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/linux-master/drivers/gpu/host1x/
H A Ddebug.c52 static int show_channel(struct host1x_channel *ch, void *data, bool show_fifo) argument
54 struct host1x *m = dev_get_drvdata(ch->dev->parent);
62 mutex_lock(&ch->cdma.lock);
66 host1x_hw_show_channel_fifo(m, ch, o);
68 host1x_hw_show_channel_cdma(m, ch, o);
71 mutex_unlock(&ch->cdma.lock);
135 struct host1x_channel *ch = host1x_channel_get_index(m, i); local
137 if (ch) {
138 show_channel(ch, o, show_fifo);
139 host1x_channel_put(ch);
[all...]
/linux-master/fs/ubifs/
H A Dio.c249 const struct ubifs_ch *ch = buf; local
254 magic = le32_to_cpu(ch->magic);
264 type = ch->node_type;
272 node_len = le32_to_cpu(ch->len);
288 node_crc = le32_to_cpu(ch->crc);
335 struct ubifs_ch *ch = buf; local
338 ch->magic = cpu_to_le32(UBIFS_NODE_MAGIC);
339 ch->node_type = UBIFS_PAD_NODE;
340 ch->group_type = UBIFS_NO_NODE_GROUP;
341 ch
380 struct ubifs_ch *ch = node; local
400 struct ubifs_ch *ch = node; local
473 struct ubifs_ch *ch = node; local
1024 struct ubifs_ch *ch = buf; local
1100 struct ubifs_ch *ch = buf; local
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/linux-master/drivers/gpu/drm/hisilicon/kirin/
H A Dkirin_drm_drv.c81 DRM_ERROR("fail to init plane, ch=%d\n", 0);
112 u32 ch; local
132 for (ch = 0; ch < driver_data->num_planes; ch++) {
133 if (ch == driver_data->prim_plane)
137 ret = kirin_drm_plane_init(dev, &kirin_priv->planes[ch].base,
141 kirin_priv->planes[ch].ch = ch;
[all...]
/linux-master/drivers/iio/adc/
H A Dab8500-gpadc.c257 struct ab8500_gpadc_chan_info *ch; local
261 ch = &gpadc->chans[i];
262 if (ch->id == chan)
268 return ch;
274 * @ch: the sampled channel this raw value is coming from
278 enum ab8500_gpadc_channel ch,
283 switch (ch) {
377 ch);
387 const struct ab8500_gpadc_chan_info *ch,
405 if ((gpadc->irq_sw <= 0) && !ch
277 ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, enum ab8500_gpadc_channel ch, int ad_value) argument
386 ab8500_gpadc_read(struct ab8500_gpadc *gpadc, const struct ab8500_gpadc_chan_info *ch, int *ibat) argument
895 const struct ab8500_gpadc_chan_info *ch; local
978 ab8500_gpadc_parse_channel(struct device *dev, struct fwnode_handle *fwnode, struct ab8500_gpadc_chan_info *ch, struct iio_chan_spec *iio_chan) argument
1032 struct ab8500_gpadc_chan_info *ch; local
[all...]
/linux-master/drivers/tty/hvc/
H A Dhvc_dcc.c32 static void dcc_uart_console_putchar(struct uart_port *port, u8 ch) argument
37 __dcc_putchar(ch);
133 unsigned char ch; local
139 while (kfifo_get(&outbuf, &ch))
140 hvc_dcc_put_chars(0, &ch, 1);
144 if (!hvc_dcc_get_chars(0, &ch, 1))
146 kfifo_put(&inbuf, ch);
161 u8 ch; local
170 if (!hvc_dcc_get_chars(0, &ch, 1))
172 kfifo_put(&inbuf, ch);
[all...]
/linux-master/drivers/net/ethernet/ti/
H A Dcpsw_priv.c59 int ch; local
65 ch = xmeta->ch;
70 ch = skb_get_queue_mapping(skb);
78 txq = netdev_get_tx_queue(ndev, ch);
133 int num_tx, cur_budget, ch; local
139 for (ch = 0, num_tx = 0; ch_map & 0xff; ch_map <<= 1, ch++) {
143 txv = &cpsw->txv[ch];
149 num_tx += cpdma_chan_process(txv->ch, cur_budge
183 int num_rx, cur_budget, ch; local
294 int ch; local
1109 int ch, i, ret; local
1167 cpsw_create_rx_pool(struct cpsw_common *cpsw, int ch) argument
1182 cpsw_ndev_create_xdp_rxq(struct cpsw_priv *priv, int ch) argument
1203 cpsw_ndev_destroy_xdp_rxq(struct cpsw_priv *priv, int ch) argument
1216 int i, ch; local
1224 cpsw_ndev_destroy_xdp_rxq(netdev_priv(ndev), ch); local
1235 int i, ch, ret; local
1324 cpsw_run_xdp(struct cpsw_priv *priv, int ch, struct xdp_buff *xdp, struct page *page, int port, int *len) argument
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