/linux-master/drivers/mfd/ |
H A D | lpc_sch.c | 78 static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name, argument 87 pci_read_config_dword(pdev, where, &base_addr_cfg); 107 static int lpc_sch_populate_cell(struct pci_dev *pdev, int where, argument 118 ret = lpc_sch_get_io(pdev, where, name, res, size);
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/linux-master/drivers/misc/mei/ |
H A D | gsc-me.c | 26 static int mei_gsc_read_hfs(const struct mei_device *dev, int where, u32 *val) argument 30 *val = ioread32(hw->mem_addr + where + 0xC00);
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H A D | hw-me.h | 65 int (*read_fws)(const struct mei_device *dev, int where, u32 *val);
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H A D | pci-me.c | 141 static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val) argument 145 return pci_read_config_dword(pdev, where, val);
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/linux-master/drivers/net/ethernet/i825xx/ |
H A D | sun3_82586.c | 137 static int check586(struct net_device *dev,char *where,unsigned size); 209 static int check586(struct net_device *dev,char *where,unsigned size) argument 217 p->memtop = (char *)dvma_btov((unsigned long)where); 227 iscp_addr = (char *)dvma_btov((unsigned long)where);
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/linux-master/drivers/net/wireguard/selftest/ |
H A D | allowedips.c | 155 struct horrible_allowedips_node *other = NULL, *where = NULL; local 168 where = other; 172 if (!other && !where) 175 hlist_add_behind(&node->table, &where->table); 177 hlist_add_before(&node->table, &where->table);
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/linux-master/drivers/nvdimm/ |
H A D | namespace_devs.c | 740 const char *where) 743 dev_dbg(dev, "%s: uuid not set\n", where); 1494 * namespaces happens in nd_pfn_validate() where infoblock 739 uuid_not_set(const uuid_t *uuid, struct device *dev, const char *where) argument
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/linux-master/drivers/parisc/ |
H A D | dino.c | 171 static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where, argument 176 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); 180 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, 189 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3)); 191 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2)); 206 static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where, argument 211 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3); 215 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where, 227 writeb(val, base_addr + DINO_CONFIG_DATA + (where & 3)); 229 writew(val, base_addr + DINO_CONFIG_DATA + (where [all...] |
H A D | lba_pci.c | 988 void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \ 990 WRITE_REG##size(val, where); \
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H A D | sba_iommu.c | 1120 Tells where the dvi bits are located in the address.
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/linux-master/drivers/pci/ |
H A D | access.c | 81 int where, int size, u32 *val) 85 addr = bus->ops->map_bus(bus, devfn, where); 101 int where, int size, u32 val) 105 addr = bus->ops->map_bus(bus, devfn, where); 121 int where, int size, u32 *val) 125 addr = bus->ops->map_bus(bus, devfn, where & ~0x3); 132 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); 139 int where, int size, u32 val) 144 addr = bus->ops->map_bus(bus, devfn, where & ~0x3); 165 PCI_SLOT(devfn), PCI_FUNC(devfn), where); 80 pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 100 pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument 120 pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 138 pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument 546 pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) argument 556 pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) argument 566 pci_read_config_dword(const struct pci_dev *dev, int where, u32 *val) argument 577 pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) argument 585 pci_write_config_word(const struct pci_dev *dev, int where, u16 val) argument 593 pci_write_config_dword(const struct pci_dev *dev, int where, u32 val) argument [all...] |
/linux-master/drivers/pci/controller/cadence/ |
H A D | pci-j721e.c | 266 int where, int size, u32 *value) 269 return pci_generic_config_read32(bus, devfn, where, size, 272 return pci_generic_config_read(bus, devfn, where, size, value); 276 int where, int size, u32 value) 279 return pci_generic_config_write32(bus, devfn, where, size, 282 return pci_generic_config_write(bus, devfn, where, size, value); 265 cdns_ti_pcie_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) argument 275 cdns_ti_pcie_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) argument
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H A D | pcie-cadence-host.c | 29 int where) 46 return pcie->reg_base + (where & 0xfff); 73 return rc->cfg_base + (where & 0xfff); 28 cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pcie-cadence.h | 355 * @ob_addr: base addresses in the AXI bus where the outbound regions start 356 * @irq_phys_addr: base address on the AXI bus where the MSI/INTX IRQ 358 * @irq_cpu_addr: base address in the CPU space where a write access triggers 526 int where); 534 int where) 533 cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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/linux-master/drivers/pci/controller/dwc/ |
H A D | pci-exynos.c | 216 int where, int size, u32 *val) 223 *val = dw_pcie_read_dbi(pci, where, size); 228 int where, int size, u32 val) 235 dw_pcie_write_dbi(pci, where, size, val); 215 exynos_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 227 exynos_pcie_wr_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A D | pci-keystone.c | 426 unsigned int devfn, int where) 439 return pp->va_cfg0_base + where; 425 ks_pcie_other_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pci-meson.c | 308 int where, int size, u32 *val) 312 ret = pci_generic_config_read(bus, devfn, where, size, val); 321 if ((where & ~3) == PCI_CLASS_REVISION) { 323 *val = (*val & ((1 << (size * 8)) - 1)) << (8 * (where & 3)); 327 *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); 307 meson_pcie_rd_own_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) argument
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H A D | pcie-al.c | 23 int where) 37 return dbi_base + where; 40 return pci_ecam_map_bus(bus, devfn, where); 218 unsigned int devfn, int where) 236 return pp->va_cfg0_base + PCIE_ECAM_OFFSET(busnr_ecam, devfn, where); 22 al_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument 217 al_pcie_conf_addr_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pcie-designware-host.c | 553 unsigned int devfn, int where) 584 return pp->va_cfg0_base + where; 588 int where, int size, u32 *val) 594 ret = pci_generic_config_read(bus, devfn, where, size, val); 610 int where, int size, u32 val) 616 ret = pci_generic_config_write(bus, devfn, where, size, val); 637 void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument 645 return pci->dbi_base + where; 552 dw_pcie_other_conf_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument 587 dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 609 dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A D | pcie-designware.h | 637 int where); 664 int where) 662 dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pcie-hisi.c | 25 static int hisi_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, argument 36 return pci_generic_config_read32(bus, devfn, where, 40 return pci_generic_config_read(bus, devfn, where, size, val); 44 int where, int size, u32 val) 54 return pci_generic_config_write32(bus, devfn, where, 58 return pci_generic_config_write(bus, devfn, where, size, val); 62 int where) 68 return pcie->reg_base + where; 70 return pci_ecam_map_bus(bus, devfn, where); 43 hisi_pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) argument 61 hisi_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pcie-histb.c | 126 int where, int size, u32 *val) 133 *val = dw_pcie_read_dbi(pci, where, size); 138 int where, int size, u32 val) 145 dw_pcie_write_dbi(pci, where, size, val); 125 histb_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 137 histb_pcie_wr_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A D | pcie-kirin.c | 522 int where, int size, u32 *val) 529 *val = dw_pcie_read_dbi(pci, where, size); 534 int where, int size, u32 val) 541 dw_pcie_write_dbi(pci, where, size, val); 521 kirin_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) argument 533 kirin_pcie_wr_own_conf(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) argument
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H A D | pcie-tegra194-acpi.c | 67 unsigned int devfn, int where) 79 return pcie_ecam->dbi_base + where; 99 return pcie_ecam->config_base + where; 66 tegra194_map_bus(struct pci_bus *bus, unsigned int devfn, int where) argument
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H A D | pcie-tegra194.c | 573 static int tegra_pcie_dw_rd_own_conf(struct pci_bus *bus, u32 devfn, int where, argument 587 !PCI_SLOT(devfn) && where == PORT_LOGIC_MSIX_DOORBELL) { 592 return pci_generic_config_read(bus, devfn, where, size, val); 595 static int tegra_pcie_dw_wr_own_conf(struct pci_bus *bus, u32 devfn, int where, argument 609 !PCI_SLOT(devfn) && where == PORT_LOGIC_MSIX_DOORBELL) 612 return pci_generic_config_write(bus, devfn, where, size, val); 1587 * controller doesn't handle interrupts. But in cases where
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