Searched refs:val (Results 126 - 150 of 10961) sorted by relevance

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/linux-master/arch/x86/include/asm/
H A Dqspinlock.h16 u32 val; local
23 val = GEN_BINARY_RMWcc(LOCK_PREFIX "btsl", lock->val.counter, c,
25 val |= atomic_read(&lock->val) & ~_Q_PENDING_MASK;
27 return val;
31 extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
33 extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
49 static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) argument
51 pv_queued_spin_lock_slowpath(lock, val);
[all...]
/linux-master/arch/powerpc/mm/ptdump/
H A D8xx.c16 .val = _PAGE_HUGE,
19 .val = _PAGE_SPS,
25 .val = 0,
29 .val = _PAGE_RO,
33 .val = _PAGE_NA,
37 .val = _PAGE_EXEC,
42 .val = _PAGE_PRESENT,
47 .val = _PAGE_GUARDED,
52 .val = _PAGE_DIRTY,
57 .val
[all...]
/linux-master/tools/virtio/linux/
H A Dvirtio_config.h71 static inline u16 virtio16_to_cpu(struct virtio_device *vdev, __virtio16 val) argument
73 return __virtio16_to_cpu(virtio_is_little_endian(vdev), val);
76 static inline __virtio16 cpu_to_virtio16(struct virtio_device *vdev, u16 val) argument
78 return __cpu_to_virtio16(virtio_is_little_endian(vdev), val);
81 static inline u32 virtio32_to_cpu(struct virtio_device *vdev, __virtio32 val) argument
83 return __virtio32_to_cpu(virtio_is_little_endian(vdev), val);
86 static inline __virtio32 cpu_to_virtio32(struct virtio_device *vdev, u32 val) argument
88 return __cpu_to_virtio32(virtio_is_little_endian(vdev), val);
91 static inline u64 virtio64_to_cpu(struct virtio_device *vdev, __virtio64 val) argument
93 return __virtio64_to_cpu(virtio_is_little_endian(vdev), val);
96 cpu_to_virtio64(struct virtio_device *vdev, u64 val) argument
[all...]
/linux-master/tools/include/linux/
H A Dfind.h37 unsigned long val; local
42 val = *addr & GENMASK(size - 1, offset);
43 return val ? __ffs(val) : size;
67 unsigned long val; local
72 val = *addr1 & *addr2 & GENMASK(size - 1, offset);
73 return val ? __ffs(val) : size;
95 unsigned long val; local
100 val
121 unsigned long val = *addr & GENMASK(size - 1, 0); local
146 unsigned long val = *addr1 & *addr2 & GENMASK(size - 1, 0); local
168 unsigned long val = *addr | ~GENMASK(size - 1, 0); local
[all...]
/linux-master/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_core.c50 static void pdacf_ak4117_write(void *private_data, unsigned char reg, unsigned char val) argument
66 outw((u16)reg << 8 | val | (1<<13), chip->port + PDAUDIOCF_REG_AK_IFR);
93 u16 val; local
95 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
96 val |= PDAUDIOCF_PDN;
97 val &= ~PDAUDIOCF_RECORD; /* for sure */
98 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
100 val |= PDAUDIOCF_RST;
101 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
103 val
160 u16 val; local
177 u16 val; local
232 u16 val; local
249 u16 val; local
[all...]
/linux-master/drivers/media/platform/qcom/camss/
H A Dcamss-csid-gen2.c339 u32 val; local
370 val = vc << TPG_VC_CFG0_VC_NUM;
371 val |= INTELEAVING_MODE_ONE_SHOT << TPG_VC_CFG0_LINE_INTERLEAVING_MODE;
372 val |= 0 << TPG_VC_CFG0_NUM_FRAMES;
373 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG0);
375 val = 0x740 << TPG_VC_CFG1_H_BLANKING_COUNT;
376 val |= 0x3ff << TPG_VC_CFG1_V_BLANKING_COUNT;
377 writel_relaxed(val, csid->base + CSID_TPG_VC_CFG1);
381 val = (input_format->height & 0x1fff) << TPG_DT_n_CFG_0_FRAME_HEIGHT;
382 val |
481 csid_configure_testgen_pattern(struct csid_device *csid, s32 val) argument
522 u32 val; local
558 u32 val; local
[all...]
/linux-master/drivers/gpu/drm/msm/adreno/
H A Da5xx.xml.h1050 static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) argument
1052 return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK;
1056 static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) argument
1058 return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK;
1956 static inline uint32_t A5XX_VSC_BIN_SIZE_WIDTH(uint32_t val) argument
1958 assert(!(val & 0x1f));
1959 return (((val >> 5)) << A5XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A5XX_VSC_BIN_SIZE_WIDTH__MASK;
1963 static inline uint32_t A5XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) argument
1965 assert(!(val & 0x1f));
1966 return (((val >>
1982 A5XX_VSC_PIPE_CONFIG_REG_X(uint32_t val) argument
1988 A5XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val) argument
1994 A5XX_VSC_PIPE_CONFIG_REG_W(uint32_t val) argument
2000 A5XX_VSC_PIPE_CONFIG_REG_H(uint32_t val) argument
2023 A5XX_VSC_RESOLVE_CNTL_X(uint32_t val) argument
2029 A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val) argument
2663 A5XX_GRAS_VS_CL_CNTL_CLIP_MASK(uint32_t val) argument
2669 A5XX_GRAS_VS_CL_CNTL_CULL_MASK(uint32_t val) argument
2685 A5XX_GRAS_CNTL_COORD_MASK(uint32_t val) argument
2693 A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val) argument
2699 A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val) argument
2707 A5XX_GRAS_CL_VPORT_XOFFSET_0(float val) argument
2715 A5XX_GRAS_CL_VPORT_XSCALE_0(float val) argument
2723 A5XX_GRAS_CL_VPORT_YOFFSET_0(float val) argument
2731 A5XX_GRAS_CL_VPORT_YSCALE_0(float val) argument
2739 A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val) argument
2747 A5XX_GRAS_CL_VPORT_ZSCALE_0(float val) argument
2758 A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val) argument
2765 A5XX_GRAS_SU_CNTL_LINE_MODE(enum a5xx_line_mode val) argument
2773 A5XX_GRAS_SU_POINT_MINMAX_MIN(float val) argument
2779 A5XX_GRAS_SU_POINT_MINMAX_MAX(float val) argument
2787 A5XX_GRAS_SU_POINT_SIZE(float val) argument
2801 A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val) argument
2809 A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) argument
2817 A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val) argument
2825 A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) argument
2841 A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
2849 A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
2861 A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val) argument
2867 A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val) argument
2876 A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val) argument
2882 A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val) argument
2891 A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val) argument
2897 A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val) argument
2906 A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val) argument
2912 A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val) argument
2921 A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) argument
2927 A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) argument
2936 A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) argument
2942 A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) argument
2959 A5XX_GRAS_LRZ_BUFFER_PITCH(uint32_t val) argument
2972 A5XX_RB_CNTL_WIDTH(uint32_t val) argument
2979 A5XX_RB_CNTL_HEIGHT(uint32_t val) argument
2994 A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val) argument
3000 A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val) argument
3008 A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
3016 A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
3031 A5XX_RB_RENDER_CONTROL0_COORD_MASK(uint32_t val) argument
3044 A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val) argument
3053 A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val) argument
3059 A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val) argument
3065 A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val) argument
3071 A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val) argument
3077 A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val) argument
3083 A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val) argument
3089 A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val) argument
3095 A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val) argument
3108 A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) argument
3114 A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) argument
3122 A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) argument
3128 A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) argument
3134 A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) argument
3140 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) argument
3146 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) argument
3152 A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) argument
3160 A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) argument
3166 A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val) argument
3172 A5XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val) argument
3178 A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
3187 A5XX_RB_MRT_PITCH(uint32_t val) argument
3196 A5XX_RB_MRT_ARRAY_PITCH(uint32_t val) argument
3209 A5XX_RB_BLEND_RED_UINT(uint32_t val) argument
3215 A5XX_RB_BLEND_RED_SINT(uint32_t val) argument
3221 A5XX_RB_BLEND_RED_FLOAT(float val) argument
3229 A5XX_RB_BLEND_RED_F32(float val) argument
3237 A5XX_RB_BLEND_GREEN_UINT(uint32_t val) argument
3243 A5XX_RB_BLEND_GREEN_SINT(uint32_t val) argument
3249 A5XX_RB_BLEND_GREEN_FLOAT(float val) argument
3257 A5XX_RB_BLEND_GREEN_F32(float val) argument
3265 A5XX_RB_BLEND_BLUE_UINT(uint32_t val) argument
3271 A5XX_RB_BLEND_BLUE_SINT(uint32_t val) argument
3277 A5XX_RB_BLEND_BLUE_FLOAT(float val) argument
3285 A5XX_RB_BLEND_BLUE_F32(float val) argument
3293 A5XX_RB_BLEND_ALPHA_UINT(uint32_t val) argument
3299 A5XX_RB_BLEND_ALPHA_SINT(uint32_t val) argument
3305 A5XX_RB_BLEND_ALPHA_FLOAT(float val) argument
3313 A5XX_RB_BLEND_ALPHA_F32(float val) argument
3321 A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val) argument
3328 A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) argument
3336 A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val) argument
3344 A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val) argument
3358 A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val) argument
3367 A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val) argument
3379 A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val) argument
3388 A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val) argument
3400 A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) argument
3406 A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) argument
3412 A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) argument
3418 A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) argument
3424 A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) argument
3430 A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) argument
3436 A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) argument
3442 A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) argument
3457 A5XX_RB_STENCIL_PITCH(uint32_t val) argument
3466 A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val) argument
3475 A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) argument
3481 A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) argument
3487 A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) argument
3495 A5XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val) argument
3501 A5XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val) argument
3507 A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val) argument
3516 A5XX_RB_WINDOW_OFFSET_X(uint32_t val) argument
3522 A5XX_RB_WINDOW_OFFSET_Y(uint32_t val) argument
3533 A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val) argument
3542 A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val) argument
3548 A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val) argument
3557 A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val) argument
3563 A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val) argument
3578 A5XX_RB_BLIT_DST_PITCH(uint32_t val) argument
3587 A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val) argument
3606 A5XX_RB_CLEAR_CNTL_MASK(uint32_t val) argument
3626 A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val) argument
3635 A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val) argument
3648 A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val) argument
3657 A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val) argument
3670 A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val) argument
3697 A5XX_VPC_CLIP_CNTL_CLIP_MASK(uint32_t val) argument
3703 A5XX_VPC_CLIP_CNTL_CLIP_DIST_03_LOC(uint32_t val) argument
3709 A5XX_VPC_CLIP_CNTL_CLIP_DIST_47_LOC(uint32_t val) argument
3717 A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val) argument
3723 A5XX_VPC_PACK_PSIZELOC(uint32_t val) argument
3746 A5XX_VPC_SO_PROG_A_BUF(uint32_t val) argument
3752 A5XX_VPC_SO_PROG_A_OFF(uint32_t val) argument
3760 A5XX_VPC_SO_PROG_B_BUF(uint32_t val) argument
3766 A5XX_VPC_SO_PROG_B_OFF(uint32_t val) argument
3792 A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val) argument
3806 A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val) argument
3812 A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val) argument
3821 A5XX_PC_CLIP_CNTL_CLIP_MASK(uint32_t val) argument
3833 A5XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val) argument
3839 A5XX_PC_GS_PARAM_INVOCATIONS(uint32_t val) argument
3845 A5XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val) argument
3853 A5XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val) argument
3859 A5XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val) argument
3871 A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val) argument
3879 A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) argument
3885 A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val) argument
3891 A5XX_VFD_CONTROL_1_REGID4PRIMID(uint32_t val) argument
3899 A5XX_VFD_CONTROL_2_REGID_PATCHID(uint32_t val) argument
3907 A5XX_VFD_CONTROL_3_REGID_PATCHID(uint32_t val) argument
3913 A5XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val) argument
3919 A5XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val) argument
3947 A5XX_VFD_DECODE_INSTR_IDX(uint32_t val) argument
3954 A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val) argument
3960 A5XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val) argument
3974 A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val) argument
3980 A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val) argument
3993 A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
3999 A5XX_SP_VS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4008 A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4014 A5XX_SP_FS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4023 A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4029 A5XX_SP_HS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4038 A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4044 A5XX_SP_DS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4053 A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4059 A5XX_SP_GS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4068 A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4074 A5XX_SP_CS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4087 A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4093 A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4099 A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4107 A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4115 A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val) argument
4125 A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val) argument
4131 A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) argument
4137 A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val) argument
4143 A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) argument
4153 A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) argument
4159 A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) argument
4165 A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) argument
4171 A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) argument
4185 A5XX_SP_VS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4192 A5XX_SP_VS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4199 A5XX_SP_VS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4209 A5XX_SP_VS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4219 A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4225 A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4231 A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4239 A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4253 A5XX_SP_FS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4260 A5XX_SP_FS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4267 A5XX_SP_FS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4277 A5XX_SP_FS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4286 A5XX_SP_BLEND_CNTL_ENABLE_BLEND(uint32_t val) argument
4296 A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val) argument
4302 A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val) argument
4308 A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val) argument
4318 A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val) argument
4329 A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val) argument
4343 A5XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4349 A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4355 A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4363 A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4377 A5XX_SP_CS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4384 A5XX_SP_CS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4391 A5XX_SP_CS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4401 A5XX_SP_CS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4411 A5XX_SP_HS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4417 A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4423 A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4431 A5XX_SP_HS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4445 A5XX_SP_HS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4452 A5XX_SP_HS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4459 A5XX_SP_HS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4469 A5XX_SP_HS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4479 A5XX_SP_DS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4485 A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4491 A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4499 A5XX_SP_DS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4513 A5XX_SP_DS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4520 A5XX_SP_DS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4527 A5XX_SP_DS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4537 A5XX_SP_DS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4547 A5XX_SP_GS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
4553 A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
4559 A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
4567 A5XX_SP_GS_CTRL_REG0_BRANCHSTACK(uint32_t val) argument
4581 A5XX_SP_GS_PVT_MEM_PARAM_MEMSIZEPERITEM(uint32_t val) argument
4588 A5XX_SP_GS_PVT_MEM_PARAM_HWSTACKOFFSET(uint32_t val) argument
4595 A5XX_SP_GS_PVT_MEM_PARAM_HWSTACKSIZEPERTHREAD(uint32_t val) argument
4605 A5XX_SP_GS_PVT_MEM_SIZE_TOTALPVTMEMSIZE(uint32_t val) argument
4614 A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
4622 A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val) argument
4697 A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) argument
4703 A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE(enum a3xx_threadsize val) argument
4711 A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val) argument
4719 A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val) argument
4725 A5XX_HLSQ_CONTROL_2_REG_SAMPLEID(uint32_t val) argument
4731 A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(uint32_t val) argument
4737 A5XX_HLSQ_CONTROL_2_REG_CENTERRHW(uint32_t val) argument
4745 A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_PIXEL(uint32_t val) argument
4751 A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_PIXEL(uint32_t val) argument
4757 A5XX_HLSQ_CONTROL_3_REG_IJ_PERSP_CENTROID(uint32_t val) argument
4763 A5XX_HLSQ_CONTROL_3_REG_IJ_LINEAR_CENTROID(uint32_t val) argument
4771 A5XX_HLSQ_CONTROL_4_REG_IJ_PERSP_SAMPLE(uint32_t val) argument
4777 A5XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(uint32_t val) argument
4783 A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val) argument
4789 A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val) argument
4800 A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4806 A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4815 A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4821 A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4830 A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4836 A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4845 A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4851 A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4860 A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4866 A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4875 A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val) argument
4881 A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET(uint32_t val) argument
4890 A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val) argument
4899 A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val) argument
4908 A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val) argument
4917 A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val) argument
4926 A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val) argument
4935 A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val) argument
4949 A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM(uint32_t val) argument
4955 A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX(uint32_t val) argument
4961 A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY(uint32_t val) argument
4967 A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(uint32_t val) argument
4975 A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(uint32_t val) argument
4983 A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X(uint32_t val) argument
4991 A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(uint32_t val) argument
4999 A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y(uint32_t val) argument
5007 A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(uint32_t val) argument
5015 A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z(uint32_t val) argument
5023 A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(uint32_t val) argument
5029 A5XX_HLSQ_CS_CNTL_0_UNK0(uint32_t val) argument
5035 A5XX_HLSQ_CS_CNTL_0_UNK1(uint32_t val) argument
5041 A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID(uint32_t val) argument
5097 A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) argument
5103 A5XX_RB_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val) argument
5109 A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
5123 A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val) argument
5130 A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val) argument
5139 A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) argument
5145 A5XX_RB_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val) argument
5151 A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
5165 A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val) argument
5172 A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val) argument
5185 A5XX_RB_2D_SRC_FLAGS_PITCH(uint32_t val) argument
5198 A5XX_RB_2D_DST_FLAGS_PITCH(uint32_t val) argument
5209 A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) argument
5215 A5XX_GRAS_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val) argument
5221 A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
5231 A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val) argument
5237 A5XX_GRAS_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val) argument
5243 A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
5256 A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val) argument
5262 A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val) argument
5268 A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val) argument
5274 A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val) argument
5280 A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val) argument
5286 A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val) argument
5292 A5XX_TEX_SAMP_0_LOD_BIAS(float val) argument
5300 A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val) argument
5309 A5XX_TEX_SAMP_1_MAX_LOD(float val) argument
5315 A5XX_TEX_SAMP_1_MIN_LOD(float val) argument
5323 A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val) argument
5333 A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val) argument
5340 A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val) argument
5346 A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val) argument
5352 A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val) argument
5358 A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val) argument
5364 A5XX_TEX_CONST_0_MIPLVLS(uint32_t val) argument
5370 A5XX_TEX_CONST_0_SAMPLES(enum a3xx_msaa_samples val) argument
5376 A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val) argument
5382 A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val) argument
5390 A5XX_TEX_CONST_1_WIDTH(uint32_t val) argument
5396 A5XX_TEX_CONST_1_HEIGHT(uint32_t val) argument
5405 A5XX_TEX_CONST_2_PITCHALIGN(uint32_t val) argument
5411 A5XX_TEX_CONST_2_PITCH(uint32_t val) argument
5417 A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val) argument
5425 A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val) argument
5432 A5XX_TEX_CONST_3_MIN_LAYERSZ(uint32_t val) argument
5443 A5XX_TEX_CONST_4_BASE_LO(uint32_t val) argument
5452 A5XX_TEX_CONST_5_BASE_HI(uint32_t val) argument
5458 A5XX_TEX_CONST_5_DEPTH(uint32_t val) argument
5478 A5XX_SSBO_0_0_BASE_LO(uint32_t val) argument
5487 A5XX_SSBO_0_1_PITCH(uint32_t val) argument
5495 A5XX_SSBO_0_2_ARRAY_PITCH(uint32_t val) argument
5504 A5XX_SSBO_0_3_CPP(uint32_t val) argument
5512 A5XX_SSBO_1_0_FMT(enum a5xx_tex_fmt val) argument
5518 A5XX_SSBO_1_0_WIDTH(uint32_t val) argument
5526 A5XX_SSBO_1_1_HEIGHT(uint32_t val) argument
5532 A5XX_SSBO_1_1_DEPTH(uint32_t val) argument
5540 A5XX_SSBO_2_0_BASE_LO(uint32_t val) argument
5548 A5XX_SSBO_2_1_BASE_HI(uint32_t val) argument
5556 A5XX_UBO_0_BASE_LO(uint32_t val) argument
5564 A5XX_UBO_1_BASE_HI(uint32_t val) argument
[all...]
/linux-master/include/sound/
H A Demu8000_reg.h108 #define EMU8000_CPF_WRITE(emu, chan, val) \
109 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(0, (chan)), (val))
110 #define EMU8000_PTRX_WRITE(emu, chan, val) \
111 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (chan)), (val))
112 #define EMU8000_CVCF_WRITE(emu, chan, val) \
113 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(2, (chan)), (val))
114 #define EMU8000_VTFT_WRITE(emu, chan, val) \
115 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(3, (chan)), (val))
116 #define EMU8000_PSST_WRITE(emu, chan, val) \
117 snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(6, (chan)), (val))
[all...]
/linux-master/drivers/spi/
H A Dspi-armada-3700.c128 u32 val; local
130 val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);
131 val &= ~A3700_SPI_AUTO_CS;
132 spireg_write(a3700_spi, A3700_SPI_IF_CFG_REG, val);
137 u32 val; local
139 val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG);
140 val |= (A3700_SPI_EN << cs);
141 spireg_write(a3700_spi, A3700_SPI_IF_CTRL_REG, val);
147 u32 val; local
149 val
157 u32 val; local
187 u32 val; local
200 u32 val; local
220 u32 val; local
247 u32 val; local
262 u32 val; local
281 u32 val; local
404 u32 val; local
447 u32 val = 0; local
487 u32 val; local
495 u32 val; local
509 u32 val = spireg_read(a3700_spi, A3700_SPI_IF_CTRL_REG); local
516 u32 val; local
548 u32 val; local
597 u32 val; local
744 u32 val; local
[all...]
/linux-master/drivers/soc/tegra/fuse/
H A Dspeedo-tegra20.c57 u32 val; local
70 val = 0;
74 val = (val << 1) | (reg & 0x1);
76 val = val * SPEEDO_MULT;
77 pr_debug("Tegra CPU speedo value %u\n", val);
80 if (val <= cpu_process_speedos[sku_info->soc_speedo_id][i])
85 val = 0;
89 val
[all...]
/linux-master/drivers/cpuidle/governors/
H A Dhaltpoll.c81 unsigned int val; local
87 val = dev->poll_limit_ns * guest_halt_poll_grow;
89 if (val < guest_halt_poll_grow_start)
90 val = guest_halt_poll_grow_start;
91 if (val > guest_halt_poll_ns)
92 val = guest_halt_poll_ns;
94 trace_guest_halt_poll_ns_grow(val, dev->poll_limit_ns);
95 dev->poll_limit_ns = val;
100 val = dev->poll_limit_ns;
102 val
[all...]
/linux-master/drivers/phy/
H A Dphy-xgene.c555 u32 val; local
565 val = readl(csr_base + indirect_cmd_reg);
566 } while (!(val & CFG_IND_CMD_DONE_MASK) &&
568 if (!(val & CFG_IND_CMD_DONE_MASK))
577 u32 val; local
585 val = readl(csr_base + indirect_cmd_reg);
586 } while (!(val & CFG_IND_CMD_DONE_MASK) &&
589 if (!(val & CFG_IND_CMD_DONE_MASK))
598 u32 val; local
607 SATA_ENET_SDS_IND_RDATA_REG, reg, &val);
628 u32 val; local
641 u32 val; local
651 u32 val; local
661 u32 val; local
687 u32 val; local
697 u32 val; local
708 u32 val; local
762 u32 val; local
916 u32 val; local
941 u32 val; local
1141 u32 val; local
1239 u32 val; local
1257 u32 val; local
1349 u32 val; member in struct:__anon397
1436 u32 val; local
[all...]
/linux-master/drivers/net/phy/
H A Dbcm84881.c25 int val; local
28 val, !(val & MDIO_CTRL1_RESET),
127 int bmsr, val; local
129 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
130 if (val < 0)
131 return val;
135 return val;
137 return !!(val & MDIO_AN_STAT1_COMPLETE) &&
144 int bmsr, val; local
[all...]
/linux-master/drivers/net/wireless/ath/ath5k/
H A Deeprom.c43 u16 val; local
50 val = (5 * bin) + 4800;
52 val = bin > 62 ? (10 * 62) + (5 * (bin - 62)) + 5100 :
56 val = bin + 2300;
58 val = bin + 2400;
61 return val;
76 u16 val; local
96 AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val);
97 if (val) {
98 eep_max = (val
119 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); local
194 u16 val; local
254 u16 val; local
517 u16 val; local
553 u16 val; local
802 u16 val; local
1027 u16 val; local
1290 u16 val; local
1479 u16 val; local
1609 u16 val; local
1712 u16 val; local
[all...]
/linux-master/arch/arm/common/
H A Dkrait-l2-accessors.c12 void krait_set_l2_indirect_reg(u32 addr, u32 val) argument
23 asm volatile ("mcr p15, 3, %0, c15, c0, 7 @ l2cpdr" : : "r" (val));
32 u32 val; local
42 asm volatile ("mrc p15, 3, %0, c15, c0, 7 @ l2cpdr" : "=r" (val));
46 return val;
/linux-master/drivers/gpu/drm/sti/
H A Dsti_awg_utils.c124 long int val; local
129 val = timing->blanking_level;
130 ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
132 val = timing->trailing_pixels - 1 + AWG_DELAY;
133 ret |= awg_generate_instr(SKIP, val, 0, 0, fwparams);
137 val = timing->blanking_level;
139 val, 0, 1, fwparams);
143 val = timing->active_pixels - 1;
144 ret |= awg_generate_instr(SKIP, val, 0, 1, fwparams);
147 val
158 long int val, tmp_val; local
[all...]
/linux-master/arch/arm/mach-s3c/
H A Dpm-common.c30 ptr->val = readl_relaxed(ptr->reg);
31 S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
50 ptr->reg, ptr->val, readl_relaxed(ptr->reg));
52 writel_relaxed(ptr->val, ptr->reg);
72 writel_relaxed(ptr->val, ptr->reg);
/linux-master/tools/testing/selftests/bpf/progs/
H A Dinner_array_lookup.c28 int *val; local
35 val = bpf_map_lookup_elem(map, &inner_key);
36 if (!val)
39 if (*val == 1)
40 *val = 2;
H A Dtest_global_func5.c17 int f2(int val, struct __sk_buff *skb) argument
19 return f1(skb) + f3(val, (void *)&val); /* type mismatch */
23 int f3(int val, struct __sk_buff *skb) argument
25 return skb->ifindex * val;
/linux-master/drivers/hwmon/
H A Dhwmon-vid.c65 * val is the 4-bit or more VID code.
69 int vid_from_reg(int val, u8 vrm) argument
77 val &= 0x3f;
78 if ((val & 0x1f) == 0x1f)
80 if ((val & 0x1f) <= 0x09 || val == 0x0a)
81 vid = 1087500 - (val & 0x1f) * 25000;
83 vid = 1862500 - (val & 0x1f) * 25000;
84 if (val & 0x20)
90 val
[all...]
/linux-master/drivers/gpu/drm/panel/
H A Dpanel-abt-y030xx067a.c23 #define REG00_VBRT_CTRL(val) (val)
25 #define REG01_COM_DC(val) (val)
27 #define REG02_DA_CONTRAST(val) (val)
28 #define REG02_VESA_SEL(val) ((val) << 5)
31 #define REG03_VPOSITION(val) (val)
[all...]
/linux-master/drivers/media/i2c/ccs/
H A Dccs-reg-access.h24 int ccs_read_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 *val);
25 int ccs_read_addr(struct ccs_sensor *sensor, u32 reg, u32 *val);
26 int ccs_read_addr_8only(struct ccs_sensor *sensor, u32 reg, u32 *val);
27 int ccs_read_addr_noconv(struct ccs_sensor *sensor, u32 reg, u32 *val);
28 int ccs_write_addr_no_quirk(struct ccs_sensor *sensor, u32 reg, u32 val);
29 int ccs_write_addr(struct ccs_sensor *sensor, u32 reg, u32 val);
34 u32 ccs_reg_conv(struct ccs_sensor *sensor, u32 reg, u32 val);
36 #define ccs_read(sensor, reg_name, val) \
37 ccs_read_addr(sensor, CCS_R_##reg_name, val)
39 #define ccs_write(sensor, reg_name, val) \
[all...]
/linux-master/tools/power/cpupower/utils/helpers/
H A Dmsr.c26 int read_msr(int cpu, unsigned int idx, unsigned long long *val) argument
37 if (read(fd, val, sizeof *val) != sizeof *val)
55 int write_msr(int cpu, unsigned int idx, unsigned long long val) argument
66 if (write(fd, &val, sizeof val) != sizeof val)
77 unsigned long long val; local
83 ret = read_msr(cpu, MSR_NEHALEM_TURBO_RATIO_LIMIT, &val);
[all...]
/linux-master/include/linux/
H A Dlitex.h14 static inline void _write_litex_subregister(u32 val, void __iomem *addr) argument
16 writel((u32 __force)cpu_to_le32(val), addr);
41 static inline void litex_write8(void __iomem *reg, u8 val) argument
43 _write_litex_subregister(val, reg);
46 static inline void litex_write16(void __iomem *reg, u16 val) argument
48 _write_litex_subregister(val, reg);
51 static inline void litex_write32(void __iomem *reg, u32 val) argument
53 _write_litex_subregister(val, reg);
56 static inline void litex_write64(void __iomem *reg, u64 val) argument
58 _write_litex_subregister(val >> 3
[all...]
/linux-master/drivers/gpu/drm/loongson/
H A Dlsdc_irq.c24 u32 val; local
27 val = lsdc_rreg32(ldev, LSDC_INT_REG);
28 if ((val & INT_STATUS_MASK) == 0) {
33 ldev->irq_status = val;
36 lsdc_wreg32(ldev, LSDC_INT_REG, val);
52 u32 val; local
55 val = lsdc_rreg32(ldev, LSDC_INT_REG);
56 if ((val & INT_STATUS_MASK) == 0) {
61 ldev->irq_status = val;
64 val
[all...]

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