Searched refs:parent_rate (Results 126 - 150 of 358) sorted by relevance

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/linux-master/drivers/clk/
H A D	clk-scpi.c	28 unsigned long parent_rate) 36 unsigned long *parent_rate) 48 unsigned long parent_rate) 82 unsigned long parent_rate) 96 unsigned long *parent_rate) 115 unsigned long parent_rate) 27 scpi_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 35 scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 47 scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 81 scpi_dvfs_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 95 scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 114 scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
H A D	clk-cdce706.c	164 unsigned long parent_rate) 174 u64 res = (u64)parent_rate * hwd->mul; 181 return parent_rate / hwd->div; 187 unsigned long *parent_rate) 194 "%s, rate: %lu, parent_rate: %lu\n", 195 __func__, rate, *parent_rate); 197 rational_best_approximation(rate, *parent_rate, 207 res = (u64)*parent_rate * hwd->mul; 213 unsigned long parent_rate) 279 unsigned long parent_rate) 163 cdce706_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 186 cdce706_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 212 cdce706_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 278 cdce706_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 361 cdce706_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 420 cdce706_clkout_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 434 cdce706_clkout_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
H A D	clk-cs2000-cp.c	297 unsigned long parent_rate) 305 return cs2000_ratio_to_rate(ratio, parent_rate, priv->lf_ratio); 309 unsigned long *parent_rate) 314 ratio = cs2000_rate_to_ratio(*parent_rate, rate, priv->lf_ratio); 316 return cs2000_ratio_to_rate(ratio, *parent_rate, priv->lf_ratio); 321 unsigned long parent_rate) 334 priv->lf_ratio = priv->dynamic_mode && ((rate / parent_rate) > 4096); 341 unsigned long rate, unsigned long parent_rate) 350 ret = cs2000_select_ratio_mode(priv, rate, parent_rate); 354 ret = cs2000_ratio_set(priv, ch, parent_rate, rat 296 cs2000_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 308 cs2000_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 319 cs2000_select_ratio_mode(struct cs2000_priv *priv, unsigned long rate, unsigned long parent_rate) argument 340 __cs2000_set_rate(struct cs2000_priv *priv, int ch, unsigned long rate, unsigned long parent_rate) argument 372 cs2000_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
H A D	clk-lan966x.c	89 unsigned long parent_rate) 94 if (rate == 0 || parent_rate == 0) 98 div = parent_rate / rate; 107 unsigned long parent_rate) 114 return parent_rate / (div + 1); 87 lan966x_gck_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 106 lan966x_gck_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
/linux-master/drivers/clk/ralink/
H A D	clk-mtmips.c	136 unsigned long parent_rate) 138 return parent_rate; 370 unsigned long parent_rate) 406 unsigned long parent_rate) 408 if (parent_rate == 320000000) 409 return parent_rate / 4; 411 return parent_rate / 3; 479 unsigned long parent_rate) 489 switch (parent_rate) { 499 WARN_ON_ONCE(parent_rate 135 mtmips_pherip_clk_rate(struct clk_hw *hw, unsigned long parent_rate) argument 369 rt5350_xtal_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 405 rt5350_bus_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 478 rt3883_bus_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 539 mt7620_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 580 mt7620_cpu_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 597 mt7620_bus_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 628 mt7620_periph_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 642 mt76x8_xtal_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/imx/
H A D	clk-composite-8m.c	29 unsigned long parent_rate) 39 prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value, 51 unsigned long parent_rate, 63 int new_error = ((parent_rate / div1) / div2) - rate; 93 unsigned long parent_rate) 102 ret = imx8m_clk_composite_compute_dividers(rate, parent_rate, 28 imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 50 imx8m_clk_composite_compute_dividers(unsigned long rate, unsigned long parent_rate, int *prediv, int *postdiv) argument 91 imx8m_clk_composite_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/samsung/
H A D	clk-pll.c	150 unsigned long parent_rate) 154 u64 fvco = parent_rate; 183 unsigned long parent_rate) 187 u64 fvco = parent_rate; 220 unsigned long parent_rate) 224 u64 fvco = parent_rate; 324 unsigned long parent_rate) 329 u64 fvco = parent_rate; 359 unsigned long parent_rate) 434 unsigned long parent_rate) 149 samsung_pll2126_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 182 samsung_pll3000_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 219 samsung_pll35xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 323 samsung_pll36xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 358 samsung_pll36xx_set_rate(struct clk_hw *hw, unsigned long drate, unsigned long parent_rate) argument 433 samsung_pll0822x_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 521 samsung_pll0831x_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 543 samsung_pll0831x_set_rate(struct clk_hw *hw, unsigned long drate, unsigned long parent_rate) argument 619 samsung_pll45xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 752 samsung_pll46xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 881 samsung_pll6552_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 921 samsung_pll6553_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 959 samsung_pll2550x_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 1000 samsung_pll2550xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 1100 samsung_pll2650x_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 1192 samsung_pll2650xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 1214 samsung_pll2650xx_set_rate(struct clk_hw *hw, unsigned long drate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/baikal-t1/
H A D	ccu-pll.c	153 unsigned long parent_rate) 164 return ccu_pll_calc_freq(parent_rate, nr, nf, od); 167 static void ccu_pll_calc_factors(unsigned long rate, unsigned long parent_rate, argument 180 nri = (parent_rate / CCU_PLL_FDIV_MAX) + 1; 181 nr_max = min(parent_rate / CCU_PLL_FDIV_MIN, CCU_PLL_NR_MAX); 192 denom = parent_rate / nri; 220 freq = ccu_pll_calc_freq(parent_rate, nri, n1, d1); 232 unsigned long *parent_rate) 236 ccu_pll_calc_factors(rate, *parent_rate, &nr, &nf, &od); 238 return ccu_pll_calc_freq(*parent_rate, n 152 ccu_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 231 ccu_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 245 ccu_pll_set_rate_reset(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 276 ccu_pll_set_rate_norst(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/stm32/
H A D	clk-stm32-core.c	211 unsigned long parent_rate) 225 return parent_rate; 228 return DIV_ROUND_UP_ULL((u64)parent_rate, div); 234 unsigned long parent_rate) 240 value = divider_get_val(rate, parent_rate, divider->table, 337 unsigned long parent_rate) 348 ret = stm32_divider_set_rate(div->base, div->clock_data, div->div_id, rate, parent_rate); 384 unsigned long parent_rate) 389 return parent_rate; 391 return stm32_divider_get_rate(div->base, div->clock_data, div->div_id, parent_rate); 208 stm32_divider_get_rate(void __iomem *base, struct clk_stm32_clock_data *data, u16 div_id, unsigned long parent_rate) argument 231 stm32_divider_set_rate(void __iomem *base, struct clk_stm32_clock_data *data, u16 div_id, unsigned long rate, unsigned long parent_rate) argument 336 clk_stm32_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 383 clk_stm32_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 400 clk_stm32_composite_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 420 clk_stm32_composite_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/bcm/
H A D	clk-iproc-pll.c	82 unsigned long parent_rate, 87 ndiv_int = target_rate / parent_rate; 92 residual = target_rate - (ndiv_int * parent_rate); 99 residual += (parent_rate / 2); 100 ndiv_frac = div64_u64((u64)residual, (u64)parent_rate); 106 vco_out->rate = vco_out->ndiv_int * parent_rate; 107 residual = (u64)vco_out->ndiv_frac * (u64)parent_rate; 306 unsigned long parent_rate) 322 ref_freq = parent_rate * 2; 324 ref_freq = parent_rate / vc 81 pll_calc_param(unsigned long target_rate, unsigned long parent_rate, struct iproc_pll_vco_param *vco_out) argument 305 pll_set_rate(struct iproc_clk *clk, struct iproc_pll_vco_param *vco, unsigned long parent_rate) argument 447 iproc_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 542 iproc_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 610 iproc_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 658 iproc_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clocksource/
H A D	ingenic-sysost.c	92 unsigned long parent_rate) 102 return parent_rate >> (prescale * 2); 106 unsigned long parent_rate) 116 return parent_rate >> (prescale * 2); 131 unsigned long *parent_rate) 133 unsigned long rate = *parent_rate; 145 unsigned long parent_rate) 149 u8 prescale = ingenic_ost_get_prescale(parent_rate, req_rate); 161 unsigned long parent_rate) 165 u8 prescale = ingenic_ost_get_prescale(parent_rate, req_rat 91 ingenic_ost_percpu_timer_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 105 ingenic_ost_global_timer_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 130 ingenic_ost_round_rate(struct clk_hw *hw, unsigned long req_rate, unsigned long *parent_rate) argument 144 ingenic_ost_percpu_timer_set_rate(struct clk_hw *hw, unsigned long req_rate, unsigned long parent_rate) argument 160 ingenic_ost_global_timer_set_rate(struct clk_hw *hw, unsigned long req_rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/mmp/
H A D	clk-audio.c	84 unsigned long parent_rate; member in struct:__anon98 117 unsigned long parent_rate) 138 if (predivs[prediv].parent_rate != parent_rate) 168 unsigned long *parent_rate) 175 if (predivs[prediv].parent_rate != *parent_rate) 195 unsigned long parent_rate) 203 if (predivs[prediv].parent_rate != parent_rate) 116 audio_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 167 audio_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 194 audio_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/clk/qcom/
H A D	clk-rcg.c	321 * parent_rate m 342 clk_rcg_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 363 return calc_rate(parent_rate, m, n, mode, pre_div); 367 clk_dyn_rcg_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 396 return calc_rate(parent_rate, m, n, mode, pre_div); 517 unsigned long parent_rate) 530 unsigned long parent_rate) 543 unsigned long parent_rate) 563 unsigned long parent_rate) 588 unsigned long rate, unsigned long parent_rate, u 516 clk_rcg_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 529 clk_rcg_set_floor_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 542 clk_rcg_bypass_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 562 clk_rcg_bypass2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 587 clk_rcg_bypass2_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument 630 clk_rcg_pixel_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 674 clk_rcg_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument 704 clk_rcg_esc_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 740 clk_rcg_esc_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument 757 clk_rcg_lcc_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 809 clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 815 clk_dyn_rcg_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index) argument [all...]
H A D	clk-krait.c	108 unsigned long parent_rate) 130 krait_div2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 141 return DIV_ROUND_UP(parent_rate, div); 107 krait_div2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/mvebu/
H A D	clk-corediv.c	126 unsigned long parent_rate) 135 return parent_rate / div; 139 unsigned long *parent_rate) 144 div = *parent_rate / rate; 150 return *parent_rate / div; 154 unsigned long parent_rate) 162 div = parent_rate / rate; 125 clk_corediv_recalc_rate(struct clk_hw *hwclk, unsigned long parent_rate) argument 138 clk_corediv_round_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long *parent_rate) argument 153 clk_corediv_set_rate(struct clk_hw *hwclk, unsigned long rate, unsigned long parent_rate) argument
H A D	ap-cpu-clk.c	144 unsigned long parent_rate) 156 return parent_rate / cpu_clkdiv_ratio; 160 unsigned long parent_rate) 163 int ret, reg, divider = parent_rate / rate; 214 unsigned long *parent_rate) 216 int divider = *parent_rate / rate; 220 return *parent_rate / divider; 143 ap_cpu_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 159 ap_cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 213 ap_cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument
/linux-master/drivers/clk/sprd/
H A D	pll.c	99 unsigned long parent_rate) 109 return parent_rate; 149 unsigned long parent_rate) 232 unsigned long parent_rate) 236 return _sprd_pll_recalc_rate(pll, parent_rate); 241 unsigned long parent_rate) 245 return _sprd_pll_set_rate(pll, rate, parent_rate); 98 _sprd_pll_recalc_rate(const struct sprd_pll *pll, unsigned long parent_rate) argument 147 _sprd_pll_set_rate(const struct sprd_pll *pll, unsigned long rate, unsigned long parent_rate) argument 231 sprd_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 239 sprd_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/sunxi-ng/
H A D	ccu_nkm.c	110 unsigned long parent_rate) 136 rate = parent_rate * n * k / m; 146 unsigned long *parent_rate, 164 rate = ccu_nkm_find_best(*parent_rate, rate, &_nkm, &nkm->common); 166 rate = ccu_nkm_find_best_with_parent_adj(&nkm->common, parent_hw, parent_rate, rate, 185 unsigned long parent_rate) 202 ccu_nkm_find_best(parent_rate, rate, &_nkm, &nkm->common); 109 ccu_nkm_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 144 ccu_nkm_round_rate(struct ccu_mux_internal *mux, struct clk_hw *parent_hw, unsigned long *parent_rate, unsigned long rate, void *data) argument 184 ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/arch/arm/mach-ep93xx/
H A D	clock.c	260 unsigned long parent_rate) 269 rate = (parent_rate * 2) / ((__pdiv + 3) * __div); 275 unsigned long parent_rate) 283 mclk_rate = parent_rate * 2; 356 unsigned long parent_rate) 365 return DIV_ROUND_UP_ULL(parent_rate, psc->div[index]); 369 unsigned long *parent_rate) 378 if ((rate * psc->div[i]) == *parent_rate) 379 return DIV_ROUND_UP_ULL((u64)*parent_rate, psc->div[i]); 381 now = DIV_ROUND_UP_ULL((u64)*parent_rate, ps 259 ep93xx_ddiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 274 ep93xx_ddiv_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 355 ep93xx_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 368 ep93xx_div_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 393 ep93xx_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/i2c/busses/
H A D	i2c-bcm2835.c	91 unsigned long parent_rate) 93 u32 divider = DIV_ROUND_UP(parent_rate, rate); 110 unsigned long parent_rate) 114 u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate); 141 unsigned long *parent_rate) 143 u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate); 145 return DIV_ROUND_UP(*parent_rate, divider); 149 unsigned long parent_rate) 154 return DIV_ROUND_UP(parent_rate, divider); 90 clk_bcm2835_i2c_calc_divider(unsigned long rate, unsigned long parent_rate) argument 109 clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument 140 clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 148 clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument
/linux-master/drivers/clk/sifive/
H A D	sifive-prci.h	295 unsigned long *parent_rate); 297 unsigned long parent_rate); 302 unsigned long parent_rate); 304 unsigned long parent_rate); 306 unsigned long parent_rate);
/linux-master/drivers/clk/ingenic/
H A D	cgu.c	80 ingenic_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 111 return parent_rate; 125 return div_u64((u64)parent_rate * m * pll_info->rate_multiplier, 131 unsigned long rate, unsigned long parent_rate, 140 n = parent_rate / (10 * MHZ); 144 m = (rate / MHZ) * od * n / (parent_rate / MHZ); 155 unsigned long rate, unsigned long parent_rate, 162 (*pll_info->calc_m_n_od)(pll_info, rate, parent_rate, &m, &n, &od); 164 ingenic_pll_calc_m_n_od(pll_info, rate, parent_rate, &m, &n, &od); 173 return div_u64((u64)parent_rate * 130 ingenic_pll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, unsigned long rate, unsigned long parent_rate, unsigned int *pm, unsigned int *pn, unsigned int *pod) argument 154 ingenic_pll_calc(const struct ingenic_cgu_clk_info *clk_info, unsigned long rate, unsigned long parent_rate, unsigned int *pm, unsigned int *pn, unsigned int *pod) argument 201 ingenic_pll_set_rate(struct clk_hw *hw, unsigned long req_rate, unsigned long parent_rate) argument 406 ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 459 ingenic_clk_calc_div(struct clk_hw *hw, const struct ingenic_cgu_clk_info *clk_info, unsigned long parent_rate, unsigned long req_rate) argument 524 ingenic_clk_set_rate(struct clk_hw *hw, unsigned long req_rate, unsigned long parent_rate) argument [all...]
/linux-master/drivers/gpu/drm/msm/disp/mdp4/
H A D	mdp4_lvds_pll.c	95 unsigned long parent_rate) 102 unsigned long *parent_rate) 109 unsigned long parent_rate) 94 mpd4_lvds_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 101 mpd4_lvds_pll_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 108 mpd4_lvds_pll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/arch/arm/mach-omap2/
H A D	clkt2xxx_virt_prcm_set.c	61 unsigned long parent_rate) 74 unsigned long *parent_rate) 98 unsigned long parent_rate) 60 omap2_table_mpu_recalc(struct clk_hw *clk, unsigned long parent_rate) argument 73 omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) argument 97 omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument
/linux-master/drivers/clk/renesas/
H A D	clk-div6.c	84 unsigned long parent_rate) 88 return parent_rate / clock->div; 92 unsigned long parent_rate) 99 div = DIV_ROUND_CLOSEST(parent_rate, rate); 149 unsigned long parent_rate) 152 unsigned int div = cpg_div6_clock_calc_div(rate, parent_rate); 83 cpg_div6_clock_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) argument 91 cpg_div6_clock_calc_div(unsigned long rate, unsigned long parent_rate) argument 148 cpg_div6_clock_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) argument

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Indexes created Wed May 08 10:03:12 MDT 2024