Searched refs:mask (Results 126 - 150 of 1780) sorted by last modified time

1234567891011>>

/freebsd-11-stable/sys/cddl/contrib/opensolaris/uts/common/dtrace/
H A Ddtrace.c1281 uint64_t mask; local
1293 mask = 1LL << (64 - b);
1294 mask -= 1;
1295 a[0] |= ((a[1] & mask) << (64 - b));
1304 mask = a[0] >> (64 - b);
1305 a[1] |= mask;
6763 uintptr_t mask = (0xf << (sizeof (uintptr_t) * NBBY / 4));
6804 mask = (uintptr_t)0xf << shift;
6807 c[i++] = "0123456789abcdef"[(val & mask) >> shift];
11387 uint32_t size = 0, align = sizeof (uint8_t), mask;
[all...]
/freebsd-11-stable/usr.sbin/bhyve/
H A Dpci_emul.c577 uint64_t *baseptr, limit, addr, mask, lobits, bar; local
596 addr = mask = lobits = 0;
601 mask = PCIM_BAR_IO_BASE;
621 mask = PCIM_BAR_MEM_BASE;
628 mask = PCIM_BAR_MEM_BASE;
635 mask = PCIM_BAR_MEM_BASE;
654 bar = (addr & mask) | lobits;
822 /* set mask bit of vector control register */
1740 uint64_t addr, bar, mask; local
1813 mask
[all...]
/freebsd-11-stable/sys/net/
H A Diflib.c3421 uint32_t qsize, cidx, mask, gen; local
3430 mask = qsize-1;
3439 prefetch(ifsd_m[(cidx + 3) & mask]);
3440 prefetch(ifsd_m[(cidx + 4) & mask]);
3443 prefetch(&ifsd_m[(cidx + CACHE_PTR_INCREMENT) & mask]);
3444 prefetch(&ifsd_flags[(cidx + CACHE_PTR_INCREMENT) & mask]);
4097 int mask, setmask; local
4099 mask = ifr->ifr_reqcap ^ if_getcapenable(ifp);
4102 setmask |= mask & (IFCAP_TOE4|IFCAP_TOE6);
4104 setmask |= (mask
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/Unix/
H A DPath.inc728 // Chose arbitary new mask and reset the umask to the old mask.
H A DSignals.inc642 exception_mask_t mask = EXC_MASK_CRASH;
645 mask,
/freebsd-11-stable/sys/netpfil/pf/
H A Dpf_ioctl.c810 PF_MD5_UPD(pfr, addr.v.a.mask.addr32);
1697 &psk->psk_src.addr.v.a.mask,
1701 &psk->psk_dst.addr.v.a.mask,
3679 &psnk->psnk_src.addr.v.a.mask,
3683 &psnk->psnk_dst.addr.v.a.mask,
/freebsd-11-stable/contrib/llvm-project/openmp/runtime/src/
H A Dz_Windows_NT_util.cpp574 kmp_affin_mask_t *mask; local
575 KMP_CPU_ALLOC_ON_STACK(mask);
576 KMP_CPU_ZERO(mask);
577 KMP_CPU_SET(proc, mask);
578 __kmp_set_system_affinity(mask, TRUE);
579 KMP_CPU_FREE_FROM_STACK(mask);
593 "Windows* OS affinity interface functional (mask size = "
H A Dz_Linux_util.cpp111 kmp_affin_mask_t *mask; local
112 KMP_CPU_ALLOC_ON_STACK(mask);
113 KMP_CPU_ZERO(mask);
114 KMP_CPU_SET(which, mask);
115 __kmp_set_system_affinity(mask, TRUE);
116 KMP_CPU_FREE_FROM_STACK(mask);
171 "setaffinity for mask size %d returned %d errno = %d\n",
194 "affinity supported (mask size %d)\n",
210 "getaffinity for mask size %d returned %d errno = %d\n",
217 "inconsistent OS call behavior: errno == ENOSYS for mask "
[all...]
H A Dompt-general.cpp582 kmp_affin_mask_t *mask = KMP_CPU_INDEX(__kmp_affinity_masks, place_num);
584 KMP_CPU_SET_ITERATE(i, mask) {
586 (!KMP_CPU_ISSET(i, mask))) {
H A Dkmp_wait_release.h873 kmp_uint64 mask = 0; local
874 byteref(&mask, offset) = 1;
875 KMP_TEST_THEN_OR64(get(), mask); local
H A Dkmp_stub.cpp112 int kmpc_set_affinity_mask_proc(int proc, void **mask) { argument
116 int kmpc_unset_affinity_mask_proc(int proc, void **mask) { argument
120 int kmpc_get_affinity_mask_proc(int proc, void **mask) { argument
H A Dkmp_lock.h449 std::atomic<kmp_uint64> mask; // is 2**num_polls-1 for mod op member in struct:kmp_base_drdpa_lock
H A Dkmp_lock.cpp1991 // Create a bit mask with one more set bit.
2235 kmp_uint64 mask = lck->lk.mask; // atomic load local
2239 if (polls[ticket & mask] != ticket)
2244 // Now spin-wait, but reload the polls pointer and mask, in case the
2249 // The current implementation of KMP_WAIT doesn't allow for mask
2254 while (polls[ticket & mask] < ticket) { // atomic load
2256 // Re-read the mask and the poll pointer from the lock structure.
2258 // Make certain that "mask" is read before "polls" !!!
2261 // values, and we get the new value of mask an
2395 kmp_uint64 mask = lck->lk.mask; // atomic load local
2440 kmp_uint64 mask = lck->lk.mask; // atomic load local
[all...]
H A Dkmp_ftn_entry.h210 int FTN_STDCALL FTN_SET_AFFINITY(void **mask) { argument
217 return __kmp_aux_set_affinity(mask);
221 int FTN_STDCALL FTN_GET_AFFINITY(void **mask) { argument
228 return __kmp_aux_get_affinity(mask);
244 void FTN_STDCALL FTN_CREATE_AFFINITY_MASK(void **mask) { argument
246 *mask = NULL;
255 *mask = mask_internals;
259 void FTN_STDCALL FTN_DESTROY_AFFINITY_MASK(void **mask) { argument
269 if (*mask == NULL) {
273 mask_internals = (kmp_affin_mask_t *)(*mask);
279 FTN_SET_AFFINITY_MASK_PROC(int KMP_DEREF proc, void **mask) argument
290 FTN_UNSET_AFFINITY_MASK_PROC(int KMP_DEREF proc, void **mask) argument
301 FTN_GET_AFFINITY_MASK_PROC(int KMP_DEREF proc, void **mask) argument
[all...]
H A Dkmp_affinity.h24 hwloc_cpuset_t mask; member in class:KMPHwlocAffinity::Mask
28 mask = hwloc_bitmap_alloc();
31 ~Mask() { hwloc_bitmap_free(mask); }
32 void set(int i) override { hwloc_bitmap_set(mask, i); }
33 bool is_set(int i) const override { return hwloc_bitmap_isset(mask, i); }
34 void clear(int i) override { hwloc_bitmap_clr(mask, i); }
35 void zero() override { hwloc_bitmap_zero(mask); } variable
38 hwloc_bitmap_copy(mask, convert->mask);
42 hwloc_bitmap_and(mask, mas
138 KMPAffinity::Mask *mask; variable
139 KMP_CPU_ALLOC_ON_STACK(mask); variable
140 KMP_CPU_ZERO(mask); variable
143 KMP_CPU_FREE_FROM_STACK(mask); variable
248 mask_t *mask; member in class:KMPNativeAffinity::Mask
372 mask_t *mask; member in class:KMPNativeAffinity::Mask
[all...]
H A Dkmp_affinity.cpp90 // Print the affinity mask to the character array in a pretty format.
93 // The format can also be the string "{<empty>}" if no bits are set in mask
95 kmp_affin_mask_t *mask) {
100 KMP_ASSERT(mask);
105 if (mask->begin() == mask->end()) {
113 start = mask->begin();
116 // [start, previous] is inclusive range of contiguous bits in mask
117 for (finish = mask->next(start), previous = start;
118 finish == previous + 1 && finish != mask
94 __kmp_affinity_print_mask(char *buf, int buf_len, kmp_affin_mask_t *mask) argument
163 __kmp_affinity_str_buf_mask(kmp_str_buf_t *buf, kmp_affin_mask_t *mask) argument
215 __kmp_affinity_entire_machine_mask(kmp_affin_mask_t *mask) argument
786 char mask[KMP_AFFIN_MASK_PRINT_LEN]; local
1660 int mask = (1 << shift) - 1; local
1808 char mask[KMP_AFFIN_MASK_PRINT_LEN]; local
2753 kmp_affin_mask_t *mask = KMP_CPU_INDEX(osId2Mask, osId); local
2771 kmp_affin_mask_t *mask = KMP_CPU_INDEX(osId2Mask, osId); local
4720 kmp_affin_mask_t *mask; local
4828 kmp_affin_mask_t *mask = local
4843 __kmp_aux_set_affinity(void **mask) argument
4869 KMP_CPU_SET_ITERATE(proc, ((kmp_affin_mask_t *)(*mask))) argument
4908 __kmp_aux_get_affinity(void **mask) argument
4967 __kmp_aux_set_affinity_mask_proc(int proc, void **mask) argument
4999 __kmp_aux_unset_affinity_mask_proc(int proc, void **mask) argument
5031 __kmp_aux_get_affinity_mask_proc(int proc, void **mask) argument
5114 kmp_affin_mask_t *mask = th->th.th_affin_mask; local
5136 kmp_affin_mask_t *mask = th->th.th_affin_mask; local
[all...]
/freebsd-11-stable/contrib/llvm-project/openmp/runtime/src/thirdparty/ittnotify/
H A Dittnotify.h439 * @brief possible value for suppression mask
445 * @brief possible value for suppression mask (suppresses errors from threading analysis)
451 * @brief possible value for suppression mask (suppresses errors from memory analysis)
456 * @brief Start suppressing errors identified in mask on this thread
458 void ITTAPI __itt_suppress_push(unsigned int mask);
463 ITT_STUBV(ITTAPI, void, suppress_push, (unsigned int mask))
467 #define __itt_suppress_push(mask)
505 * @brief Mark a range of memory for error suppression or unsuppression for error types included in mask
507 void ITTAPI __itt_suppress_mark_range(__itt_suppress_mode_t mode, unsigned int mask, void * address, size_t size);
512 ITT_STUBV(ITTAPI, void, suppress_mark_range, (__itt_suppress_mode_t mode, unsigned int mask, voi
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp37 uint8_t mask = 0x01; local
43 ret |= mask;
45 mask <<= 1;
499 // - In AVX512 there may be a mask operand here -
1123 errs() << "Unhandled mask register encoding " << s << "\n";
1124 llvm_unreachable("Unhandled mask register encoding");
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp738 #define GENERIC_FIXUP_FUNC(name, base, prefix, mask) \
750 index &= mask; \
759 index &= mask; \
764 index &= mask; \
769 index &= mask; \
1009 // for extended and escape opcodes, and using a supplied attribute mask.
1460 // Read an mask register from the opcode field of an instruction.
2209 /// translateMaskRegister - Translates a 3-bit mask register number to
2213 /// @param maskRegNum - Number of mask register from 0 to 7.
2218 debug("Invalid mask registe
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp89 BT::BitMask HexagonEvaluator::mask(unsigned Reg, unsigned Sub) const { function in class:HexagonEvaluator
91 return MachineEvaluator::mask(Reg, 0);
H A DBitTracker.cpp217 // Sanity: M must be a valid mask for *this.
368 BitMask M = mask(RR.Reg, RR.Sub);
707 BT::BitMask BT::MachineEvaluator::mask(unsigned Reg, unsigned Sub) const {
708 assert(Sub == 0 && "Generic BitTracker::mask called for Sub != 0");
710 assert(W > 0 && "Cannot generate mask for empty register");
736 Res.insert(RegisterCell::ref(getCell(RS, Inputs)), mask(RD.Reg, SS));
737 Res.insert(RegisterCell::ref(getCell(RT, Inputs)), mask(RD.Reg, ST));
1001 BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub);
1002 BitMask NM = ME.mask(NewRR.Reg, NewRR.Sub);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp288 const uint64_t mask = (high_bit_set >> (63 - bits)); local
289 return (((uint64_t)Res & mask) == mask);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp75 assert(NumTZ <= 3 && "Invalid IT mask!");
113 assert(NumTZ <= 3 && "Invalid VPT mask!");
954 // code and mask operands so that we can apply them correctly
1619 // This operand encodes a mask of contiguous zeros between a specified MSB
1620 // and LSB. To decode it, we create the mask of all bits MSB-and-lower,
1621 // the mask of all bits LSB-and-lower, and then xor them to create
1622 // the mask of that's all ones on [msb, lsb]. Finally we not it to
1623 // create the final mask.
4712 // The ARMv7-M architecture stores an additional 2-bit mask value in
4713 // MSR bits {11-10}. The mask i
5500 unsigned mask = fieldFromInstruction(Insn, 0, 4); local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp212 unsigned Mask:4; // Condition mask for instructions.
217 // 4 - trailingzeroes(mask)
353 // Create a new explicit IT block with the given condition and mask.
354 // The mask should be in the format used in ARMOperand and
1181 uint64_t mask = (1 << shift) - 1; local
1182 if ((Value & mask) != 0 || (Value >> shift) > 0xff)
2518 // Munge the lsb/width into a bitfield mask.
2521 // Make a 32-bit mask w/ the referenced bits clear and all other bits set.
3737 OS << "<it-mask " << MaskStr[ITMask.Mask] << ">";
3750 OS << "<mask
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/
H A Dregcomp.c1234 cs->mask = 1 << ((no) % CHAR_BIT);

Completed in 334 milliseconds

1234567891011>>