Searched refs:base (Results 126 - 150 of 6552) sorted by last modified time

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/linux-master/drivers/media/usb/gspca/
H A Dcpia1.c1004 #define COMPGAIN(base, curexp, newexp) \
1005 (u8) ((((float) base - 128.0) * ((float) curexp / (float) newexp)) + 128.5)
1011 #define COMPGAIN(base, curexp, newexp) \
1012 (u8)(128 + (((u32)(2*(base-128)*curexp + newexp)) / (2 * newexp)))
/linux-master/drivers/media/platform/renesas/rcar-vin/
H A Drcar-vin.h176 * @base: device I/O register space remapped to virtual memory
216 void __iomem *base; member in struct:rvin_dev
/linux-master/drivers/media/platform/qcom/camss/
H A Dcamss.c1412 csd->interface.csiphy_id = vep.base.port;
H A Dcamss-vfe.c1417 vfe->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
1418 if (IS_ERR(vfe->base)) {
1420 return PTR_ERR(vfe->base);
H A Dcamss-vfe-17x.c181 u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION);
195 u32 bits = readl_relaxed(vfe->base + reg);
197 writel_relaxed(bits | set_bits, vfe->base + reg);
215 writel_relaxed(BIT(31), vfe->base + VFE_IRQ_MASK_0);
220 writel_relaxed(reset_bits, vfe->base + VFE_GLOBAL_RESET_CMD);
230 writel_relaxed(val, vfe->base + VFE_BUS_WM_DEBUG_STATUS_CFG);
233 writel_relaxed(0, vfe->base + VFE_BUS_WM_ADDR_SYNC_FRAME_HEADER);
237 writel_relaxed(val, vfe->base + VFE_BUS_WM_CGC_OVERRIDE);
239 writel_relaxed(0x0, vfe->base + VFE_BUS_WM_TEST_BUS_CTRL);
243 writel_relaxed(val, vfe->base
[all...]
H A Dcamss-csiphy.c589 csiphy->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
590 if (IS_ERR(csiphy->base))
591 return PTR_ERR(csiphy->base);
H A Dcamss-csiphy-3ph-1-0.c357 csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(6));
359 hw_version = readl_relaxed(csiphy->base +
361 hw_version |= readl_relaxed(csiphy->base +
363 hw_version |= readl_relaxed(csiphy->base +
365 hw_version |= readl_relaxed(csiphy->base +
377 writel_relaxed(0x1, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0));
379 writel_relaxed(0x0, csiphy->base + CSIPHY_3PH_CMN_CSI_COMMON_CTRLn(0));
389 u8 val = readl_relaxed(csiphy->base +
392 writel_relaxed(val, csiphy->base +
396 writel_relaxed(0x1, csiphy->base
[all...]
/linux-master/drivers/media/platform/cadence/
H A Dcdns-csi2rx.c84 void __iomem *base; member in struct:csi2rx_priv
150 csi2rx->base + CSI2RX_SOFT_RESET_REG);
154 csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
160 writel(0, csi2rx->base + CSI2RX_SOFT_RESET_REG);
162 writel(0, csi2rx->base + CSI2RX_STREAM_CTRL_REG(i));
240 writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG);
250 writel(reg, csi2rx->base + CSI2RX_DPHY_LANE_CTRL_REG);
278 csi2rx->base + CSI2RX_STREAM_CFG_REG(i));
285 csi2rx->base + CSI2RX_STREAM_DATA_CFG_REG(i));
288 csi2rx->base
[all...]
/linux-master/drivers/media/platform/broadcom/
H A Dbcm2835-unicam.c185 /* peripheral base address */
186 void __iomem *base; member in struct:unicam_device
187 /* clock gating base address */
607 return readl(unicam->base + offset);
612 writel(val, unicam->base + offset);
2637 unicam->base = devm_platform_ioremap_resource_byname(pdev, "unicam");
2638 if (IS_ERR(unicam->base)) {
2639 ret = PTR_ERR(unicam->base);
/linux-master/drivers/media/pci/intel/ipu6/
H A Dipu6.h84 void __iomem *base; member in struct:ipu6_device
237 void __iomem *base; member in union:ipu6_mmu_hw::__anon912
273 void __iomem *base; member in struct:ipu6_isys_csi2_pdata
324 void __iomem *base; member in struct:ipu6_isys_pdata
333 void __iomem *base; member in struct:ipu6_psys_pdata
340 int pkg_dir_idx, void __iomem *base, u64 *pkg_dir,
H A Dipu6.c234 int pkg_dir_idx, void __iomem *base,
251 spc_base = base + prog->regs_addr;
252 if (spc_base != (base + hw_variant->spc_offset))
255 base + hw_variant->spc_offset, spc_base);
261 writel(pkg_dir_vied_address, base + hw_variant->dmem_offset);
266 int pkg_dir_idx, void __iomem *base, u64 *pkg_dir,
269 void __iomem *dmem_base = base + hw_variant->dmem_offset;
270 void __iomem *spc_regs_base = base + hw_variant->spc_offset;
280 ipu6_pkg_dir_configure_spc(isp, hw_variant, pkg_dir_idx, base,
369 struct ipu6_buttress_ctrl *ctrl, void __iomem *base,
232 ipu6_pkg_dir_configure_spc(struct ipu6_device *isp, const struct ipu6_hw_variants *hw_variant, int pkg_dir_idx, void __iomem *base, u64 *pkg_dir, dma_addr_t pkg_dir_vied_address) argument
264 ipu6_configure_spc(struct ipu6_device *isp, const struct ipu6_hw_variants *hw_variant, int pkg_dir_idx, void __iomem *base, u64 *pkg_dir, dma_addr_t pkg_dir_dma_addr) argument
368 ipu6_isys_init(struct pci_dev *pdev, struct device *parent, struct ipu6_buttress_ctrl *ctrl, void __iomem *base, const struct ipu6_isys_internal_pdata *ipdata) argument
421 ipu6_psys_init(struct pci_dev *pdev, struct device *parent, struct ipu6_buttress_ctrl *ctrl, void __iomem *base, const struct ipu6_psys_internal_pdata *ipdata) argument
[all...]
H A Dipu6-mmu.h62 void __iomem *base, int mmid,
H A Dipu6-mmu.c69 * read to the page table base before writing the invalidate
75 readl(mmu->mmu_hw[i].base + REG_L1_PHYS);
77 writel(0xffffffff, mmu->mmu_hw[i].base +
460 mmu->mmu_hw[i].base + REG_L1_PHYS);
464 mmu->mmu_hw[i].base + REG_INFO);
475 writel(block_addr, mmu_hw->base +
487 writel(block_addr, mmu_hw->base +
789 void __iomem *base, int mmid,
813 pdata_mmu->base = base
788 ipu6_mmu_init(struct device *dev, void __iomem *base, int mmid, const struct ipu6_hw_variants *hw) argument
[all...]
H A Dipu6-isys.c179 isys->pdata->base +
273 void __iomem *base = isys->pdata->base; local
284 writel(irqs, base + isys->pdata->ipdata->csi2.ctrl0_irq_edge);
285 writel(irqs, base + isys->pdata->ipdata->csi2.ctrl0_irq_lnp);
286 writel(irqs, base + isys->pdata->ipdata->csi2.ctrl0_irq_mask);
287 writel(irqs, base + isys->pdata->ipdata->csi2.ctrl0_irq_enable);
289 base + isys->pdata->ipdata->csi2.ctrl0_irq_clear);
292 writel(irqs, base + IPU6_REG_ISYS_UNISPART_IRQ_EDGE);
293 writel(irqs, base
346 void __iomem *base = isys->pdata->base; local
[all...]
H A Dipu6-isys-video.c1140 IPU6_CPD_PKG_DIR_ISYS_SERVER_IDX, isys->pdata->base,
H A Dipu6-isys-mcd-phy.c506 void __iomem *isys_base = isys->pdata->base;
526 void __iomem *isys_base = isys->pdata->base;
542 void __iomem *isys_base = isys->pdata->base;
557 void __iomem *isys_base = isys->pdata->base;
574 void __iomem *isp_base = isp->base;
628 void __iomem *isp_base = isp->base;
671 void __iomem *isys_base = isys->pdata->base;
H A Dipu6-isys-jsl-phy.c67 void __iomem *base = isys->adev->isp->base; local
77 val = readl(base + reg);
79 writel(val, base + reg);
83 val = readl(base + reg);
85 writel(val, base + reg);
89 val = readl(base + reg);
91 writel(val, base + reg);
95 val = readl(base + reg);
97 writel(val, base
115 void __iomem *base = isys->adev->isp->base; local
[all...]
H A Dipu6-isys-csi2.c202 u32 irq = readl(csi2->base + CSI_PORT_REG_BASE_IRQ_CSI +
208 writel(irq & mask, csi2->base + CSI_PORT_REG_BASE_IRQ_CSI +
257 writel(0, csi2->base + CSI_REG_CSI_FE_ENABLE);
258 writel(0, csi2->base + CSI_REG_PPI2CSI_ENABLE);
261 csi2->base + CSI_PORT_REG_BASE_IRQ_CSI +
264 csi2->base + CSI_PORT_REG_BASE_IRQ_CSI +
267 csi2->base + CSI_PORT_REG_BASE_IRQ_CSI_SYNC +
270 csi2->base + CSI_PORT_REG_BASE_IRQ_CSI_SYNC +
275 writel(0, isys->pdata->base + CSI_REG_HUB_FW_ACCESS_PORT
278 writel(0, isys->pdata->base
513 ipu6_isys_csi2_init(struct ipu6_isys_csi2 *csi2, struct ipu6_isys *isys, void __iomem *base, unsigned int index) argument
[all...]
H A Dipu6-isys-csi2.h44 void __iomem *base; member in struct:ipu6_isys_csi2
70 void __iomem *base, unsigned int index);
H A Dipu6-isys-dwc-phy.c67 void __iomem *isys_base = isys->pdata->base;
68 void __iomem *base = isys_base + IPU6_DWC_DPHY_BASE(phy_id); local
70 dev_dbg(dev, "write: reg 0x%lx = data 0x%x", base + addr - isys_base,
72 writel(data, base + addr);
78 void __iomem *isys_base = isys->pdata->base;
79 void __iomem *base = isys_base + IPU6_DWC_DPHY_BASE(phy_id); local
82 data = readl(base + addr);
83 dev_dbg(dev, "read: reg 0x%lx = data 0x%x", base + addr - isys_base,
116 void __iomem *isys_base = isys->pdata->base;
117 void __iomem *base local
144 void __iomem *base = isys_base + IPU6_DWC_DPHY_BASE(phy_id); local
[all...]
H A Dipu6-fw-com.h35 struct ipu6_bus_device *adev, void __iomem *base);
H A Dipu6-fw-isys.c189 void __iomem *spc_regs_base = isys->pdata->base +
203 void __iomem *spc_regs_base = isys->pdata->base +
338 isys->pdata->base);
H A Dipu6-fw-com.c122 #define BUTTRESS_FW_BOOT_PARAM_REG(base, offset, id) \
123 ((base) + BUTTRESS_FW_BOOT_PARAMS_0 + ((offset) + (id)) * 4)
158 struct ipu6_bus_device *adev, void __iomem *base)
177 ctx->dmem_addr = base + cfg->dmem_addr + REGMEM_OFFSET;
182 ctx->base_addr = base;
157 ipu6_fw_com_prepare(struct ipu6_fw_com_cfg *cfg, struct ipu6_bus_device *adev, void __iomem *base) argument
H A Dipu6-buttress.c77 val = readl(isp->base + ipc->csr_in);
78 writel(val, isp->base + ipc->csr_in);
81 writel(ENTRY, isp->base + ipc->csr_out);
96 val = readl(isp->base + ipc->csr_in);
107 writel(ENTRY | EXIT, isp->base + ipc->csr_in);
108 writel(QUERY, isp->base + ipc->csr_out);
119 writel(ENTRY | QUERY, isp->base + ipc->csr_in);
120 writel(ENTRY, isp->base + ipc->csr_out);
137 writel(EXIT, isp->base + ipc->csr_in);
138 writel(0, isp->base
[all...]
/linux-master/drivers/media/pci/intel/ipu3/
H A Dipu3-cio2.h60 /* base register: CIO2_REG_PIPE_BASE(pipe) * CIO2_REG_CSIRX_BASE */
79 /* base register: CIO2_REG_PIPE_BASE(pipe) * CIO2_REG_MIPIBE_BASE */
105 /* base register: CIO2_REG_PIPE_BASE(pipe) * CIO2_REG_IRQCTRL_BASE */
376 void __iomem *base; member in struct:cio2_device

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