/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_dspp.h | 56 * @cap: Pointer to layer_cfg 65 const struct dpu_dspp_cfg *cap; member in struct:dpu_hw_dspp
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H A D | dpu_hw_intf.c | 121 if (intf->cap->type == INTF_DP) 226 if (intf->cap->features & BIT(DPU_DATA_HCTL_EN)) { 297 unsigned long cap = intf->cap->features; local 299 if (cap & BIT(DPU_INTF_STATUS_SUPPORTED)) 558 c->cap = cfg;
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H A D | dpu_hw_intf.h | 126 const struct dpu_intf_cfg *cap; member in struct:dpu_hw_intf
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H A D | dpu_hw_lm.c | 43 const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk; 181 c->cap = cfg; 182 _setup_mixer_ops(&c->ops, c->cap->features);
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H A D | dpu_hw_lm.h | 75 const struct dpu_lm_cfg *cap; member in struct:dpu_hw_mixer
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H A D | dpu_hw_sspp.c | 175 const struct dpu_sspp_sub_blks *sblk = ctx->cap->sblk; 178 if (!test_bit(DPU_SSPP_SCALER_QSEED2, &ctx->cap->features) || 179 !test_bit(DPU_SSPP_CSC, &ctx->cap->features)) 195 const struct dpu_sspp_sub_blks *sblk = ctx->cap->sblk; 315 if (test_bit(DPU_SSPP_CSC, &ctx->cap->features)) 318 else if (test_bit(DPU_SSPP_CSC_10BIT, &ctx->cap->features)) 396 ctx->cap->sblk->scaler_blk.base, 397 ctx->cap->sblk->scaler_blk.version, 509 offset = ctx->cap->sblk->csc_blk.base; 511 if (test_bit(DPU_SSPP_CSC_10BIT, &ctx->cap [all...] |
H A D | dpu_hw_sspp.h | 301 * @cap: pointer to layer_cfg 311 const struct dpu_sspp_cfg *cap; member in struct:dpu_hw_sspp
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H A D | dpu_hw_top.c | 235 unsigned long cap) 241 if (cap & BIT(DPU_MDP_VSYNC_SEL)) 248 if (cap & BIT(DPU_MDP_AUDIO_SELECT)) 234 _setup_mdp_ops(struct dpu_hw_mdp_ops *ops, unsigned long cap) argument
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H A D | dpu_hw_vbif.c | 35 #define VBIF_XINL_QOS_LVL_REMAP_000(vbif) (VBIF_XINL_QOS_RP_REMAP_000 + (vbif)->cap->qos_rp_remap_size) 203 unsigned long cap) 209 if (test_bit(DPU_VBIF_QOS_REMAP, &cap)) 233 c->cap = cfg; 234 _setup_vbif_ops(&c->ops, c->cap->features); 202 _setup_vbif_ops(struct dpu_hw_vbif_ops *ops, unsigned long cap) argument
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H A D | dpu_hw_vbif.h | 102 const struct dpu_vbif_cfg *cap; member in struct:dpu_hw_vbif
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H A D | dpu_plane.c | 345 *forced_on = mdp->ops.setup_clk_force_ctrl(mdp, sspp->cap->clk_ctrl, enable); 370 ot_params.xin_id = pipe->sspp->cap->xin_id; 405 qos_params.xin_id = pipe->sspp->cap->xin_id; 472 if (pipe_hw->cap->sblk->scaler_blk.version >= 0x3000) { 520 if (BIT(DPU_SSPP_CSC_10BIT) & pipe->sspp->cap->features) 746 (!pipe->sspp->cap->sblk->scaler_blk.len || 747 !pipe->sspp->cap->sblk->csc_blk.len)) { 809 const struct dpu_sspp_cfg *pipe_hw_caps = pstate->pipe.sspp->cap; 810 const struct dpu_sspp_sub_blks *sblk = pstate->pipe.sspp->cap->sblk; 889 (!test_bit(DPU_SSPP_SMART_DMA_V1, &pipe->sspp->cap [all...] |
H A D | dpu_rm.c | 213 prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap; 252 lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap;
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H A D | dpu_vbif.c | 46 if (!vbif || !vbif->cap || !vbif->ops.get_halt_ctrl) { 51 timeout = ktime_add_us(ktime_get(), vbif->cap->xin_halt_timeout); 89 if (!vbif || !(vbif->cap->features & BIT(DPU_VBIF_QOS_OTLIM))) 100 tbl = params->rd ? &vbif->cap->dynamic_ot_rd_tbl : 101 &vbif->cap->dynamic_ot_wr_tbl; 128 if (!vbif || !vbif->cap) { 133 if (vbif->cap->default_ot_wr_limit && !params->rd) 134 ot_lim = vbif->cap->default_ot_wr_limit; 135 else if (vbif->cap->default_ot_rd_limit && params->rd) 136 ot_lim = vbif->cap [all...] |
/linux-master/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_devcaps.c | 40 static u32 vmw_mask_legacy_multisample(unsigned int cap, u32 fmt_value) argument 50 if (cap == SVGA3D_DEVCAP_DEAD5)
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/linux-master/drivers/hwmon/ |
H A D | acpi_power_meter.c | 85 u64 cap; member in struct:acpi_power_meter_resource 196 resource->cap = data; 211 return sprintf(buf, "%llu\n", resource->cap * 1000); 239 resource->cap = temp; 426 if (resource->power > resource->cap) 696 "Ignoring unsafe software power cap!\n"); 1023 MODULE_PARM_DESC(force_cap_on, "Enable power cap even it is unsafe to do so.");
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H A D | jc42.c | 425 int i, config, cap, manid, devid; local 431 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); 436 if (cap < 0 || config < 0 || manid < 0 || devid < 0) 439 if ((cap & 0xff00) || (config & 0xf800)) 507 unsigned int config, cap; local 522 ret = regmap_read(data->regmap, JC42_REG_CAP, &cap); 526 data->extended = !!(cap & JC42_CAP_RANGE);
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/linux-master/drivers/hwmon/occ/ |
H A D | common.c | 103 u16 cap; member in struct:caps_sensor_2 113 u16 cap; member in struct:caps_sensor_3 609 val = get_unaligned_be16(&caps->cap) * 1000000ULL; 659 val = get_unaligned_be16(&caps->cap) * 1000000ULL;
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/linux-master/drivers/hwtracing/coresight/ |
H A D | coresight-tmc.h | 306 static inline void tmc_etr_set_cap(struct tmc_drvdata *drvdata, u32 cap) argument 308 drvdata->etr_caps |= cap; 311 static inline bool tmc_etr_has_cap(struct tmc_drvdata *drvdata, u32 cap) argument 313 return !!(drvdata->etr_caps & cap);
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H A D | coresight-trbe.c | 153 int cap = trbe_errata_cpucaps[i]; local 155 if (WARN_ON_ONCE(cap < 0)) 157 if (this_cpu_has_cap(cap))
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/linux-master/drivers/i3c/master/mipi-i3c-hci/ |
H A D | ext_caps.c | 212 u8 cap; member in struct:hci_ext_cap_vendor_specific 218 { .vendor = (MIPI_VENDOR_##_vendor), .cap = (_cap), \ 235 vendor_ext_caps[i].cap == cap_id) {
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/linux-master/drivers/infiniband/core/ |
H A D | cma_trace.h | 198 __entry->send_wr = qp_init_attr->cap.max_send_wr; 199 __entry->recv_wr = qp_init_attr->cap.max_recv_wr;
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H A D | mad.c | 2897 qp_init_attr.cap.max_send_wr = mad_sendq_size; 2898 qp_init_attr.cap.max_recv_wr = mad_recvq_size; 2899 qp_init_attr.cap.max_send_sge = IB_MAD_SEND_REQ_MAX_SG; 2900 qp_init_attr.cap.max_recv_sge = IB_MAD_RECV_REQ_MAX_SG;
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H A D | rw.c | 677 attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs; 683 attr->cap.max_send_wr = 684 min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr); 694 nr_sig_mrs = attr->cap.max_rdma_ctxs; 695 nr_mrs = attr->cap.max_rdma_ctxs; 698 nr_mrs = attr->cap.max_rdma_ctxs;
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H A D | uverbs_cmd.c | 1406 attr.cap.max_send_wr = cmd->max_send_wr; 1407 attr.cap.max_recv_wr = cmd->max_recv_wr; 1408 attr.cap.max_send_sge = cmd->max_send_sge; 1409 attr.cap.max_recv_sge = cmd->max_recv_sge; 1410 attr.cap.max_inline_data = cmd->max_inline_data; 1474 resp.base.max_recv_sge = attr.cap.max_recv_sge; 1475 resp.base.max_send_sge = attr.cap.max_send_sge; 1476 resp.base.max_recv_wr = attr.cap.max_recv_wr; 1477 resp.base.max_send_wr = attr.cap.max_send_wr; 1478 resp.base.max_inline_data = attr.cap [all...] |
H A D | uverbs_marshall.c | 110 dst->max_send_wr = src->cap.max_send_wr; 111 dst->max_recv_wr = src->cap.max_recv_wr; 112 dst->max_send_sge = src->cap.max_send_sge; 113 dst->max_recv_sge = src->cap.max_recv_sge; 114 dst->max_inline_data = src->cap.max_inline_data;
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