/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_display_debugfs.c | 426 const struct intel_crtc_state *crtc_state = local 435 crtc_state->scaler_state.scaler_users, 436 crtc_state->scaler_state.scaler_id, 437 crtc_state->hw.scaling_filter); 441 &crtc_state->scaler_state.scalers[i]; 559 const struct intel_crtc_state *crtc_state = local 567 str_yes_no(crtc_state->uapi.enable), 568 str_yes_no(crtc_state->uapi.active), 569 DRM_MODE_ARG(&crtc_state->uapi.mode)); 572 str_yes_no(crtc_state 713 struct intel_crtc_state *crtc_state = local 1015 struct intel_crtc_state *crtc_state; local 1201 struct intel_crtc_state *crtc_state = NULL; local 1314 struct intel_crtc_state *crtc_state; local 1380 struct intel_crtc_state *crtc_state; local 1566 struct intel_crtc_state *crtc_state; local [all...] |
H A D | g4x_dp.c | 317 static void g4x_dp_get_m_n(struct intel_crtc_state *crtc_state) argument 319 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 321 if (crtc_state->has_pch_encoder) { 322 intel_pch_transcoder_get_m1_n1(crtc, &crtc_state->dp_m_n); 323 intel_pch_transcoder_get_m2_n2(crtc, &crtc_state->dp_m2_n2); 325 intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder, 326 &crtc_state->dp_m_n); 327 intel_cpu_transcoder_get_m2_n2(crtc, crtc_state->cpu_transcoder, 328 &crtc_state->dp_m2_n2); 479 const struct intel_crtc_state *crtc_state, 478 g4x_dp_audio_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument 594 cpt_set_link_train(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, u8 dp_train_pat) argument 622 g4x_set_link_train(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, u8 dp_train_pat) argument 649 intel_dp_enable_port(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) argument 796 intel_dp_voltage_max_2(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) argument 802 intel_dp_voltage_max_3(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) argument 818 vlv_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 904 chv_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 1025 g4x_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 1073 snb_cpu_edp_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 1125 ivb_cpu_edp_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument [all...] |
H A D | intel_crt.c | 168 const struct intel_crtc_state *crtc_state, 173 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 174 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 282 const struct intel_crtc_state *crtc_state, 287 drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder); 294 const struct intel_crtc_state *crtc_state, 298 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 301 drm_WARN_ON(&dev_priv->drm, !crtc_state->has_pch_encoder); 305 hsw_fdi_link_train(encoder, crtc_state); 307 intel_ddi_enable_transcoder_clock(encoder, crtc_state); 167 intel_crt_set_dpms(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, int mode) argument 280 hsw_pre_pll_enable_crt(struct intel_atomic_state *state, struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument 292 hsw_pre_enable_crt(struct intel_atomic_state *state, struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument 310 hsw_enable_crt(struct intel_atomic_state *state, struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument 337 intel_enable_crt(struct intel_atomic_state *state, struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument [all...] |
H A D | intel_lspcon.c | 476 const struct intel_crtc_state *crtc_state, 497 hsw_write_infoframe(encoder, crtc_state, type, frame, len); 510 const struct intel_crtc_state *crtc_state, 516 hsw_read_infoframe(encoder, crtc_state, type, 522 const struct intel_crtc_state *crtc_state, 532 &crtc_state->hw.adjusted_mode; 558 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) 567 drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range && 568 crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB); 570 if (crtc_state 475 lspcon_write_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, const void *frame, ssize_t len) argument 509 lspcon_read_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, void *frame, ssize_t len) argument 520 lspcon_set_infoframes(struct intel_encoder *encoder, bool enable, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) argument [all...] |
H A D | intel_dpll_mgr.h | 360 void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state, 371 void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); 372 void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
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H A D | intel_bw.c | 683 static unsigned int intel_bw_crtc_num_active_planes(const struct intel_crtc_state *crtc_state) argument 689 return hweight8(crtc_state->active_planes & ~BIT(PLANE_CURSOR)); 692 static unsigned int intel_bw_crtc_data_rate(const struct intel_crtc_state *crtc_state) argument 694 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 707 data_rate += crtc_state->data_rate[plane_id]; 710 data_rate += crtc_state->data_rate_y[plane_id]; 717 static int intel_bw_crtc_min_cdclk(const struct intel_crtc_state *crtc_state) argument 719 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 725 return DIV_ROUND_UP_ULL(mul_u32_u32(intel_bw_crtc_data_rate(crtc_state), 10), 512); 729 const struct intel_crtc_state *crtc_state) 728 intel_bw_crtc_update(struct intel_bw_state *bw_state, const struct intel_crtc_state *crtc_state) argument 1058 skl_crtc_calc_dbuf_bw(struct intel_bw_state *bw_state, const struct intel_crtc_state *crtc_state) argument 1142 const struct intel_crtc_state *crtc_state; local [all...] |
H A D | intel_dsb.c | 324 static int intel_dsb_dewake_scanline(const struct intel_crtc_state *crtc_state) argument 326 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); 327 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 331 if (crtc_state->vrr.enable) { 332 vblank_start = intel_vrr_vmin_vblank_start(crtc_state); 449 * @crtc_state: the CRTC state 458 struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state, argument 461 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 493 dsb->dewake_scanline = intel_dsb_dewake_scanline(crtc_state);
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H A D | intel_cx0_phy.c | 384 static u8 intel_c10_get_tx_vboost_lvl(const struct intel_crtc_state *crtc_state) argument 386 if (intel_crtc_has_dp_encoder(crtc_state)) { 387 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && 388 (crtc_state->port_clock == 540000 || 389 crtc_state->port_clock == 810000)) 398 static u8 intel_c10_get_tx_term_ctl(const struct intel_crtc_state *crtc_state) argument 400 if (intel_crtc_has_dp_encoder(crtc_state)) { 401 if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && 402 (crtc_state->port_clock == 540000 || 403 crtc_state 412 intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 1794 intel_c10pll_tables_get(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 1810 intel_c10pll_update_pll(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 1834 intel_c10pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 1884 intel_c10_pll_program(struct drm_i915_private *i915, const struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 2049 intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 2061 intel_c20pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 2088 intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 2326 intel_c20_pll_program(struct drm_i915_private *i915, const struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) argument 2454 intel_program_port_clock_ctl(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, bool lane_reversal) argument 2704 intel_cx0pll_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 2830 intel_mtl_tbt_pll_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 2881 intel_mtl_pll_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument 2993 intel_mtl_port_pll_type(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state) argument [all...] |
/linux-master/drivers/gpu/drm/mgag200/ |
H A D | mgag200_g200er.c | 125 struct drm_crtc_state *crtc_state = crtc->state; local 126 struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state); 189 struct drm_crtc_state *crtc_state = crtc->state; local 190 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 191 struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state); 205 if (crtc_state->gamma_lut) 206 mgag200_crtc_set_gamma(mdev, format, crtc_state->gamma_lut->data);
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H A D | mgag200_g200ev.c | 104 struct drm_crtc_state *crtc_state = crtc->state; local 105 struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state); 190 struct drm_crtc_state *crtc_state = crtc->state; local 191 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 192 struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state); 206 if (crtc_state->gamma_lut) 207 mgag200_crtc_set_gamma(mdev, format, crtc_state->gamma_lut->data);
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/linux-master/drivers/gpu/drm/ |
H A D | drm_atomic_state_helper.c | 66 * @crtc_state: atomic CRTC state, must not be NULL 69 * Initializes the newly allocated @crtc_state with default 73 __drm_atomic_helper_crtc_state_reset(struct drm_crtc_state *crtc_state, argument 76 crtc_state->crtc = crtc; 83 * @crtc_state: CRTC state to assign 85 * Initializes the newly allocated @crtc_state and assigns it to 94 struct drm_crtc_state *crtc_state) 96 if (crtc_state) 97 __drm_atomic_helper_crtc_state_reset(crtc_state, crtc); 102 crtc->state = crtc_state; 93 __drm_atomic_helper_crtc_reset(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state) argument 115 struct drm_crtc_state *crtc_state = local 592 struct drm_crtc_state *crtc_state; local [all...] |
H A D | drm_color_mgmt.c | 282 struct drm_crtc_state *crtc_state; local 323 crtc_state = drm_atomic_get_crtc_state(state, crtc); 324 if (IS_ERR(crtc_state)) { 325 ret = PTR_ERR(crtc_state); 330 replaced = drm_property_replace_blob(&crtc_state->degamma_lut, 332 replaced |= drm_property_replace_blob(&crtc_state->ctm, NULL); 333 replaced |= drm_property_replace_blob(&crtc_state->gamma_lut, 335 crtc_state->color_mgmt_changed |= replaced;
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/linux-master/drivers/gpu/drm/imx/dcss/ |
H A D | dcss-plane.c | 151 struct drm_crtc_state *crtc_state; local 162 crtc_state = drm_atomic_get_existing_crtc_state(state, 165 hdisplay = crtc_state->adjusted_mode.hdisplay; 166 vdisplay = crtc_state->adjusted_mode.vdisplay; 178 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 278 struct drm_crtc_state *crtc_state; local 288 crtc_state = new_state->crtc->state; 291 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state) && 333 drm_mode_vrefresh(&crtc_state->mode));
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/linux-master/drivers/gpu/drm/arm/ |
H A D | malidp_crtc.c | 343 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, local 379 drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) { 395 drm_atomic_crtc_state_for_each_plane_state(plane, pstate, crtc_state) { 423 if (crtc_state->connectors_changed) { 425 u32 new_mask = crtc_state->connector_mask; 429 crtc_state->connectors_changed = false; 432 ret = malidp_crtc_atomic_check_gamma(crtc, crtc_state); 433 ret = ret ? ret : malidp_crtc_atomic_check_ctm(crtc, crtc_state); 434 ret = ret ? ret : malidp_crtc_atomic_check_scaling(crtc, crtc_state);
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/linux-master/drivers/gpu/drm/vkms/ |
H A D | vkms_plane.c | 139 struct drm_crtc_state *crtc_state; local 145 crtc_state = drm_atomic_get_crtc_state(state, 147 if (IS_ERR(crtc_state)) 148 return PTR_ERR(crtc_state); 150 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
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/linux-master/drivers/gpu/drm/xe/display/ |
H A D | xe_plane_initial.c | 34 const struct intel_crtc_state *crtc_state = local 37 if (!crtc_state->uapi.active) 191 struct intel_crtc_state *crtc_state = local 244 plane->check_plane(crtc_state, plane_state); 245 plane->async_flip(plane, crtc_state, plane_state, true);
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/linux-master/drivers/gpu/drm/tidss/ |
H A D | tidss_plane.c | 31 struct drm_crtc_state *crtc_state; local 48 crtc_state = drm_atomic_get_crtc_state(state, 50 if (IS_ERR(crtc_state)) 51 return PTR_ERR(crtc_state); 53 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
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/linux-master/include/drm/ |
H A D | drm_bridge.h | 417 struct drm_crtc_state *crtc_state, 457 struct drm_crtc_state *crtc_state, 489 struct drm_crtc_state *crtc_state, 870 struct drm_crtc_state *crtc_state, 884 struct drm_crtc_state *crtc_state,
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/linux-master/drivers/gpu/drm/bridge/ |
H A D | display-connector.c | 101 struct drm_crtc_state *crtc_state, 126 prev_bridge_state = drm_atomic_get_new_bridge_state(crtc_state->state, 130 crtc_state, conn_state, 143 struct drm_crtc_state *crtc_state, 164 prev_bridge_state = drm_atomic_get_new_bridge_state(crtc_state->state, 168 crtc_state, conn_state, output_fmt, 99 display_connector_get_output_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, unsigned int *num_output_fmts) argument 141 display_connector_get_input_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts) argument
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/linux-master/drivers/gpu/drm/ingenic/ |
H A D | ingenic-drm-drv.c | 338 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, local 343 if (crtc_state->gamma_lut && 344 drm_color_lut_size(crtc_state->gamma_lut) != ARRAY_SIZE(priv->dma_hwdescs->palette)) { 349 if (drm_atomic_crtc_needs_modeset(crtc_state) && priv->soc_info->has_osd) { 350 f1_state = drm_atomic_get_plane_state(crtc_state->state, 355 f0_state = drm_atomic_get_plane_state(crtc_state->state, 361 ipu_state = drm_atomic_get_plane_state(crtc_state->state, 402 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, local 408 drm_atomic_crtc_needs_modeset(crtc_state)) { 425 struct drm_crtc_state *crtc_state local 463 struct drm_crtc_state *crtc_state; local 664 struct drm_crtc_state *crtc_state; local 729 ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) argument 801 ingenic_drm_bridge_atomic_check(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) argument 839 ingenic_drm_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts) argument [all...] |
/linux-master/drivers/gpu/drm/nouveau/dispnv50/ |
H A D | crc.c | 240 struct drm_crtc_state *crtc_state; local 244 for_each_new_crtc_in_state(state, crtc, crtc_state, i) { 246 struct nv50_head_atom *asyh = nv50_head_atom(crtc_state); 319 struct drm_crtc_state *crtc_state; local 323 for_each_new_crtc_in_state(state, crtc, crtc_state, i) { 325 struct nv50_head_atom *asyh = nv50_head_atom(crtc_state); 548 struct drm_crtc_state *crtc_state; local 581 crtc_state = drm_atomic_get_crtc_state(state, &head->base.base); 582 if (IS_ERR(crtc_state)) { 583 ret = PTR_ERR(crtc_state); [all...] |
/linux-master/drivers/gpu/drm/tegra/ |
H A D | plane.c | 231 struct drm_crtc_state *crtc_state; local 237 crtc_state = drm_atomic_get_new_crtc_state(state->state, state->crtc); 238 if (!crtc_state) 271 avg_bandwidth *= drm_mode_vrefresh(&crtc_state->adjusted_mode); 276 peak_bandwidth = DIV_ROUND_UP(crtc_state->adjusted_mode.clock * bpp, 8); 300 struct drm_crtc_state *crtc_state; local 305 crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); 306 if (IS_ERR(crtc_state)) 307 return PTR_ERR(crtc_state); 310 err = drm_atomic_helper_check_plane_state(state, crtc_state, [all...] |
/linux-master/drivers/gpu/drm/solomon/ |
H A D | ssd130x.c | 1102 struct drm_crtc_state *crtc_state = NULL; local 1108 crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 1110 ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state, 1151 struct drm_crtc_state *crtc_state = NULL; local 1157 crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 1159 ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state, 1196 struct drm_crtc_state *crtc_state = NULL; local 1200 crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 1202 ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state, 1220 struct drm_crtc_state *crtc_state local 1255 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); local 1290 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); local 1323 struct drm_crtc_state *crtc_state; local 1347 struct drm_crtc_state *crtc_state; local 1371 struct drm_crtc_state *crtc_state; local 1490 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); local 1511 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); local 1532 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); local [all...] |
/linux-master/drivers/gpu/drm/vc4/ |
H A D | vc4_plane.c | 395 struct drm_crtc_state *crtc_state; local 397 crtc_state = drm_atomic_get_new_crtc_state(pstate->state, 400 vc4_crtc_get_margins(crtc_state, &left, &right, &top, &bottom); 404 if (left + right >= crtc_state->mode.hdisplay || 405 top + bottom >= crtc_state->mode.vdisplay) 408 adjhdisplay = crtc_state->mode.hdisplay - (left + right); 411 crtc_state->mode.hdisplay); 413 if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - right) 414 vc4_pstate->crtc_x = crtc_state->mode.hdisplay - right; 416 adjvdisplay = crtc_state 443 struct drm_crtc_state *crtc_state; local 635 struct drm_crtc_state *crtc_state; local [all...] |
/linux-master/drivers/gpu/drm/hyperv/ |
H A D | hyperv_drm_modeset.c | 102 struct drm_crtc_state *crtc_state, 110 crtc_state->mode.hdisplay, 111 crtc_state->mode.vdisplay, 118 struct drm_crtc_state *crtc_state) 101 hyperv_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state) argument 116 hyperv_pipe_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *plane_state, struct drm_crtc_state *crtc_state) argument
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